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[BNX2]: Improve SerDes handling.
1. Add support for 2.5Gbps forced speed setting. 2. Remove a long udelay() loop and change to msleep(). 3. Other misc. SerDes fixes. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -860,7 +860,7 @@ bnx2_set_link(struct bnx2 *bp)
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u32 bmsr;
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u8 link_up;
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if (bp->loopback == MAC_LOOPBACK) {
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if (bp->loopback == MAC_LOOPBACK || bp->loopback == PHY_LOOPBACK) {
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bp->link_up = 1;
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return 0;
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}
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@ -902,6 +902,7 @@ bnx2_set_link(struct bnx2 *bp)
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u32 bmcr;
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bnx2_read_phy(bp, MII_BMCR, &bmcr);
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bmcr &= ~BCM5708S_BMCR_FORCE_2500;
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if (!(bmcr & BMCR_ANENABLE)) {
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bnx2_write_phy(bp, MII_BMCR, bmcr |
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BMCR_ANENABLE);
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@ -988,7 +989,21 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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u32 new_bmcr;
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int force_link_down = 0;
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if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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bnx2_read_phy(bp, MII_ADVERTISE, &adv);
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adv &= ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF);
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bnx2_read_phy(bp, MII_BMCR, &bmcr);
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new_bmcr = bmcr & ~(BMCR_ANENABLE | BCM5708S_BMCR_FORCE_2500);
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new_bmcr |= BMCR_SPEED1000;
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if (bp->req_line_speed == SPEED_2500) {
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new_bmcr |= BCM5708S_BMCR_FORCE_2500;
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bnx2_read_phy(bp, BCM5708S_UP1, &up1);
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if (!(up1 & BCM5708S_UP1_2G5)) {
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up1 |= BCM5708S_UP1_2G5;
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bnx2_write_phy(bp, BCM5708S_UP1, up1);
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force_link_down = 1;
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}
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} else if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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bnx2_read_phy(bp, BCM5708S_UP1, &up1);
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if (up1 & BCM5708S_UP1_2G5) {
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up1 &= ~BCM5708S_UP1_2G5;
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@ -997,12 +1012,6 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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}
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}
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bnx2_read_phy(bp, MII_ADVERTISE, &adv);
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adv &= ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF);
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bnx2_read_phy(bp, MII_BMCR, &bmcr);
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new_bmcr = bmcr & ~BMCR_ANENABLE;
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new_bmcr |= BMCR_SPEED1000;
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if (bp->req_duplex == DUPLEX_FULL) {
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adv |= ADVERTISE_1000XFULL;
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new_bmcr |= BMCR_FULLDPLX;
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@ -1023,6 +1032,7 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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bp->link_up = 0;
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netif_carrier_off(bp->dev);
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bnx2_write_phy(bp, MII_BMCR, new_bmcr);
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bnx2_report_link(bp);
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}
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bnx2_write_phy(bp, MII_ADVERTISE, adv);
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bnx2_write_phy(bp, MII_BMCR, new_bmcr);
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@ -1048,12 +1058,10 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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if ((adv != new_adv) || ((bmcr & BMCR_ANENABLE) == 0)) {
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/* Force a link down visible on the other side */
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if (bp->link_up) {
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int i;
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bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK);
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for (i = 0; i < 110; i++) {
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udelay(100);
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}
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spin_unlock_bh(&bp->phy_lock);
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msleep(20);
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spin_lock_bh(&bp->phy_lock);
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}
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bnx2_write_phy(bp, MII_ADVERTISE, new_adv);
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@ -1397,7 +1405,7 @@ bnx2_set_phy_loopback(struct bnx2 *bp)
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for (i = 0; i < 10; i++) {
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if (bnx2_test_link(bp) == 0)
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break;
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udelay(10);
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msleep(100);
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}
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mac_mode = REG_RD(bp, BNX2_EMAC_MODE);
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@ -3713,7 +3721,9 @@ bnx2_init_nic(struct bnx2 *bp)
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if ((rc = bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET)) != 0)
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return rc;
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spin_lock_bh(&bp->phy_lock);
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bnx2_init_phy(bp);
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spin_unlock_bh(&bp->phy_lock);
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bnx2_set_link(bp);
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return 0;
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}
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@ -3953,7 +3963,7 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode)
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bnx2_set_mac_loopback(bp);
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}
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else if (loopback_mode == BNX2_PHY_LOOPBACK) {
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bp->loopback = 0;
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bp->loopback = PHY_LOOPBACK;
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bnx2_set_phy_loopback(bp);
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}
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else
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@ -4744,10 +4754,14 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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}
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else {
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if (bp->phy_flags & PHY_SERDES_FLAG) {
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if ((cmd->speed != SPEED_1000) ||
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(cmd->duplex != DUPLEX_FULL)) {
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if ((cmd->speed != SPEED_1000 &&
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cmd->speed != SPEED_2500) ||
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(cmd->duplex != DUPLEX_FULL))
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return -EINVAL;
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if (cmd->speed == SPEED_2500 &&
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!(bp->phy_flags & PHY_2_5G_CAPABLE_FLAG))
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return -EINVAL;
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}
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}
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else if (cmd->speed == SPEED_1000) {
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return -EINVAL;
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@ -5289,6 +5303,8 @@ bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
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memset(buf, 0, sizeof(u64) * BNX2_NUM_TESTS);
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if (etest->flags & ETH_TEST_FL_OFFLINE) {
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int i;
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bnx2_netif_stop(bp);
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bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_DIAG);
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bnx2_free_skbs(bp);
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@ -5313,9 +5329,11 @@ bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
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}
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/* wait for link up */
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msleep_interruptible(3000);
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if ((!bp->link_up) && !(bp->phy_flags & PHY_SERDES_FLAG))
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msleep_interruptible(4000);
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for (i = 0; i < 7; i++) {
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if (bp->link_up)
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break;
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msleep_interruptible(1000);
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}
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}
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if (bnx2_test_nvram(bp) != 0) {
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@ -3696,6 +3696,8 @@ struct l2_fhdr {
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/* 5708 Serdes PHY registers */
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#define BCM5708S_BMCR_FORCE_2500 0x20
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#define BCM5708S_UP1 0xb
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#define BCM5708S_UP1_2G5 0x1
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