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ARM: imx: drop support for irq priorisation
The code for irq priorisation support doesn't have any in-tree users and the Kconfig description does wrong promises because nowadays irq handlers are called with irqs disabled, so no high prioritized irq can interrupt a lower prioritized handler. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -20,16 +20,6 @@ config ARCH_MXC
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menu "Freescale i.MX support"
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depends on ARCH_MXC
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config MXC_IRQ_PRIOR
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bool "Use IRQ priority"
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help
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Select this if you want to use prioritized IRQ handling.
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This feature prevents higher priority ISR to be interrupted
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by lower priority IRQ.
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This may be useful in embedded applications, where are strong
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requirements for timing.
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Say N here, unless you have a specialized requirement.
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config MXC_TZIC
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bool
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@ -54,28 +54,6 @@
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static void __iomem *avic_base;
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static struct irq_domain *domain;
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#ifdef CONFIG_MXC_IRQ_PRIOR
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static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
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{
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struct irq_data *d = irq_get_irq_data(irq);
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unsigned int temp;
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unsigned int mask = 0x0F << irq % 8 * 4;
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irq = d->hwirq;
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if (irq >= AVIC_NUM_IRQS)
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return -EINVAL;
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temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8));
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temp &= ~mask;
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temp |= prio & mask;
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__raw_writel(temp, avic_base + AVIC_NIPRIORITY(irq / 8));
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return 0;
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}
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#endif
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#ifdef CONFIG_FIQ
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static int avic_set_irq_fiq(unsigned int irq, unsigned int type)
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{
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@ -102,9 +80,6 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type)
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static struct mxc_extra_irq avic_extra_irq = {
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#ifdef CONFIG_MXC_IRQ_PRIOR
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.set_priority = avic_irq_set_priority,
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#endif
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#ifdef CONFIG_FIQ
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.set_irq_fiq = avic_set_irq_fiq,
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#endif
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@ -24,7 +24,6 @@
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struct mxc_extra_irq
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{
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int (*set_priority)(unsigned char irq, unsigned char prio);
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int (*set_irq_fiq)(unsigned int irq, unsigned int type);
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};
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