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phy: miphy28lp: Inform the reset framework that our reset line may be shared

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On the STiH410 B2120 development board the MiPHY28lp shares its reset
line with the Synopsys DWC3 SuperSpeed (SS) USB 3.0 Dual-Role-Device
(DRD).  New functionality in the reset subsystems forces consumers to
be explicit when requesting shared/exclusive reset lines.

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Lee Jones 2016-06-03 11:44:28 +01:00
parent ba4a1c28a9
commit 8293c8a3bb
1 changed files with 2 additions and 1 deletions
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3
drivers/phy/phy-miphy28lp.c
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@ -1143,7 +1143,8 @@ static int miphy28lp_probe_resets(struct device_node *node,
struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;
int err;
miphy_phy->miphy_rst = of_reset_control_get(node, "miphy-sw-rst");
miphy_phy->miphy_rst =
of_reset_control_get_shared(node, "miphy-sw-rst");
if (IS_ERR(miphy_phy->miphy_rst)) {
dev_err(miphy_dev->dev,