mirror of
https://github.com/FEX-Emu/linux.git
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powerpc: mpic irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
parent
4e8b0cf46b
commit
835c0553eb
@ -467,11 +467,11 @@ extern void mpic_request_ipis(void);
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void smp_mpic_message_pass(int target, int msg);
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/* Unmask a specific virq */
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extern void mpic_unmask_irq(unsigned int irq);
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extern void mpic_unmask_irq(struct irq_data *d);
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/* Mask a specific virq */
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extern void mpic_mask_irq(unsigned int irq);
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extern void mpic_mask_irq(struct irq_data *d);
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/* EOI a specific virq */
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extern void mpic_end_irq(unsigned int irq);
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extern void mpic_end_irq(struct irq_data *d);
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/* Fetch interrupt from a given mpic */
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extern unsigned int mpic_get_one_irq(struct mpic *mpic);
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@ -240,7 +240,7 @@ static __init void pas_init_IRQ(void)
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nmi_virq = irq_create_mapping(NULL, *nmiprop);
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mpic_irq_set_priority(nmi_virq, 15);
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set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
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mpic_unmask_irq(nmi_virq);
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mpic_unmask_irq(irq_get_irq_data(nmi_virq));
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}
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of_node_put(mpic_node);
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@ -266,7 +266,7 @@ static int pas_machine_check_handler(struct pt_regs *regs)
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if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) {
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printk(KERN_ERR "NMI delivered\n");
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debugger(regs);
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mpic_end_irq(nmi_virq);
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mpic_end_irq(irq_get_irq_data(nmi_virq));
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goto out;
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}
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@ -611,7 +611,7 @@ static struct mpic *mpic_find(unsigned int irq)
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if (irq < NUM_ISA_INTERRUPTS)
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return NULL;
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return irq_to_desc(irq)->chip_data;
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return get_irq_chip_data(irq);
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}
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/* Determine if the linux irq is an IPI */
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@ -636,16 +636,22 @@ static inline u32 mpic_physmask(u32 cpumask)
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#ifdef CONFIG_SMP
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/* Get the mpic structure from the IPI number */
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static inline struct mpic * mpic_from_ipi(unsigned int ipi)
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static inline struct mpic * mpic_from_ipi(struct irq_data *d)
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{
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return irq_to_desc(ipi)->chip_data;
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return irq_data_get_irq_chip_data(d);
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}
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#endif
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/* Get the mpic structure from the irq number */
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static inline struct mpic * mpic_from_irq(unsigned int irq)
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{
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return irq_to_desc(irq)->chip_data;
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return get_irq_chip_data(irq);
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}
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/* Get the mpic structure from the irq data */
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static inline struct mpic * mpic_from_irq_data(struct irq_data *d)
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{
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return irq_data_get_irq_chip_data(d);
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}
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/* Send an EOI */
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@ -660,13 +666,13 @@ static inline void mpic_eoi(struct mpic *mpic)
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*/
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void mpic_unmask_irq(unsigned int irq)
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void mpic_unmask_irq(struct irq_data *d)
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{
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unsigned int loops = 100000;
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
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DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src);
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mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
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mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) &
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@ -681,13 +687,13 @@ void mpic_unmask_irq(unsigned int irq)
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} while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
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}
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void mpic_mask_irq(unsigned int irq)
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void mpic_mask_irq(struct irq_data *d)
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{
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unsigned int loops = 100000;
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
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DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src);
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mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
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mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) |
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@ -703,12 +709,12 @@ void mpic_mask_irq(unsigned int irq)
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} while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
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}
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void mpic_end_irq(unsigned int irq)
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void mpic_end_irq(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_irq(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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#ifdef DEBUG_IRQ
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DBG("%s: end_irq: %d\n", mpic->name, irq);
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DBG("%s: end_irq: %d\n", mpic->name, d->irq);
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#endif
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/* We always EOI on end_irq() even for edge interrupts since that
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* should only lower the priority, the MPIC should have properly
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@ -720,51 +726,51 @@ void mpic_end_irq(unsigned int irq)
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#ifdef CONFIG_MPIC_U3_HT_IRQS
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static void mpic_unmask_ht_irq(unsigned int irq)
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static void mpic_unmask_ht_irq(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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mpic_unmask_irq(irq);
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mpic_unmask_irq(d);
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if (irq_to_desc(irq)->status & IRQ_LEVEL)
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if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
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mpic_ht_end_irq(mpic, src);
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}
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static unsigned int mpic_startup_ht_irq(unsigned int irq)
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static unsigned int mpic_startup_ht_irq(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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mpic_unmask_irq(irq);
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mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
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mpic_unmask_irq(d);
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mpic_startup_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status);
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return 0;
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}
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static void mpic_shutdown_ht_irq(unsigned int irq)
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static void mpic_shutdown_ht_irq(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
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mpic_mask_irq(irq);
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mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status);
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mpic_mask_irq(d);
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}
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static void mpic_end_ht_irq(unsigned int irq)
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static void mpic_end_ht_irq(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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#ifdef DEBUG_IRQ
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DBG("%s: end_irq: %d\n", mpic->name, irq);
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DBG("%s: end_irq: %d\n", mpic->name, d->irq);
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#endif
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/* We always EOI on end_irq() even for edge interrupts since that
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* should only lower the priority, the MPIC should have properly
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* latched another edge interrupt coming in anyway
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*/
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if (irq_to_desc(irq)->status & IRQ_LEVEL)
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if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
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mpic_ht_end_irq(mpic, src);
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mpic_eoi(mpic);
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}
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@ -772,23 +778,23 @@ static void mpic_end_ht_irq(unsigned int irq)
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#ifdef CONFIG_SMP
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static void mpic_unmask_ipi(unsigned int irq)
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static void mpic_unmask_ipi(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_ipi(irq);
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unsigned int src = mpic_irq_to_hw(irq) - mpic->ipi_vecs[0];
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struct mpic *mpic = mpic_from_ipi(d);
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unsigned int src = mpic_irq_to_hw(d->irq) - mpic->ipi_vecs[0];
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DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src);
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DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src);
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mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK);
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}
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static void mpic_mask_ipi(unsigned int irq)
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static void mpic_mask_ipi(struct irq_data *d)
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{
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/* NEVER disable an IPI... that's just plain wrong! */
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}
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static void mpic_end_ipi(unsigned int irq)
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static void mpic_end_ipi(struct irq_data *d)
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{
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struct mpic *mpic = mpic_from_ipi(irq);
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struct mpic *mpic = mpic_from_ipi(d);
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/*
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* IPIs are marked IRQ_PER_CPU. This has the side effect of
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@ -802,10 +808,11 @@ static void mpic_end_ipi(unsigned int irq)
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#endif /* CONFIG_SMP */
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int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
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bool force)
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{
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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if (mpic->flags & MPIC_SINGLE_DEST_CPU) {
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int cpuid = irq_choose_cpu(cpumask);
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@ -848,15 +855,15 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
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}
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}
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int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
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int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
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{
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struct mpic *mpic = mpic_from_irq(virq);
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unsigned int src = mpic_irq_to_hw(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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struct mpic *mpic = mpic_from_irq_data(d);
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unsigned int src = mpic_irq_to_hw(d->irq);
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struct irq_desc *desc = irq_to_desc(d->irq);
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unsigned int vecpri, vold, vnew;
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DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
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mpic, virq, src, flow_type);
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mpic, d->irq, src, flow_type);
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if (src >= mpic->irq_count)
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return -EINVAL;
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@ -907,28 +914,28 @@ void mpic_set_vector(unsigned int virq, unsigned int vector)
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}
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static struct irq_chip mpic_irq_chip = {
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.mask = mpic_mask_irq,
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.unmask = mpic_unmask_irq,
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.eoi = mpic_end_irq,
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.set_type = mpic_set_irq_type,
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.irq_mask = mpic_mask_irq,
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.irq_unmask = mpic_unmask_irq,
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.irq_eoi = mpic_end_irq,
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.irq_set_type = mpic_set_irq_type,
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};
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#ifdef CONFIG_SMP
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static struct irq_chip mpic_ipi_chip = {
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.mask = mpic_mask_ipi,
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.unmask = mpic_unmask_ipi,
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.eoi = mpic_end_ipi,
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.irq_mask = mpic_mask_ipi,
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.irq_unmask = mpic_unmask_ipi,
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.irq_eoi = mpic_end_ipi,
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};
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_MPIC_U3_HT_IRQS
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static struct irq_chip mpic_irq_ht_chip = {
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.startup = mpic_startup_ht_irq,
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.shutdown = mpic_shutdown_ht_irq,
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.mask = mpic_mask_irq,
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.unmask = mpic_unmask_ht_irq,
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.eoi = mpic_end_ht_irq,
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.set_type = mpic_set_irq_type,
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.irq_startup = mpic_startup_ht_irq,
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.irq_shutdown = mpic_shutdown_ht_irq,
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.irq_mask = mpic_mask_irq,
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.irq_unmask = mpic_unmask_ht_irq,
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.irq_eoi = mpic_end_ht_irq,
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.irq_set_type = mpic_set_irq_type,
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};
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#endif /* CONFIG_MPIC_U3_HT_IRQS */
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@ -1060,12 +1067,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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mpic->hc_irq = mpic_irq_chip;
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mpic->hc_irq.name = name;
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if (flags & MPIC_PRIMARY)
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mpic->hc_irq.set_affinity = mpic_set_affinity;
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mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
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#ifdef CONFIG_MPIC_U3_HT_IRQS
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mpic->hc_ht_irq = mpic_irq_ht_chip;
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mpic->hc_ht_irq.name = name;
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if (flags & MPIC_PRIMARY)
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mpic->hc_ht_irq.set_affinity = mpic_set_affinity;
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mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
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#endif /* CONFIG_MPIC_U3_HT_IRQS */
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#ifdef CONFIG_SMP
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@ -34,9 +34,10 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic)
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}
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#endif
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extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
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extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);
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extern void mpic_set_vector(unsigned int virq, unsigned int vector);
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extern int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask);
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extern int mpic_set_affinity(struct irq_data *d,
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const struct cpumask *cpumask, bool force);
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extern void mpic_reset_core(int cpu);
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#endif /* _POWERPC_SYSDEV_MPIC_H */
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@ -43,13 +43,13 @@ static void mpic_pasemi_msi_mask_irq(struct irq_data *data)
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{
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pr_debug("mpic_pasemi_msi_mask_irq %d\n", data->irq);
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mask_msi_irq(data);
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mpic_mask_irq(data->irq);
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mpic_mask_irq(data);
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}
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static void mpic_pasemi_msi_unmask_irq(struct irq_data *data)
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{
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pr_debug("mpic_pasemi_msi_unmask_irq %d\n", data->irq);
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mpic_unmask_irq(data->irq);
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mpic_unmask_irq(data);
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unmask_msi_irq(data);
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}
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@ -57,9 +57,9 @@ static struct irq_chip mpic_pasemi_msi_chip = {
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.irq_shutdown = mpic_pasemi_msi_mask_irq,
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.irq_mask = mpic_pasemi_msi_mask_irq,
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.irq_unmask = mpic_pasemi_msi_unmask_irq,
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.eoi = mpic_end_irq,
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.set_type = mpic_set_irq_type,
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.set_affinity = mpic_set_affinity,
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.irq_eoi = mpic_end_irq,
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.irq_set_type = mpic_set_irq_type,
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.irq_set_affinity = mpic_set_affinity,
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.name = "PASEMI-MSI",
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};
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@ -26,12 +26,12 @@ static struct mpic *msi_mpic;
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static void mpic_u3msi_mask_irq(struct irq_data *data)
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{
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mask_msi_irq(data);
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mpic_mask_irq(data->irq);
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mpic_mask_irq(data);
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}
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static void mpic_u3msi_unmask_irq(struct irq_data *data)
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{
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mpic_unmask_irq(data->irq);
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mpic_unmask_irq(data);
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unmask_msi_irq(data);
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}
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@ -39,9 +39,9 @@ static struct irq_chip mpic_u3msi_chip = {
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.irq_shutdown = mpic_u3msi_mask_irq,
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.irq_mask = mpic_u3msi_mask_irq,
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.irq_unmask = mpic_u3msi_unmask_irq,
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.eoi = mpic_end_irq,
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.set_type = mpic_set_irq_type,
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.set_affinity = mpic_set_affinity,
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.irq_eoi = mpic_end_irq,
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.irq_set_type = mpic_set_irq_type,
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.irq_set_affinity = mpic_set_affinity,
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.name = "MPIC-U3MSI",
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};
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