mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-14 04:41:26 +00:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (27 commits) rtnetlink: propagate error from dev_change_flags in do_setlink() isdn: remove extra byteswap in isdn_net_ciscohdlck_slarp_send_reply Phonet: refuse to send bigger than MTU packets e1000e: fix IPMI traffic e1000e: fix warn_on reload after phy_id error phy: fix phy address bug e100: fix dma error in direction for mapping igb: use dev_printk instead of printk qla3xxx: Cleanup: Fix link print statements. igb: Use device_set_wakeup_enable e1000: Use device_set_wakeup_enable e1000e: Use device_set_wakeup_enable via-velocity: enable perfect filtering for multicast packets phy: Add support for Marvell 88E1118 PHY mlx4_en: Pause parameters per port phylib: fix premature freeing of struct mii_bus atl1: Do not enumerate options unsupported by chip atl1e: fix broken multicast by removing unnecessary crc inversion gianfar: Fix DMA unmap invocations net/ucc_geth: Fix oops in uec_get_ethtool_stats() ...
This commit is contained in:
commit
847e9170c7
@ -1641,8 +1641,10 @@ isdn_net_ciscohdlck_slarp_send_reply(isdn_net_local *lp)
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/* slarp reply, send own ip/netmask; if values are nonsense remote
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* should think we are unable to provide it with an address via SLARP */
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p += put_u32(p, CISCO_SLARP_REPLY);
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p += put_u32(p, addr); // address
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p += put_u32(p, mask); // netmask
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*(__be32 *)p = addr; // address
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p += 4;
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*(__be32 *)p = mask; // netmask
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p += 4;
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p += put_u16(p, 0); // unused
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isdn_net_write_super(lp, skb);
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|
@ -163,9 +163,6 @@ int atl1e_read_mac_addr(struct atl1e_hw *hw)
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* atl1e_hash_mc_addr
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* purpose
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* set hash value for a multicast address
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* hash calcu processing :
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* 1. calcu 32bit CRC for multicast address
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* 2. reverse crc with MSB to LSB
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*/
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u32 atl1e_hash_mc_addr(struct atl1e_hw *hw, u8 *mc_addr)
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{
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@ -174,7 +171,6 @@ u32 atl1e_hash_mc_addr(struct atl1e_hw *hw, u8 *mc_addr)
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int i;
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crc32 = ether_crc_le(6, mc_addr);
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crc32 = ~crc32;
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for (i = 0; i < 32; i++)
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value |= (((crc32 >> i) & 1) << (31 - i));
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@ -3404,14 +3404,8 @@ static void atl1_get_wol(struct net_device *netdev,
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{
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struct atl1_adapter *adapter = netdev_priv(netdev);
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wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
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wol->supported = WAKE_MAGIC;
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wol->wolopts = 0;
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if (adapter->wol & ATLX_WUFC_EX)
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wol->wolopts |= WAKE_UCAST;
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if (adapter->wol & ATLX_WUFC_MC)
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wol->wolopts |= WAKE_MCAST;
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if (adapter->wol & ATLX_WUFC_BC)
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wol->wolopts |= WAKE_BCAST;
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if (adapter->wol & ATLX_WUFC_MAG)
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wol->wolopts |= WAKE_MAGIC;
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return;
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@ -3422,15 +3416,10 @@ static int atl1_set_wol(struct net_device *netdev,
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{
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struct atl1_adapter *adapter = netdev_priv(netdev);
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if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
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if (wol->wolopts & (WAKE_PHY | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
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WAKE_ARP | WAKE_MAGICSECURE))
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return -EOPNOTSUPP;
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adapter->wol = 0;
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if (wol->wolopts & WAKE_UCAST)
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adapter->wol |= ATLX_WUFC_EX;
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if (wol->wolopts & WAKE_MCAST)
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adapter->wol |= ATLX_WUFC_MC;
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if (wol->wolopts & WAKE_BCAST)
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adapter->wol |= ATLX_WUFC_BC;
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if (wol->wolopts & WAKE_MAGIC)
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adapter->wol |= ATLX_WUFC_MAG;
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return 0;
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@ -166,7 +166,7 @@
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#define DRV_NAME "e100"
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#define DRV_EXT "-NAPI"
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#define DRV_VERSION "3.5.23-k4"DRV_EXT
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#define DRV_VERSION "3.5.23-k6"DRV_EXT
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#define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver"
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#define DRV_COPYRIGHT "Copyright(c) 1999-2006 Intel Corporation"
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#define PFX DRV_NAME ": "
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@ -1804,7 +1804,7 @@ static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
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struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data;
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put_unaligned_le32(rx->dma_addr, &prev_rfd->link);
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pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr,
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sizeof(struct rfd), PCI_DMA_TODEVICE);
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sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL);
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}
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return 0;
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@ -1823,7 +1823,7 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
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/* Need to sync before taking a peek at cb_complete bit */
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pci_dma_sync_single_for_cpu(nic->pdev, rx->dma_addr,
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sizeof(struct rfd), PCI_DMA_FROMDEVICE);
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sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL);
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rfd_status = le16_to_cpu(rfd->status);
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DPRINTK(RX_STATUS, DEBUG, "status=0x%04X\n", rfd_status);
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@ -1850,7 +1850,7 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
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/* Get data */
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pci_unmap_single(nic->pdev, rx->dma_addr,
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RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
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RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
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/* If this buffer has the el bit, but we think the receiver
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* is still running, check to see if it really stopped while
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@ -1943,7 +1943,7 @@ static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
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new_before_last_rfd->command |= cpu_to_le16(cb_el);
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pci_dma_sync_single_for_device(nic->pdev,
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new_before_last_rx->dma_addr, sizeof(struct rfd),
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PCI_DMA_TODEVICE);
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PCI_DMA_BIDIRECTIONAL);
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/* Now that we have a new stopping point, we can clear the old
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* stopping point. We must sync twice to get the proper
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@ -1951,11 +1951,11 @@ static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
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old_before_last_rfd->command &= ~cpu_to_le16(cb_el);
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pci_dma_sync_single_for_device(nic->pdev,
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old_before_last_rx->dma_addr, sizeof(struct rfd),
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PCI_DMA_TODEVICE);
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PCI_DMA_BIDIRECTIONAL);
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old_before_last_rfd->size = cpu_to_le16(VLAN_ETH_FRAME_LEN);
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pci_dma_sync_single_for_device(nic->pdev,
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old_before_last_rx->dma_addr, sizeof(struct rfd),
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PCI_DMA_TODEVICE);
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PCI_DMA_BIDIRECTIONAL);
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}
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if(restart_required) {
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@ -1978,7 +1978,7 @@ static void e100_rx_clean_list(struct nic *nic)
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for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
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if(rx->skb) {
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pci_unmap_single(nic->pdev, rx->dma_addr,
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RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
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RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
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dev_kfree_skb(rx->skb);
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}
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}
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@ -2021,7 +2021,7 @@ static int e100_rx_alloc_list(struct nic *nic)
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before_last->command |= cpu_to_le16(cb_el);
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before_last->size = 0;
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pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr,
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sizeof(struct rfd), PCI_DMA_TODEVICE);
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sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL);
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nic->rx_to_use = nic->rx_to_clean = nic->rxs;
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nic->ru_running = RU_SUSPENDED;
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@ -2222,7 +2222,7 @@ static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
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msleep(10);
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pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr,
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RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
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RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
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if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
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skb->data, ETH_DATA_LEN))
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|
@ -1774,7 +1774,8 @@ static void e1000_get_wol(struct net_device *netdev,
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/* this function will set ->supported = 0 and return 1 if wol is not
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* supported by this hardware */
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if (e1000_wol_exclusion(adapter, wol))
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if (e1000_wol_exclusion(adapter, wol) ||
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!device_can_wakeup(&adapter->pdev->dev))
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return;
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/* apply any specific unsupported masks here */
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@ -1811,7 +1812,8 @@ static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
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if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
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return -EOPNOTSUPP;
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if (e1000_wol_exclusion(adapter, wol))
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if (e1000_wol_exclusion(adapter, wol) ||
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!device_can_wakeup(&adapter->pdev->dev))
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return wol->wolopts ? -EOPNOTSUPP : 0;
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switch (hw->device_id) {
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@ -1838,6 +1840,8 @@ static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
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if (wol->wolopts & WAKE_MAGIC)
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adapter->wol |= E1000_WUFC_MAG;
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device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
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return 0;
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}
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||||
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||||
|
@ -1179,6 +1179,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
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|
||||
/* initialize the wol settings based on the eeprom settings */
|
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adapter->wol = adapter->eeprom_wol;
|
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device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
||||
|
||||
/* print bus type/speed/width info */
|
||||
DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
|
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|
@ -299,6 +299,7 @@ struct e1000_adapter {
|
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unsigned long led_status;
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|
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unsigned int flags;
|
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unsigned int flags2;
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struct work_struct downshift_task;
|
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struct work_struct update_phy_task;
|
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};
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@ -306,6 +307,7 @@ struct e1000_adapter {
|
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struct e1000_info {
|
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enum e1000_mac_type mac;
|
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unsigned int flags;
|
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unsigned int flags2;
|
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u32 pba;
|
||||
s32 (*get_variants)(struct e1000_adapter *);
|
||||
struct e1000_mac_operations *mac_ops;
|
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@ -347,6 +349,9 @@ struct e1000_info {
|
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#define FLAG_RX_RESTART_NOW (1 << 30)
|
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#define FLAG_MSI_TEST_FAILED (1 << 31)
|
||||
|
||||
/* CRC Stripping defines */
|
||||
#define FLAG2_CRC_STRIPPING (1 << 0)
|
||||
|
||||
#define E1000_RX_DESC_PS(R, i) \
|
||||
(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
|
||||
#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
|
||||
|
@ -1713,7 +1713,8 @@ static void e1000_get_wol(struct net_device *netdev,
|
||||
wol->supported = 0;
|
||||
wol->wolopts = 0;
|
||||
|
||||
if (!(adapter->flags & FLAG_HAS_WOL))
|
||||
if (!(adapter->flags & FLAG_HAS_WOL) ||
|
||||
!device_can_wakeup(&adapter->pdev->dev))
|
||||
return;
|
||||
|
||||
wol->supported = WAKE_UCAST | WAKE_MCAST |
|
||||
@ -1751,7 +1752,8 @@ static int e1000_set_wol(struct net_device *netdev,
|
||||
if (wol->wolopts & WAKE_MAGICSECURE)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (!(adapter->flags & FLAG_HAS_WOL))
|
||||
if (!(adapter->flags & FLAG_HAS_WOL) ||
|
||||
!device_can_wakeup(&adapter->pdev->dev))
|
||||
return wol->wolopts ? -EOPNOTSUPP : 0;
|
||||
|
||||
/* these settings will always override what we currently have */
|
||||
@ -1770,6 +1772,8 @@ static int e1000_set_wol(struct net_device *netdev,
|
||||
if (wol->wolopts & WAKE_ARP)
|
||||
adapter->wol |= E1000_WUFC_ARP;
|
||||
|
||||
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -499,6 +499,10 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
|
||||
goto next_desc;
|
||||
}
|
||||
|
||||
/* adjust length to remove Ethernet CRC */
|
||||
if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
|
||||
length -= 4;
|
||||
|
||||
total_rx_bytes += length;
|
||||
total_rx_packets++;
|
||||
|
||||
@ -804,6 +808,10 @@ static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
|
||||
pci_dma_sync_single_for_device(pdev, ps_page->dma,
|
||||
PAGE_SIZE, PCI_DMA_FROMDEVICE);
|
||||
|
||||
/* remove the CRC */
|
||||
if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
|
||||
l1 -= 4;
|
||||
|
||||
skb_put(skb, l1);
|
||||
goto copydone;
|
||||
} /* if */
|
||||
@ -825,6 +833,12 @@ static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
|
||||
skb->truesize += length;
|
||||
}
|
||||
|
||||
/* strip the ethernet crc, problem is we're using pages now so
|
||||
* this whole operation can get a little cpu intensive
|
||||
*/
|
||||
if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
|
||||
pskb_trim(skb, skb->len - 4);
|
||||
|
||||
copydone:
|
||||
total_rx_bytes += skb->len;
|
||||
total_rx_packets++;
|
||||
@ -2301,7 +2315,11 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
|
||||
else
|
||||
rctl |= E1000_RCTL_LPE;
|
||||
|
||||
/* Enable hardware CRC frame stripping */
|
||||
/* Some systems expect that the CRC is included in SMBUS traffic. The
|
||||
* hardware strips the CRC before sending to both SMBUS (BMC) and to
|
||||
* host memory when this is enabled
|
||||
*/
|
||||
if (adapter->flags2 & FLAG2_CRC_STRIPPING)
|
||||
rctl |= E1000_RCTL_SECRC;
|
||||
|
||||
/* Setup buffer sizes */
|
||||
@ -4766,6 +4784,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
|
||||
adapter->ei = ei;
|
||||
adapter->pba = ei->pba;
|
||||
adapter->flags = ei->flags;
|
||||
adapter->flags2 = ei->flags2;
|
||||
adapter->hw.adapter = adapter;
|
||||
adapter->hw.mac.type = ei->mac;
|
||||
adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
|
||||
@ -4970,6 +4989,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
|
||||
|
||||
/* initialize the wol settings based on the eeprom settings */
|
||||
adapter->wol = adapter->eeprom_wol;
|
||||
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
||||
|
||||
/* reset the hardware with the new settings */
|
||||
e1000e_reset(adapter);
|
||||
@ -5008,6 +5028,7 @@ err_hw_init:
|
||||
err_sw_init:
|
||||
if (adapter->hw.flash_address)
|
||||
iounmap(adapter->hw.flash_address);
|
||||
e1000e_reset_interrupt_capability(adapter);
|
||||
err_flashmap:
|
||||
iounmap(adapter->hw.hw_addr);
|
||||
err_ioremap:
|
||||
|
@ -151,6 +151,16 @@ E1000_PARAM(KumeranLockLoss, "Enable Kumeran lock loss workaround");
|
||||
*/
|
||||
E1000_PARAM(WriteProtectNVM, "Write-protect NVM [WARNING: disabling this can lead to corrupted NVM]");
|
||||
|
||||
/*
|
||||
* Enable CRC Stripping
|
||||
*
|
||||
* Valid Range: 0, 1
|
||||
*
|
||||
* Default Value: 1 (enabled)
|
||||
*/
|
||||
E1000_PARAM(CrcStripping, "Enable CRC Stripping, disable if your BMC needs " \
|
||||
"the CRC");
|
||||
|
||||
struct e1000_option {
|
||||
enum { enable_option, range_option, list_option } type;
|
||||
const char *name;
|
||||
@ -404,6 +414,21 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
|
||||
adapter->flags |= FLAG_SMART_POWER_DOWN;
|
||||
}
|
||||
}
|
||||
{ /* CRC Stripping */
|
||||
const struct e1000_option opt = {
|
||||
.type = enable_option,
|
||||
.name = "CRC Stripping",
|
||||
.err = "defaulting to enabled",
|
||||
.def = OPTION_ENABLED
|
||||
};
|
||||
|
||||
if (num_CrcStripping > bd) {
|
||||
unsigned int crc_stripping = CrcStripping[bd];
|
||||
e1000_validate_option(&crc_stripping, &opt, adapter);
|
||||
if (crc_stripping == OPTION_ENABLED)
|
||||
adapter->flags2 |= FLAG2_CRC_STRIPPING;
|
||||
}
|
||||
}
|
||||
{ /* Kumeran Lock Loss Workaround */
|
||||
const struct e1000_option opt = {
|
||||
.type = enable_option,
|
||||
|
@ -1407,6 +1407,10 @@ static int gfar_clean_tx_ring(struct net_device *dev)
|
||||
if (bdp->status & TXBD_DEF)
|
||||
dev->stats.collisions++;
|
||||
|
||||
/* Unmap the DMA memory */
|
||||
dma_unmap_single(&priv->dev->dev, bdp->bufPtr,
|
||||
bdp->length, DMA_TO_DEVICE);
|
||||
|
||||
/* Free the sk buffer associated with this TxBD */
|
||||
dev_kfree_skb_irq(priv->tx_skbuff[priv->skb_dirtytx]);
|
||||
|
||||
@ -1666,6 +1670,9 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
|
||||
|
||||
skb = priv->rx_skbuff[priv->skb_currx];
|
||||
|
||||
dma_unmap_single(&priv->dev->dev, bdp->bufPtr,
|
||||
priv->rx_buffer_size, DMA_FROM_DEVICE);
|
||||
|
||||
/* We drop the frame if we failed to allocate a new buffer */
|
||||
if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
|
||||
bdp->status & RXBD_ERR)) {
|
||||
@ -1674,14 +1681,8 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
|
||||
if (unlikely(!newskb))
|
||||
newskb = skb;
|
||||
|
||||
if (skb) {
|
||||
dma_unmap_single(&priv->dev->dev,
|
||||
bdp->bufPtr,
|
||||
priv->rx_buffer_size,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
if (skb)
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
} else {
|
||||
/* Increment the number of packets */
|
||||
dev->stats.rx_packets++;
|
||||
|
@ -1776,7 +1776,8 @@ static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
|
||||
|
||||
/* this function will set ->supported = 0 and return 1 if wol is not
|
||||
* supported by this hardware */
|
||||
if (igb_wol_exclusion(adapter, wol))
|
||||
if (igb_wol_exclusion(adapter, wol) ||
|
||||
!device_can_wakeup(&adapter->pdev->dev))
|
||||
return;
|
||||
|
||||
/* apply any specific unsupported masks here */
|
||||
@ -1805,7 +1806,8 @@ static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
|
||||
if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (igb_wol_exclusion(adapter, wol))
|
||||
if (igb_wol_exclusion(adapter, wol) ||
|
||||
!device_can_wakeup(&adapter->pdev->dev))
|
||||
return wol->wolopts ? -EOPNOTSUPP : 0;
|
||||
|
||||
switch (hw->device_id) {
|
||||
@ -1825,6 +1827,8 @@ static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
|
||||
if (wol->wolopts & WAKE_MAGIC)
|
||||
adapter->wol |= E1000_WUFC_MAG;
|
||||
|
||||
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1019,10 +1019,9 @@ static int __devinit igb_probe(struct pci_dev *pdev,
|
||||
state &= ~PCIE_LINK_STATE_L0S;
|
||||
pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
|
||||
state);
|
||||
printk(KERN_INFO "Disabling ASPM L0s upstream switch "
|
||||
"port %x:%x.%x\n", us_dev->bus->number,
|
||||
PCI_SLOT(us_dev->devfn),
|
||||
PCI_FUNC(us_dev->devfn));
|
||||
dev_info(&pdev->dev,
|
||||
"Disabling ASPM L0s upstream switch port %s\n",
|
||||
pci_name(us_dev));
|
||||
}
|
||||
default:
|
||||
break;
|
||||
@ -1244,6 +1243,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
|
||||
|
||||
/* initialize the wol settings based on the eeprom settings */
|
||||
adapter->wol = adapter->eeprom_wol;
|
||||
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
||||
|
||||
/* reset the hardware with the new settings */
|
||||
igb_reset(adapter);
|
||||
|
@ -656,10 +656,10 @@ static int mlx4_en_start_port(struct net_device *dev)
|
||||
/* Configure port */
|
||||
err = mlx4_SET_PORT_general(mdev->dev, priv->port,
|
||||
priv->rx_skb_size + ETH_FCS_LEN,
|
||||
mdev->profile.tx_pause,
|
||||
mdev->profile.tx_ppp,
|
||||
mdev->profile.rx_pause,
|
||||
mdev->profile.rx_ppp);
|
||||
priv->prof->tx_pause,
|
||||
priv->prof->tx_ppp,
|
||||
priv->prof->rx_pause,
|
||||
priv->prof->rx_ppp);
|
||||
if (err) {
|
||||
mlx4_err(mdev, "Failed setting port general configurations"
|
||||
" for port %d, with error %d\n", priv->port, err);
|
||||
|
@ -90,6 +90,7 @@ MLX4_EN_PARM_INT(rx_ring_size2, MLX4_EN_AUTO_CONF, "Rx ring size for port 2");
|
||||
int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
|
||||
{
|
||||
struct mlx4_en_profile *params = &mdev->profile;
|
||||
int i;
|
||||
|
||||
params->rx_moder_cnt = min_t(int, rx_moder_cnt, MLX4_EN_AUTO_CONF);
|
||||
params->rx_moder_time = min_t(int, rx_moder_time, MLX4_EN_AUTO_CONF);
|
||||
@ -97,11 +98,13 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
|
||||
params->rss_xor = (rss_xor != 0);
|
||||
params->rss_mask = rss_mask & 0x1f;
|
||||
params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS);
|
||||
params->rx_pause = pprx;
|
||||
params->rx_ppp = pfcrx;
|
||||
params->tx_pause = pptx;
|
||||
params->tx_ppp = pfctx;
|
||||
if (params->rx_ppp || params->tx_ppp) {
|
||||
for (i = 1; i <= MLX4_MAX_PORTS; i++) {
|
||||
params->prof[i].rx_pause = pprx;
|
||||
params->prof[i].rx_ppp = pfcrx;
|
||||
params->prof[i].tx_pause = pptx;
|
||||
params->prof[i].tx_ppp = pfctx;
|
||||
}
|
||||
if (pfcrx || pfctx) {
|
||||
params->prof[1].tx_ring_num = MLX4_EN_TX_RING_NUM;
|
||||
params->prof[2].tx_ring_num = MLX4_EN_TX_RING_NUM;
|
||||
} else {
|
||||
@ -407,14 +410,14 @@ static int mlx4_en_set_pauseparam(struct net_device *dev,
|
||||
struct mlx4_en_dev *mdev = priv->mdev;
|
||||
int err;
|
||||
|
||||
mdev->profile.tx_pause = pause->tx_pause != 0;
|
||||
mdev->profile.rx_pause = pause->rx_pause != 0;
|
||||
priv->prof->tx_pause = pause->tx_pause != 0;
|
||||
priv->prof->rx_pause = pause->rx_pause != 0;
|
||||
err = mlx4_SET_PORT_general(mdev->dev, priv->port,
|
||||
priv->rx_skb_size + ETH_FCS_LEN,
|
||||
mdev->profile.tx_pause,
|
||||
mdev->profile.tx_ppp,
|
||||
mdev->profile.rx_pause,
|
||||
mdev->profile.rx_ppp);
|
||||
priv->prof->tx_pause,
|
||||
priv->prof->tx_ppp,
|
||||
priv->prof->rx_pause,
|
||||
priv->prof->rx_ppp);
|
||||
if (err)
|
||||
mlx4_err(mdev, "Failed setting pause params to\n");
|
||||
|
||||
@ -425,10 +428,9 @@ static void mlx4_en_get_pauseparam(struct net_device *dev,
|
||||
struct ethtool_pauseparam *pause)
|
||||
{
|
||||
struct mlx4_en_priv *priv = netdev_priv(dev);
|
||||
struct mlx4_en_dev *mdev = priv->mdev;
|
||||
|
||||
pause->tx_pause = mdev->profile.tx_pause;
|
||||
pause->rx_pause = mdev->profile.rx_pause;
|
||||
pause->tx_pause = priv->prof->tx_pause;
|
||||
pause->rx_pause = priv->prof->rx_pause;
|
||||
}
|
||||
|
||||
static void mlx4_en_get_ringparam(struct net_device *dev,
|
||||
|
@ -322,6 +322,10 @@ struct mlx4_en_port_profile {
|
||||
u32 rx_ring_num;
|
||||
u32 tx_ring_size;
|
||||
u32 rx_ring_size;
|
||||
u8 rx_pause;
|
||||
u8 rx_ppp;
|
||||
u8 tx_pause;
|
||||
u8 tx_ppp;
|
||||
};
|
||||
|
||||
struct mlx4_en_profile {
|
||||
@ -333,10 +337,6 @@ struct mlx4_en_profile {
|
||||
int rx_moder_cnt;
|
||||
int rx_moder_time;
|
||||
int auto_moder;
|
||||
u8 rx_pause;
|
||||
u8 rx_ppp;
|
||||
u8 tx_pause;
|
||||
u8 tx_ppp;
|
||||
u8 no_reset;
|
||||
struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];
|
||||
};
|
||||
|
@ -33,8 +33,8 @@
|
||||
|
||||
#define DRV_MODULE_NAME "niu"
|
||||
#define PFX DRV_MODULE_NAME ": "
|
||||
#define DRV_MODULE_VERSION "0.9"
|
||||
#define DRV_MODULE_RELDATE "May 4, 2008"
|
||||
#define DRV_MODULE_VERSION "1.0"
|
||||
#define DRV_MODULE_RELDATE "Nov 14, 2008"
|
||||
|
||||
static char version[] __devinitdata =
|
||||
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
|
||||
@ -406,7 +406,7 @@ static int esr2_set_rx_cfg(struct niu *np, unsigned long channel, u32 val)
|
||||
}
|
||||
|
||||
/* Mode is always 10G fiber. */
|
||||
static int serdes_init_niu(struct niu *np)
|
||||
static int serdes_init_niu_10g_fiber(struct niu *np)
|
||||
{
|
||||
struct niu_link_config *lp = &np->link_config;
|
||||
u32 tx_cfg, rx_cfg;
|
||||
@ -443,6 +443,223 @@ static int serdes_init_niu(struct niu *np)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int serdes_init_niu_1g_serdes(struct niu *np)
|
||||
{
|
||||
struct niu_link_config *lp = &np->link_config;
|
||||
u16 pll_cfg, pll_sts;
|
||||
int max_retry = 100;
|
||||
u64 sig, mask, val;
|
||||
u32 tx_cfg, rx_cfg;
|
||||
unsigned long i;
|
||||
int err;
|
||||
|
||||
tx_cfg = (PLL_TX_CFG_ENTX | PLL_TX_CFG_SWING_1375MV |
|
||||
PLL_TX_CFG_RATE_HALF);
|
||||
rx_cfg = (PLL_RX_CFG_ENRX | PLL_RX_CFG_TERM_0P8VDDT |
|
||||
PLL_RX_CFG_ALIGN_ENA | PLL_RX_CFG_LOS_LTHRESH |
|
||||
PLL_RX_CFG_RATE_HALF);
|
||||
|
||||
if (np->port == 0)
|
||||
rx_cfg |= PLL_RX_CFG_EQ_LP_ADAPTIVE;
|
||||
|
||||
if (lp->loopback_mode == LOOPBACK_PHY) {
|
||||
u16 test_cfg = PLL_TEST_CFG_LOOPBACK_CML_DIS;
|
||||
|
||||
mdio_write(np, np->port, NIU_ESR2_DEV_ADDR,
|
||||
ESR2_TI_PLL_TEST_CFG_L, test_cfg);
|
||||
|
||||
tx_cfg |= PLL_TX_CFG_ENTEST;
|
||||
rx_cfg |= PLL_RX_CFG_ENTEST;
|
||||
}
|
||||
|
||||
/* Initialize PLL for 1G */
|
||||
pll_cfg = (PLL_CFG_ENPLL | PLL_CFG_MPY_8X);
|
||||
|
||||
err = mdio_write(np, np->port, NIU_ESR2_DEV_ADDR,
|
||||
ESR2_TI_PLL_CFG_L, pll_cfg);
|
||||
if (err) {
|
||||
dev_err(np->device, PFX "NIU Port %d "
|
||||
"serdes_init_niu_1g_serdes: "
|
||||
"mdio write to ESR2_TI_PLL_CFG_L failed", np->port);
|
||||
return err;
|
||||
}
|
||||
|
||||
pll_sts = PLL_CFG_ENPLL;
|
||||
|
||||
err = mdio_write(np, np->port, NIU_ESR2_DEV_ADDR,
|
||||
ESR2_TI_PLL_STS_L, pll_sts);
|
||||
if (err) {
|
||||
dev_err(np->device, PFX "NIU Port %d "
|
||||
"serdes_init_niu_1g_serdes: "
|
||||
"mdio write to ESR2_TI_PLL_STS_L failed", np->port);
|
||||
return err;
|
||||
}
|
||||
|
||||
udelay(200);
|
||||
|
||||
/* Initialize all 4 lanes of the SERDES. */
|
||||
for (i = 0; i < 4; i++) {
|
||||
err = esr2_set_tx_cfg(np, i, tx_cfg);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
err = esr2_set_rx_cfg(np, i, rx_cfg);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
switch (np->port) {
|
||||
case 0:
|
||||
val = (ESR_INT_SRDY0_P0 | ESR_INT_DET0_P0);
|
||||
mask = val;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
val = (ESR_INT_SRDY0_P1 | ESR_INT_DET0_P1);
|
||||
mask = val;
|
||||
break;
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
while (max_retry--) {
|
||||
sig = nr64(ESR_INT_SIGNALS);
|
||||
if ((sig & mask) == val)
|
||||
break;
|
||||
|
||||
mdelay(500);
|
||||
}
|
||||
|
||||
if ((sig & mask) != val) {
|
||||
dev_err(np->device, PFX "Port %u signal bits [%08x] are not "
|
||||
"[%08x]\n", np->port, (int) (sig & mask), (int) val);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int serdes_init_niu_10g_serdes(struct niu *np)
|
||||
{
|
||||
struct niu_link_config *lp = &np->link_config;
|
||||
u32 tx_cfg, rx_cfg, pll_cfg, pll_sts;
|
||||
int max_retry = 100;
|
||||
u64 sig, mask, val;
|
||||
unsigned long i;
|
||||
int err;
|
||||
|
||||
tx_cfg = (PLL_TX_CFG_ENTX | PLL_TX_CFG_SWING_1375MV);
|
||||
rx_cfg = (PLL_RX_CFG_ENRX | PLL_RX_CFG_TERM_0P8VDDT |
|
||||
PLL_RX_CFG_ALIGN_ENA | PLL_RX_CFG_LOS_LTHRESH |
|
||||
PLL_RX_CFG_EQ_LP_ADAPTIVE);
|
||||
|
||||
if (lp->loopback_mode == LOOPBACK_PHY) {
|
||||
u16 test_cfg = PLL_TEST_CFG_LOOPBACK_CML_DIS;
|
||||
|
||||
mdio_write(np, np->port, NIU_ESR2_DEV_ADDR,
|
||||
ESR2_TI_PLL_TEST_CFG_L, test_cfg);
|
||||
|
||||
tx_cfg |= PLL_TX_CFG_ENTEST;
|
||||
rx_cfg |= PLL_RX_CFG_ENTEST;
|
||||
}
|
||||
|
||||
/* Initialize PLL for 10G */
|
||||
pll_cfg = (PLL_CFG_ENPLL | PLL_CFG_MPY_10X);
|
||||
|
||||
err = mdio_write(np, np->port, NIU_ESR2_DEV_ADDR,
|
||||
ESR2_TI_PLL_CFG_L, pll_cfg & 0xffff);
|
||||
if (err) {
|
||||
dev_err(np->device, PFX "NIU Port %d "
|
||||
"serdes_init_niu_10g_serdes: "
|
||||
"mdio write to ESR2_TI_PLL_CFG_L failed", np->port);
|
||||
return err;
|
||||
}
|
||||
|
||||
pll_sts = PLL_CFG_ENPLL;
|
||||
|
||||
err = mdio_write(np, np->port, NIU_ESR2_DEV_ADDR,
|
||||
ESR2_TI_PLL_STS_L, pll_sts & 0xffff);
|
||||
if (err) {
|
||||
dev_err(np->device, PFX "NIU Port %d "
|
||||
"serdes_init_niu_10g_serdes: "
|
||||
"mdio write to ESR2_TI_PLL_STS_L failed", np->port);
|
||||
return err;
|
||||
}
|
||||
|
||||
udelay(200);
|
||||
|
||||
/* Initialize all 4 lanes of the SERDES. */
|
||||
for (i = 0; i < 4; i++) {
|
||||
err = esr2_set_tx_cfg(np, i, tx_cfg);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
err = esr2_set_rx_cfg(np, i, rx_cfg);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
/* check if serdes is ready */
|
||||
|
||||
switch (np->port) {
|
||||
case 0:
|
||||
mask = ESR_INT_SIGNALS_P0_BITS;
|
||||
val = (ESR_INT_SRDY0_P0 |
|
||||
ESR_INT_DET0_P0 |
|
||||
ESR_INT_XSRDY_P0 |
|
||||
ESR_INT_XDP_P0_CH3 |
|
||||
ESR_INT_XDP_P0_CH2 |
|
||||
ESR_INT_XDP_P0_CH1 |
|
||||
ESR_INT_XDP_P0_CH0);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
mask = ESR_INT_SIGNALS_P1_BITS;
|
||||
val = (ESR_INT_SRDY0_P1 |
|
||||
ESR_INT_DET0_P1 |
|
||||
ESR_INT_XSRDY_P1 |
|
||||
ESR_INT_XDP_P1_CH3 |
|
||||
ESR_INT_XDP_P1_CH2 |
|
||||
ESR_INT_XDP_P1_CH1 |
|
||||
ESR_INT_XDP_P1_CH0);
|
||||
break;
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
while (max_retry--) {
|
||||
sig = nr64(ESR_INT_SIGNALS);
|
||||
if ((sig & mask) == val)
|
||||
break;
|
||||
|
||||
mdelay(500);
|
||||
}
|
||||
|
||||
if ((sig & mask) != val) {
|
||||
pr_info(PFX "NIU Port %u signal bits [%08x] are not "
|
||||
"[%08x] for 10G...trying 1G\n",
|
||||
np->port, (int) (sig & mask), (int) val);
|
||||
|
||||
/* 10G failed, try initializing at 1G */
|
||||
err = serdes_init_niu_1g_serdes(np);
|
||||
if (!err) {
|
||||
np->flags &= ~NIU_FLAGS_10G;
|
||||
np->mac_xcvr = MAC_XCVR_PCS;
|
||||
} else {
|
||||
dev_err(np->device, PFX "Port %u 10G/1G SERDES "
|
||||
"Link Failed \n", np->port);
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int esr_read_rxtx_ctrl(struct niu *np, unsigned long chan, u32 *val)
|
||||
{
|
||||
int err;
|
||||
@ -1954,13 +2171,23 @@ static const struct niu_phy_ops phy_ops_10g_serdes = {
|
||||
.link_status = link_status_10g_serdes,
|
||||
};
|
||||
|
||||
static const struct niu_phy_ops phy_ops_10g_serdes_niu = {
|
||||
.serdes_init = serdes_init_niu_10g_serdes,
|
||||
.link_status = link_status_10g_serdes,
|
||||
};
|
||||
|
||||
static const struct niu_phy_ops phy_ops_1g_serdes_niu = {
|
||||
.serdes_init = serdes_init_niu_1g_serdes,
|
||||
.link_status = link_status_1g_serdes,
|
||||
};
|
||||
|
||||
static const struct niu_phy_ops phy_ops_1g_rgmii = {
|
||||
.xcvr_init = xcvr_init_1g_rgmii,
|
||||
.link_status = link_status_1g_rgmii,
|
||||
};
|
||||
|
||||
static const struct niu_phy_ops phy_ops_10g_fiber_niu = {
|
||||
.serdes_init = serdes_init_niu,
|
||||
.serdes_init = serdes_init_niu_10g_fiber,
|
||||
.xcvr_init = xcvr_init_10g,
|
||||
.link_status = link_status_10g,
|
||||
};
|
||||
@ -1998,11 +2225,21 @@ struct niu_phy_template {
|
||||
u32 phy_addr_base;
|
||||
};
|
||||
|
||||
static const struct niu_phy_template phy_template_niu = {
|
||||
static const struct niu_phy_template phy_template_niu_10g_fiber = {
|
||||
.ops = &phy_ops_10g_fiber_niu,
|
||||
.phy_addr_base = 16,
|
||||
};
|
||||
|
||||
static const struct niu_phy_template phy_template_niu_10g_serdes = {
|
||||
.ops = &phy_ops_10g_serdes_niu,
|
||||
.phy_addr_base = 0,
|
||||
};
|
||||
|
||||
static const struct niu_phy_template phy_template_niu_1g_serdes = {
|
||||
.ops = &phy_ops_1g_serdes_niu,
|
||||
.phy_addr_base = 0,
|
||||
};
|
||||
|
||||
static const struct niu_phy_template phy_template_10g_fiber = {
|
||||
.ops = &phy_ops_10g_fiber,
|
||||
.phy_addr_base = 8,
|
||||
@ -2182,8 +2419,25 @@ static int niu_determine_phy_disposition(struct niu *np)
|
||||
u32 phy_addr_off = 0;
|
||||
|
||||
if (plat_type == PLAT_TYPE_NIU) {
|
||||
tp = &phy_template_niu;
|
||||
switch (np->flags &
|
||||
(NIU_FLAGS_10G |
|
||||
NIU_FLAGS_FIBER |
|
||||
NIU_FLAGS_XCVR_SERDES)) {
|
||||
case NIU_FLAGS_10G | NIU_FLAGS_XCVR_SERDES:
|
||||
/* 10G Serdes */
|
||||
tp = &phy_template_niu_10g_serdes;
|
||||
break;
|
||||
case NIU_FLAGS_XCVR_SERDES:
|
||||
/* 1G Serdes */
|
||||
tp = &phy_template_niu_1g_serdes;
|
||||
break;
|
||||
case NIU_FLAGS_10G | NIU_FLAGS_FIBER:
|
||||
/* 10G Fiber */
|
||||
default:
|
||||
tp = &phy_template_niu_10g_fiber;
|
||||
phy_addr_off += np->port;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
switch (np->flags &
|
||||
(NIU_FLAGS_10G |
|
||||
@ -7213,6 +7467,12 @@ static int __devinit niu_phy_type_prop_decode(struct niu *np,
|
||||
np->flags |= NIU_FLAGS_10G;
|
||||
np->flags &= ~NIU_FLAGS_FIBER;
|
||||
np->mac_xcvr = MAC_XCVR_XPCS;
|
||||
} else if (!strcmp(phy_prop, "xgsd") || !strcmp(phy_prop, "gsd")) {
|
||||
/* 10G Serdes or 1G Serdes, default to 10G */
|
||||
np->flags |= NIU_FLAGS_10G;
|
||||
np->flags &= ~NIU_FLAGS_FIBER;
|
||||
np->flags |= NIU_FLAGS_XCVR_SERDES;
|
||||
np->mac_xcvr = MAC_XCVR_XPCS;
|
||||
} else {
|
||||
return -EINVAL;
|
||||
}
|
||||
@ -7741,6 +8001,8 @@ static int __devinit walk_phys(struct niu *np, struct niu_parent *parent)
|
||||
u32 val;
|
||||
int err;
|
||||
|
||||
num_10g = num_1g = 0;
|
||||
|
||||
if (!strcmp(np->vpd.model, NIU_ALONSO_MDL_STR) ||
|
||||
!strcmp(np->vpd.model, NIU_KIMI_MDL_STR)) {
|
||||
num_10g = 0;
|
||||
@ -7757,6 +8019,16 @@ static int __devinit walk_phys(struct niu *np, struct niu_parent *parent)
|
||||
parent->num_ports = 2;
|
||||
val = (phy_encode(PORT_TYPE_10G, 0) |
|
||||
phy_encode(PORT_TYPE_10G, 1));
|
||||
} else if ((np->flags & NIU_FLAGS_XCVR_SERDES) &&
|
||||
(parent->plat_type == PLAT_TYPE_NIU)) {
|
||||
/* this is the Monza case */
|
||||
if (np->flags & NIU_FLAGS_10G) {
|
||||
val = (phy_encode(PORT_TYPE_10G, 0) |
|
||||
phy_encode(PORT_TYPE_10G, 1));
|
||||
} else {
|
||||
val = (phy_encode(PORT_TYPE_1G, 0) |
|
||||
phy_encode(PORT_TYPE_1G, 1));
|
||||
}
|
||||
} else {
|
||||
err = fill_phy_probe_info(np, parent, info);
|
||||
if (err)
|
||||
@ -8656,7 +8928,9 @@ static void __devinit niu_device_announce(struct niu *np)
|
||||
dev->name,
|
||||
(np->flags & NIU_FLAGS_XMAC ? "XMAC" : "BMAC"),
|
||||
(np->flags & NIU_FLAGS_10G ? "10G" : "1G"),
|
||||
(np->flags & NIU_FLAGS_FIBER ? "FIBER" : "COPPER"),
|
||||
(np->flags & NIU_FLAGS_FIBER ? "FIBER" :
|
||||
(np->flags & NIU_FLAGS_XCVR_SERDES ? "SERDES" :
|
||||
"COPPER")),
|
||||
(np->mac_xcvr == MAC_XCVR_MII ? "MII" :
|
||||
(np->mac_xcvr == MAC_XCVR_PCS ? "PCS" : "XPCS")),
|
||||
np->vpd.phy_type);
|
||||
|
@ -1048,6 +1048,13 @@
|
||||
#define PLL_CFG_LD_SHIFT 8
|
||||
#define PLL_CFG_MPY 0x0000001e
|
||||
#define PLL_CFG_MPY_SHIFT 1
|
||||
#define PLL_CFG_MPY_4X 0x0
|
||||
#define PLL_CFG_MPY_5X 0x00000002
|
||||
#define PLL_CFG_MPY_6X 0x00000004
|
||||
#define PLL_CFG_MPY_8X 0x00000008
|
||||
#define PLL_CFG_MPY_10X 0x0000000a
|
||||
#define PLL_CFG_MPY_12X 0x0000000c
|
||||
#define PLL_CFG_MPY_12P5X 0x0000000e
|
||||
#define PLL_CFG_ENPLL 0x00000001
|
||||
|
||||
#define ESR2_TI_PLL_STS_L (ESR2_BASE + 0x002)
|
||||
@ -1093,6 +1100,9 @@
|
||||
#define PLL_TX_CFG_INVPAIR 0x00000080
|
||||
#define PLL_TX_CFG_RATE 0x00000060
|
||||
#define PLL_TX_CFG_RATE_SHIFT 5
|
||||
#define PLL_TX_CFG_RATE_FULL 0x0
|
||||
#define PLL_TX_CFG_RATE_HALF 0x20
|
||||
#define PLL_TX_CFG_RATE_QUAD 0x40
|
||||
#define PLL_TX_CFG_BUSWIDTH 0x0000001c
|
||||
#define PLL_TX_CFG_BUSWIDTH_SHIFT 2
|
||||
#define PLL_TX_CFG_ENTEST 0x00000002
|
||||
@ -1132,6 +1142,9 @@
|
||||
#define PLL_RX_CFG_INVPAIR 0x00000080
|
||||
#define PLL_RX_CFG_RATE 0x00000060
|
||||
#define PLL_RX_CFG_RATE_SHIFT 5
|
||||
#define PLL_RX_CFG_RATE_FULL 0x0
|
||||
#define PLL_RX_CFG_RATE_HALF 0x20
|
||||
#define PLL_RX_CFG_RATE_QUAD 0x40
|
||||
#define PLL_RX_CFG_BUSWIDTH 0x0000001c
|
||||
#define PLL_RX_CFG_BUSWIDTH_SHIFT 2
|
||||
#define PLL_RX_CFG_ENTEST 0x00000002
|
||||
|
@ -227,6 +227,59 @@ static int m88e1111_config_init(struct phy_device *phydev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m88e1118_config_aneg(struct phy_device *phydev)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = phy_write(phydev, MII_BMCR, BMCR_RESET);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = phy_write(phydev, MII_M1011_PHY_SCR,
|
||||
MII_M1011_PHY_SCR_AUTO_CROSS);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = genphy_config_aneg(phydev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m88e1118_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int err;
|
||||
|
||||
/* Change address */
|
||||
err = phy_write(phydev, 0x16, 0x0002);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Enable 1000 Mbit */
|
||||
err = phy_write(phydev, 0x15, 0x1070);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Change address */
|
||||
err = phy_write(phydev, 0x16, 0x0003);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Adjust LED Control */
|
||||
err = phy_write(phydev, 0x10, 0x021e);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Reset address */
|
||||
err = phy_write(phydev, 0x16, 0x0);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = phy_write(phydev, MII_BMCR, BMCR_RESET);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m88e1145_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int err;
|
||||
@ -415,6 +468,19 @@ static struct phy_driver marvell_drivers[] = {
|
||||
.config_intr = &marvell_config_intr,
|
||||
.driver = { .owner = THIS_MODULE },
|
||||
},
|
||||
{
|
||||
.phy_id = 0x01410e10,
|
||||
.phy_id_mask = 0xfffffff0,
|
||||
.name = "Marvell 88E1118",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.flags = PHY_HAS_INTERRUPT,
|
||||
.config_init = &m88e1118_config_init,
|
||||
.config_aneg = &m88e1118_config_aneg,
|
||||
.read_status = &genphy_read_status,
|
||||
.ack_interrupt = &marvell_ack_interrupt,
|
||||
.config_intr = &marvell_config_intr,
|
||||
.driver = {.owner = THIS_MODULE,},
|
||||
},
|
||||
{
|
||||
.phy_id = 0x01410cd0,
|
||||
.phy_id_mask = 0xfffffff0,
|
||||
|
@ -136,7 +136,7 @@ void mdiobus_unregister(struct mii_bus *bus)
|
||||
BUG_ON(bus->state != MDIOBUS_REGISTERED);
|
||||
bus->state = MDIOBUS_UNREGISTERED;
|
||||
|
||||
device_unregister(&bus->dev);
|
||||
device_del(&bus->dev);
|
||||
for (i = 0; i < PHY_MAX_ADDR; i++) {
|
||||
if (bus->phy_map[i])
|
||||
device_unregister(&bus->phy_map[i]->dev);
|
||||
|
@ -227,8 +227,8 @@ struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
|
||||
if (r)
|
||||
return ERR_PTR(r);
|
||||
|
||||
/* If the phy_id is all Fs, there is no device there */
|
||||
if (0xffffffff == phy_id)
|
||||
/* If the phy_id is all Fs or all 0s, there is no device there */
|
||||
if ((0xffff == phy_id) || (0x00 == phy_id))
|
||||
return NULL;
|
||||
|
||||
dev = phy_device_create(bus, addr, phy_id);
|
||||
|
@ -1515,9 +1515,6 @@ static u32 ql_get_link_state(struct ql3_adapter *qdev)
|
||||
linkState = LS_UP;
|
||||
} else {
|
||||
linkState = LS_DOWN;
|
||||
if (netif_msg_link(qdev))
|
||||
printk(KERN_WARNING PFX
|
||||
"%s: Link is down.\n", qdev->ndev->name);
|
||||
}
|
||||
return linkState;
|
||||
}
|
||||
@ -1581,10 +1578,6 @@ static int ql_finish_auto_neg(struct ql3_adapter *qdev)
|
||||
ql_mac_enable(qdev, 1);
|
||||
}
|
||||
|
||||
if (netif_msg_link(qdev))
|
||||
printk(KERN_DEBUG PFX
|
||||
"%s: Change port_link_state LS_DOWN to LS_UP.\n",
|
||||
qdev->ndev->name);
|
||||
qdev->port_link_state = LS_UP;
|
||||
netif_start_queue(qdev->ndev);
|
||||
netif_carrier_on(qdev->ndev);
|
||||
@ -1655,14 +1648,9 @@ static void ql_link_state_machine_work(struct work_struct *work)
|
||||
/* Fall Through */
|
||||
|
||||
case LS_DOWN:
|
||||
if (netif_msg_link(qdev))
|
||||
printk(KERN_DEBUG PFX
|
||||
"%s: port_link_state = LS_DOWN.\n",
|
||||
qdev->ndev->name);
|
||||
if (curr_link_state == LS_UP) {
|
||||
if (netif_msg_link(qdev))
|
||||
printk(KERN_DEBUG PFX
|
||||
"%s: curr_link_state = LS_UP.\n",
|
||||
printk(KERN_INFO PFX "%s: Link is up.\n",
|
||||
qdev->ndev->name);
|
||||
if (ql_is_auto_neg_complete(qdev))
|
||||
ql_finish_auto_neg(qdev);
|
||||
@ -1670,6 +1658,7 @@ static void ql_link_state_machine_work(struct work_struct *work)
|
||||
if (qdev->port_link_state == LS_UP)
|
||||
ql_link_down_detect_clear(qdev);
|
||||
|
||||
qdev->port_link_state = LS_UP;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -1678,12 +1667,14 @@ static void ql_link_state_machine_work(struct work_struct *work)
|
||||
* See if the link is currently down or went down and came
|
||||
* back up
|
||||
*/
|
||||
if ((curr_link_state == LS_DOWN) || ql_link_down_detect(qdev)) {
|
||||
if (curr_link_state == LS_DOWN) {
|
||||
if (netif_msg_link(qdev))
|
||||
printk(KERN_INFO PFX "%s: Link is down.\n",
|
||||
qdev->ndev->name);
|
||||
qdev->port_link_state = LS_DOWN;
|
||||
}
|
||||
if (ql_link_down_detect(qdev))
|
||||
qdev->port_link_state = LS_DOWN;
|
||||
break;
|
||||
}
|
||||
spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
|
||||
|
@ -323,17 +323,17 @@ static void uec_get_ethtool_stats(struct net_device *netdev,
|
||||
if (stats_mode & UCC_GETH_STATISTICS_GATHERING_MODE_HARDWARE) {
|
||||
base = (u32 __iomem *)&ugeth->ug_regs->tx64;
|
||||
for (i = 0; i < UEC_HW_STATS_LEN; i++)
|
||||
data[j++] = (u64)in_be32(&base[i]);
|
||||
data[j++] = in_be32(&base[i]);
|
||||
}
|
||||
if (stats_mode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) {
|
||||
base = (u32 __iomem *)ugeth->p_tx_fw_statistics_pram;
|
||||
for (i = 0; i < UEC_TX_FW_STATS_LEN; i++)
|
||||
data[j++] = (u64)in_be32(&base[i]);
|
||||
data[j++] = base ? in_be32(&base[i]) : 0;
|
||||
}
|
||||
if (stats_mode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) {
|
||||
base = (u32 __iomem *)ugeth->p_rx_fw_statistics_pram;
|
||||
for (i = 0; i < UEC_RX_FW_STATS_LEN; i++)
|
||||
data[j++] = (u64)in_be32(&base[i]);
|
||||
data[j++] = base ? in_be32(&base[i]) : 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2296,7 +2296,7 @@ static void velocity_set_multi(struct net_device *dev)
|
||||
}
|
||||
|
||||
mac_set_cam_mask(regs, vptr->mCAMmask);
|
||||
rx_mode = (RCR_AM | RCR_AB);
|
||||
rx_mode = RCR_AM | RCR_AB | RCR_AP;
|
||||
}
|
||||
if (dev->mtu > 1500)
|
||||
rx_mode |= RCR_AL;
|
||||
|
@ -331,10 +331,11 @@ static inline void lockdep_on(void)
|
||||
# define lock_set_subclass(l, s, i) do { } while (0)
|
||||
# define lockdep_init() do { } while (0)
|
||||
# define lockdep_info() do { } while (0)
|
||||
# define lockdep_init_map(lock, name, key, sub) do { (void)(key); } while (0)
|
||||
# define lockdep_init_map(lock, name, key, sub) \
|
||||
do { (void)(name); (void)(key); } while (0)
|
||||
# define lockdep_set_class(lock, key) do { (void)(key); } while (0)
|
||||
# define lockdep_set_class_and_name(lock, key, name) \
|
||||
do { (void)(key); } while (0)
|
||||
do { (void)(key); (void)(name); } while (0)
|
||||
#define lockdep_set_class_and_subclass(lock, key, sub) \
|
||||
do { (void)(key); } while (0)
|
||||
#define lockdep_set_subclass(lock, sub) do { } while (0)
|
||||
|
@ -878,7 +878,9 @@ static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
|
||||
if (ifm->ifi_change)
|
||||
flags = (flags & ifm->ifi_change) |
|
||||
(dev->flags & ~ifm->ifi_change);
|
||||
dev_change_flags(dev, flags);
|
||||
err = dev_change_flags(dev, flags);
|
||||
if (err < 0)
|
||||
goto errout;
|
||||
}
|
||||
|
||||
if (tb[IFLA_TXQLEN])
|
||||
|
@ -75,7 +75,6 @@ static int scm_fp_copy(struct cmsghdr *cmsg, struct scm_fp_list **fplp)
|
||||
if (!fpl)
|
||||
return -ENOMEM;
|
||||
*fplp = fpl;
|
||||
INIT_LIST_HEAD(&fpl->list);
|
||||
fpl->count = 0;
|
||||
}
|
||||
fpp = &fpl->fp[fpl->count];
|
||||
@ -301,7 +300,6 @@ struct scm_fp_list *scm_fp_dup(struct scm_fp_list *fpl)
|
||||
|
||||
new_fpl = kmalloc(sizeof(*fpl), GFP_KERNEL);
|
||||
if (new_fpl) {
|
||||
INIT_LIST_HEAD(&new_fpl->list);
|
||||
for (i=fpl->count-1; i>=0; i--)
|
||||
get_file(fpl->fp[i]);
|
||||
memcpy(new_fpl, fpl, sizeof(*fpl));
|
||||
|
@ -136,7 +136,6 @@
|
||||
static struct lock_class_key af_family_keys[AF_MAX];
|
||||
static struct lock_class_key af_family_slock_keys[AF_MAX];
|
||||
|
||||
#ifdef CONFIG_DEBUG_LOCK_ALLOC
|
||||
/*
|
||||
* Make lock validator output more readable. (we pre-construct these
|
||||
* strings build-time, so that runtime initialization of socket
|
||||
@ -187,7 +186,6 @@ static const char *af_family_clock_key_strings[AF_MAX+1] = {
|
||||
"clock-AF_RXRPC" , "clock-AF_ISDN" , "clock-AF_PHONET" ,
|
||||
"clock-AF_MAX"
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* sk_callback_lock locking rules are per-address-family,
|
||||
|
@ -209,9 +209,17 @@ static int ip_local_deliver_finish(struct sk_buff *skb)
|
||||
|
||||
hash = protocol & (MAX_INET_PROTOS - 1);
|
||||
ipprot = rcu_dereference(inet_protos[hash]);
|
||||
if (ipprot != NULL && (net == &init_net || ipprot->netns_ok)) {
|
||||
if (ipprot != NULL) {
|
||||
int ret;
|
||||
|
||||
if (!net_eq(net, &init_net) && !ipprot->netns_ok) {
|
||||
if (net_ratelimit())
|
||||
printk("%s: proto %d isn't netns-ready\n",
|
||||
__func__, protocol);
|
||||
kfree_skb(skb);
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!ipprot->no_policy) {
|
||||
if (!xfrm4_policy_check(NULL, XFRM_POLICY_IN, skb)) {
|
||||
kfree_skb(skb);
|
||||
|
@ -661,6 +661,11 @@ int datagram_send_ctl(struct net *net,
|
||||
switch (rthdr->type) {
|
||||
#if defined(CONFIG_IPV6_MIP6) || defined(CONFIG_IPV6_MIP6_MODULE)
|
||||
case IPV6_SRCRT_TYPE_2:
|
||||
if (rthdr->hdrlen != 2 ||
|
||||
rthdr->segments_left != 1) {
|
||||
err = -EINVAL;
|
||||
goto exit_f;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
|
@ -366,11 +366,16 @@ static int do_ipv6_setsockopt(struct sock *sk, int level, int optname,
|
||||
}
|
||||
|
||||
/* routing header option needs extra check */
|
||||
retv = -EINVAL;
|
||||
if (optname == IPV6_RTHDR && opt && opt->srcrt) {
|
||||
struct ipv6_rt_hdr *rthdr = opt->srcrt;
|
||||
switch (rthdr->type) {
|
||||
#if defined(CONFIG_IPV6_MIP6) || defined(CONFIG_IPV6_MIP6_MODULE)
|
||||
case IPV6_SRCRT_TYPE_2:
|
||||
if (rthdr->hdrlen != 2 ||
|
||||
rthdr->segments_left != 1)
|
||||
goto sticky_done;
|
||||
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
|
@ -144,8 +144,8 @@ static int pn_send(struct sk_buff *skb, struct net_device *dev,
|
||||
struct phonethdr *ph;
|
||||
int err;
|
||||
|
||||
if (skb->len + 2 > 0xffff) {
|
||||
/* Phonet length field would overflow */
|
||||
if (skb->len + 2 > 0xffff /* Phonet length field limit */ ||
|
||||
skb->len + sizeof(struct phonethdr) > dev->mtu) {
|
||||
err = -EMSGSIZE;
|
||||
goto drop;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user