From b8273f2eb5d266755a2ae2db39b2cc16f29b0941 Mon Sep 17 00:00:00 2001 From: Murali Karicheri Date: Sat, 23 Nov 2013 16:26:06 -0500 Subject: [PATCH 1/7] ARM: keystone: dts: add a k2hk-evm specific dts file This patch adds K2 Kepler/Hawking evm (k2hk-evm) specific dts file. To enable re-use of bindings across multiple evms of this family, rename current keystone.dts to keystone.dtsi and include it in the evm specific dts file. K2 SoC has separate ref clock inputs for various clocks. So add separate ref clock nodes for ARM, DDR3A, DDR3B and PA PLL input clocks in k2hk-evm.dts. While at it, rename refclkmain to refclksys based on device User Guide naming convention Signed-off-by: Murali Karicheri Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/k2hk-evm.dts | 55 +++++++++++++++++++ arch/arm/boot/dts/keystone-clocks.dtsi | 23 ++------ .../boot/dts/{keystone.dts => keystone.dtsi} | 2 - 3 files changed, 61 insertions(+), 19 deletions(-) create mode 100644 arch/arm/boot/dts/k2hk-evm.dts rename arch/arm/boot/dts/{keystone.dts => keystone.dtsi} (98%) diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts new file mode 100644 index 000000000000..15b3a95f5e3a --- /dev/null +++ b/arch/arm/boot/dts/k2hk-evm.dts @@ -0,0 +1,55 @@ +/* + * Copyright 2013 Texas Instruments, Inc. + * + * Keystone 2 Kepler/Hawking EVM device tree + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "keystone.dtsi" + +/ { + compatible = "ti,keystone-evm"; + + soc { + clock { + refclksys: refclksys { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <122880000>; + clock-output-names = "refclk-sys"; + }; + + refclkpass: refclkpass { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <122880000>; + clock-output-names = "refclk-pass"; + }; + + refclkarm: refclkarm { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "refclk-arm"; + }; + + refclkddr3a: refclkddr3a { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + clock-output-names = "refclk-ddr3a"; + }; + + refclkddr3b: refclkddr3b { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + clock-output-names = "refclk-ddr3b"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi index d6713b113258..67e70ec410d6 100644 --- a/arch/arm/boot/dts/keystone-clocks.dtsi +++ b/arch/arm/boot/dts/keystone-clocks.dtsi @@ -13,17 +13,10 @@ clocks { #size-cells = <1>; ranges; - refclkmain: refclkmain { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <122880000>; - clock-output-names = "refclk-main"; - }; - mainpllclk: mainpllclk@2310110 { #clock-cells = <0>; compatible = "ti,keystone,main-pll-clock"; - clocks = <&refclkmain>; + clocks = <&refclksys>; reg = <0x02620350 4>, <0x02310110 4>; reg-names = "control", "multiplier"; fixed-postdiv = <2>; @@ -32,47 +25,43 @@ clocks { papllclk: papllclk@2620358 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; + clocks = <&refclkpass>; clock-output-names = "pa-pll-clk"; reg = <0x02620358 4>; reg-names = "control"; - fixed-postdiv = <6>; }; ddr3allclk: ddr3apllclk@2620360 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; + clocks = <&refclkddr3a>; clock-output-names = "ddr-3a-pll-clk"; reg = <0x02620360 4>; reg-names = "control"; - fixed-postdiv = <6>; }; ddr3bllclk: ddr3bpllclk@2620368 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; + clocks = <&refclkddr3b>; clock-output-names = "ddr-3b-pll-clk"; reg = <0x02620368 4>; reg-names = "control"; - fixed-postdiv = <6>; }; armpllclk: armpllclk@2620370 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; + clocks = <&refclkarm>; clock-output-names = "arm-pll-clk"; reg = <0x02620370 4>; reg-names = "control"; - fixed-postdiv = <6>; }; mainmuxclk: mainmuxclk@2310108 { #clock-cells = <0>; compatible = "ti,keystone,pll-mux-clock"; - clocks = <&mainpllclk>, <&refclkmain>; + clocks = <&mainpllclk>, <&refclksys>; reg = <0x02310108 4>; bit-shift = <23>; bit-mask = <1>; diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dtsi similarity index 98% rename from arch/arm/boot/dts/keystone.dts rename to arch/arm/boot/dts/keystone.dtsi index 100bdf52b847..c01c6fb6e370 100644 --- a/arch/arm/boot/dts/keystone.dts +++ b/arch/arm/boot/dts/keystone.dtsi @@ -6,14 +6,12 @@ * published by the Free Software Foundation. */ -/dts-v1/; #include #include "skeleton.dtsi" / { model = "Texas Instruments Keystone 2 SoC"; - compatible = "ti,keystone-evm"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&gic>; From afdd8b61115801c2fdb2b407eb879fd995ec8af4 Mon Sep 17 00:00:00 2001 From: Murali Karicheri Date: Sat, 23 Nov 2013 16:26:11 -0500 Subject: [PATCH 2/7] ARM: keystone: dts: fix typo in the ddr3 pllclk node name Fix following typo ddr3allclk -> ddr3apllclk ddr3bllclk -> ddr3bpllclk Signed-off-by: Murali Karicheri Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/keystone-clocks.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi index 67e70ec410d6..2a2f247a9263 100644 --- a/arch/arm/boot/dts/keystone-clocks.dtsi +++ b/arch/arm/boot/dts/keystone-clocks.dtsi @@ -31,7 +31,7 @@ clocks { reg-names = "control"; }; - ddr3allclk: ddr3apllclk@2620360 { + ddr3apllclk: ddr3apllclk@2620360 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; clocks = <&refclkddr3a>; @@ -40,7 +40,7 @@ clocks { reg-names = "control"; }; - ddr3bllclk: ddr3bpllclk@2620368 { + ddr3bpllclk: ddr3bpllclk@2620368 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; clocks = <&refclkddr3b>; From 1f2181a95d2a4bf8bd90406c1041a68679dffe49 Mon Sep 17 00:00:00 2001 From: Murali Karicheri Date: Sat, 23 Nov 2013 16:26:16 -0500 Subject: [PATCH 3/7] ARM: keystone: dts: add paclk divider clock node PA subsystem has a fixed factor clock at the input which is input clock divided by 3. This patch adds this clock node to dts Signed-off-by: Murali Karicheri Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/keystone-clocks.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi index 2a2f247a9263..2363593e1050 100644 --- a/arch/arm/boot/dts/keystone-clocks.dtsi +++ b/arch/arm/boot/dts/keystone-clocks.dtsi @@ -124,6 +124,15 @@ clocks { clock-output-names = "chipclk13"; }; + paclk13: paclk13 { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&papllclk>; + clock-div = <3>; + clock-mult = <1>; + clock-output-names = "paclk13"; + }; + chipclk14: chipclk14 { #clock-cells = <0>; compatible = "fixed-factor-clock"; From a18b4aa2a061b146c018f9ebd3e0a8bb35445e57 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 9 Nov 2013 14:33:13 -0500 Subject: [PATCH 4/7] ARM: dts: keystone: Add the GICV and GICH address space Update the Keystone gic node to add the GICV and GIGH address space needed by the KVM. Cc: Marc Zyngier Cc: Christoffer Dall Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/keystone.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index c01c6fb6e370..00ce8f3c096a 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -62,7 +62,9 @@ #address-cells = <1>; interrupt-controller; reg = <0x0 0x02561000 0x0 0x1000>, - <0x0 0x02562000 0x0 0x2000>; + <0x0 0x02562000 0x0 0x2000>, + <0x0 0x02564000 0x0 0x1000>, + <0x0 0x02566000 0x0 0x2000>; }; timer { From 0ee154443b9906a792b0b32a5b897947bb90c827 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 9 Nov 2013 14:36:00 -0500 Subject: [PATCH 5/7] ARM: dts: keystone: Add guestos maintenance interrupt Update the Keystone gic device tree entry to add the maintenance interrupt information. Cc: Marc Zyngier Cc: Christoffer Dall Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/keystone.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 00ce8f3c096a..f6d6d9e5effd 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -65,6 +65,8 @@ <0x0 0x02562000 0x0 0x2000>, <0x0 0x02564000 0x0 0x1000>, <0x0 0x02566000 0x0 0x2000>; + interrupts = ; }; timer { From 08c36762db9a0223a5477441bd93650b474aa9c8 Mon Sep 17 00:00:00 2001 From: WingMan Kwok Date: Mon, 9 Dec 2013 14:43:23 -0500 Subject: [PATCH 6/7] ARM: dts: keystone: Add usb phy devicetree bindings Added device tree support for TI's Keystone USB PHY driver and updated the Documentation with device tree binding information. Signed-off-by: WingMan Kwok Signed-off-by: Santosh Shilimkar --- .../devicetree/bindings/usb/keystone-phy.txt | 20 +++++++++++++++++++ arch/arm/boot/dts/keystone.dtsi | 8 ++++++++ 2 files changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/keystone-phy.txt diff --git a/Documentation/devicetree/bindings/usb/keystone-phy.txt b/Documentation/devicetree/bindings/usb/keystone-phy.txt new file mode 100644 index 000000000000..f37b3a86341d --- /dev/null +++ b/Documentation/devicetree/bindings/usb/keystone-phy.txt @@ -0,0 +1,20 @@ +TI Keystone USB PHY + +Required properties: + - compatible: should be "ti,keystone-usbphy". + - #address-cells, #size-cells : should be '1' if the device has sub-nodes + with 'reg' property. + - reg : Address and length of the usb phy control register set. + +The main purpose of this PHY driver is to enable the USB PHY reference clock +gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just +an NOP PHY driver. Hence this node is referenced as both the usb2 and usb3 +phy node in the USB Glue layer driver node. + +usb_phy: usb_phy@2620738 { + compatible = "ti,keystone-usbphy"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2620738 32>; + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index f6d6d9e5effd..276bea999ef4 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -181,5 +181,13 @@ interrupts = ; clocks = <&clkspi>; }; + + usb_phy: usb_phy@2620738 { + compatible = "ti,keystone-usbphy"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2620738 32>; + status = "disabled"; + }; }; }; From 732079567da4942b7b4929deff8f236926d0b3eb Mon Sep 17 00:00:00 2001 From: WingMan Kwok Date: Mon, 9 Dec 2013 17:25:12 -0500 Subject: [PATCH 7/7] ARM: dts: keystone: Add usb devicetree bindings Added device tree support for TI's Keystone USB driver and updated the Documentation with device tree binding information. Signed-off-by: WingMan Kwok Signed-off-by: Santosh Shilimkar --- .../devicetree/bindings/usb/keystone-usb.txt | 42 +++++++++++++++++++ arch/arm/boot/dts/k2hk-evm.dts | 8 ++++ arch/arm/boot/dts/keystone.dtsi | 19 +++++++++ 3 files changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt new file mode 100644 index 000000000000..60527d335b58 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt @@ -0,0 +1,42 @@ +TI Keystone Soc USB Controller + +DWC3 GLUE + +Required properties: + - compatible: should be "ti,keystone-dwc3". + - #address-cells, #size-cells : should be '1' if the device has sub-nodes + with 'reg' property. + - reg : Address and length of the register set for the USB subsystem on + the SOC. + - interrupts : The irq number of this device that is used to interrupt the + MPU. + - ranges: allows valid 1:1 translation between child's address space and + parent's address space. + - clocks: Clock IDs array as required by the controller. + - clock-names: names of clocks correseponding to IDs in the clock property. + +Sub-nodes: +The dwc3 core should be added as subnode to Keystone DWC3 glue. +- dwc3 : + The binding details of dwc3 can be found in: + Documentation/devicetree/bindings/usb/dwc3.txt + +Example: + usb: usb@2680000 { + compatible = "ti,keystone-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2680000 0x10000>; + clocks = <&clkusb>; + clock-names = "usb"; + interrupts = ; + ranges; + status = "disabled"; + + dwc3@2690000 { + compatible = "synopsys,dwc3"; + reg = <0x2690000 0x70000>; + interrupts = ; + usb-phy = <&usb_phy>, <&usb_phy>; + }; + }; diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts index 15b3a95f5e3a..eaefdfef65c3 100644 --- a/arch/arm/boot/dts/k2hk-evm.dts +++ b/arch/arm/boot/dts/k2hk-evm.dts @@ -53,3 +53,11 @@ }; }; }; + +&usb_phy { + status = "okay"; +}; + +&usb { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 276bea999ef4..b4202907a27b 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -189,5 +189,24 @@ reg = <0x2620738 32>; status = "disabled"; }; + + usb: usb@2680000 { + compatible = "ti,keystone-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2680000 0x10000>; + clocks = <&clkusb>; + clock-names = "usb"; + interrupts = ; + ranges; + status = "disabled"; + + dwc3@2690000 { + compatible = "synopsys,dwc3"; + reg = <0x2690000 0x70000>; + interrupts = ; + usb-phy = <&usb_phy>, <&usb_phy>; + }; + }; }; };