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wireless-drivers-next patches for 4.11
The most notable change here is the inclusion of airtime fairness scheduling to ath9k. It prevents slow clients from hogging all the airtime and unfairly slowing down faster clients. Otherwise smaller changes and cleanup. Major changes: ath9k * cleanup eeprom endian handling * add airtime fairness scheduling ath10k * fix issues for new QCA9377 firmware version * support dev_coredump() for firmware crash dump * enable channel 169 on 5 GHz band -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJYalDTAAoJEG4XJFUm622ba2EH/ivoHG9CvmT6HgNw77odDr6b Zc7plDi2dd9LIzp3rF/9j8Ietfzpu31Pp9Qz0o1Su/s8RJIlXKVF5UeG5IignnEG 02rv7Z+BGPW7SUNDb0cLa27PMYqUAh8vI39sxYSdQ9NQLIlpMLIxxx5iOZyAK5eV HBRS0pVlSxbAntb1JgWiN/LjjXe/PdhX3CR/b9b468KAcWB6UWj9nXQxFmz7d3uM dH3buDTgwaq7K24ZAFc1BsD7rgxprpauXxgIMWCKxRERf64WFfYkYdfdCER+PSPH maV5Te1KzTJBrQHDOPs1ezVe8gDUhb5YE4BJY9SppZpOE1arucq2g3+3obQUeHE= =DAVq -----END PGP SIGNATURE----- Merge tag 'wireless-drivers-next-for-davem-2017-01-02' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for 4.11 The most notable change here is the inclusion of airtime fairness scheduling to ath9k. It prevents slow clients from hogging all the airtime and unfairly slowing down faster clients. Otherwise smaller changes and cleanup. Major changes: ath9k * cleanup eeprom endian handling * add airtime fairness scheduling ath10k * fix issues for new QCA9377 firmware version * support dev_coredump() for firmware crash dump * enable channel 169 on 5 GHz band ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
85eb018fec
@ -413,6 +413,13 @@ static void adm8211_interrupt_rci(struct ieee80211_hw *dev)
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skb_tail_pointer(newskb),
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RX_PKT_SIZE,
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PCI_DMA_FROMDEVICE);
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if (pci_dma_mapping_error(priv->pdev,
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priv->rx_buffers[entry].mapping)) {
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priv->rx_buffers[entry].skb = NULL;
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dev_kfree_skb(newskb);
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skb = NULL;
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/* TODO: update rx dropped stats */
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}
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} else {
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skb = NULL;
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/* TODO: update rx dropped stats */
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@ -1450,6 +1457,12 @@ static int adm8211_init_rings(struct ieee80211_hw *dev)
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skb_tail_pointer(rx_info->skb),
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RX_PKT_SIZE,
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PCI_DMA_FROMDEVICE);
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if (pci_dma_mapping_error(priv->pdev, rx_info->mapping)) {
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dev_kfree_skb(rx_info->skb);
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rx_info->skb = NULL;
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break;
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}
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desc->buffer1 = cpu_to_le32(rx_info->mapping);
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desc->status = cpu_to_le32(RDES0_STATUS_OWN | RDES0_STATUS_SQL);
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}
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@ -1613,7 +1626,7 @@ static void adm8211_calc_durations(int *dur, int *plcp, size_t payload_len, int
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}
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/* Transmit skb w/adm8211_tx_hdr (802.11 header created by hardware) */
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static void adm8211_tx_raw(struct ieee80211_hw *dev, struct sk_buff *skb,
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static int adm8211_tx_raw(struct ieee80211_hw *dev, struct sk_buff *skb,
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u16 plcp_signal,
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size_t hdrlen)
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{
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@ -1625,6 +1638,8 @@ static void adm8211_tx_raw(struct ieee80211_hw *dev, struct sk_buff *skb,
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mapping = pci_map_single(priv->pdev, skb->data, skb->len,
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PCI_DMA_TODEVICE);
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if (pci_dma_mapping_error(priv->pdev, mapping))
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return -ENOMEM;
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spin_lock_irqsave(&priv->lock, flags);
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@ -1657,6 +1672,8 @@ static void adm8211_tx_raw(struct ieee80211_hw *dev, struct sk_buff *skb,
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/* Trigger transmit poll */
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ADM8211_CSR_WRITE(TDR, 0);
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return 0;
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}
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/* Put adm8211_tx_hdr on skb and transmit */
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@ -1710,7 +1727,10 @@ static void adm8211_tx(struct ieee80211_hw *dev,
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txhdr->retry_limit = info->control.rates[0].count;
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adm8211_tx_raw(dev, skb, plcp_signal, hdrlen);
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if (adm8211_tx_raw(dev, skb, plcp_signal, hdrlen)) {
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/* Drop packet */
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ieee80211_free_txskb(dev, skb);
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}
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}
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static int adm8211_alloc_rings(struct ieee80211_hw *dev)
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@ -1843,7 +1863,8 @@ static int adm8211_probe(struct pci_dev *pdev,
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priv->rx_ring_size = rx_ring_size;
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priv->tx_ring_size = tx_ring_size;
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if (adm8211_alloc_rings(dev)) {
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err = adm8211_alloc_rings(dev);
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if (err) {
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printk(KERN_ERR "%s (adm8211): Cannot allocate TX/RX ring\n",
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pci_name(pdev));
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goto err_iounmap;
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@ -694,8 +694,11 @@ static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
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"boot get otp board id result 0x%08x board_id %d chip_id %d\n",
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result, board_id, chip_id);
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if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0)
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if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
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(board_id == 0)) {
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ath10k_warn(ar, "board id is not exist in otp, ignore it\n");
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return -EOPNOTSUPP;
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}
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ar->id.bmi_ids_valid = true;
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ar->id.bmi_board_id = board_id;
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@ -1510,6 +1513,7 @@ static int ath10k_init_hw_params(struct ath10k *ar)
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static void ath10k_core_restart(struct work_struct *work)
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{
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struct ath10k *ar = container_of(work, struct ath10k, restart_work);
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int ret;
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set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
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@ -1561,6 +1565,11 @@ static void ath10k_core_restart(struct work_struct *work)
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}
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mutex_unlock(&ar->conf_mutex);
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ret = ath10k_debug_fw_devcoredump(ar);
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if (ret)
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ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
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ret);
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}
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static void ath10k_core_set_coverage_class_work(struct work_struct *work)
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@ -46,7 +46,7 @@
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#define WMI_READY_TIMEOUT (5 * HZ)
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#define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
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#define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
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#define ATH10K_NUM_CHANS 39
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#define ATH10K_NUM_CHANS 40
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/* Antenna noise floor */
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#define ATH10K_DEFAULT_NOISE_FLOOR -95
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@ -21,6 +21,7 @@
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#include <linux/utsname.h>
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#include <linux/crc32.h>
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#include <linux/firmware.h>
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#include <linux/devcoredump.h>
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#include "core.h"
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#include "debug.h"
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@ -721,7 +722,8 @@ ath10k_debug_get_new_fw_crash_data(struct ath10k *ar)
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}
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EXPORT_SYMBOL(ath10k_debug_get_new_fw_crash_data);
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static struct ath10k_dump_file_data *ath10k_build_dump_file(struct ath10k *ar)
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static struct ath10k_dump_file_data *ath10k_build_dump_file(struct ath10k *ar,
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bool mark_read)
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{
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struct ath10k_fw_crash_data *crash_data = ar->debug.fw_crash_data;
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struct ath10k_dump_file_data *dump_data;
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@ -790,19 +792,54 @@ static struct ath10k_dump_file_data *ath10k_build_dump_file(struct ath10k *ar)
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sizeof(crash_data->registers));
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sofar += sizeof(*dump_tlv) + sizeof(crash_data->registers);
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ar->debug.fw_crash_data->crashed_since_read = false;
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ar->debug.fw_crash_data->crashed_since_read = !mark_read;
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spin_unlock_bh(&ar->data_lock);
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return dump_data;
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}
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int ath10k_debug_fw_devcoredump(struct ath10k *ar)
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{
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struct ath10k_dump_file_data *dump;
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void *dump_ptr;
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u32 dump_len;
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/* To keep the dump file available also for debugfs don't mark the
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* file read, only debugfs should do that.
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*/
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dump = ath10k_build_dump_file(ar, false);
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if (!dump) {
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ath10k_warn(ar, "no crash dump data found for devcoredump");
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return -ENODATA;
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}
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/* Make a copy of the dump file for dev_coredumpv() as during the
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* transition period we need to own the original file. Once
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* fw_crash_dump debugfs file is removed no need to have a copy
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* anymore.
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*/
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dump_len = le32_to_cpu(dump->len);
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dump_ptr = vzalloc(dump_len);
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if (!dump_ptr)
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return -ENOMEM;
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memcpy(dump_ptr, dump, dump_len);
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dev_coredumpv(ar->dev, dump_ptr, dump_len, GFP_KERNEL);
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return 0;
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}
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static int ath10k_fw_crash_dump_open(struct inode *inode, struct file *file)
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{
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struct ath10k *ar = inode->i_private;
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struct ath10k_dump_file_data *dump;
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dump = ath10k_build_dump_file(ar);
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ath10k_warn(ar, "fw_crash_dump debugfs file is deprecated, please use /sys/class/devcoredump instead.");
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dump = ath10k_build_dump_file(ar, true);
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if (!dump)
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return -ENODATA;
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@ -84,6 +84,9 @@ struct ath10k_fw_crash_data *
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ath10k_debug_get_new_fw_crash_data(struct ath10k *ar);
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void ath10k_debug_dbglog_add(struct ath10k *ar, u8 *buffer, int len);
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int ath10k_debug_fw_devcoredump(struct ath10k *ar);
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#define ATH10K_DFS_STAT_INC(ar, c) (ar->debug.dfs_stats.c++)
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void ath10k_debug_get_et_strings(struct ieee80211_hw *hw,
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@ -166,6 +169,11 @@ static inline u32 ath10k_debug_get_fw_dbglog_level(struct ath10k *ar)
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return 0;
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}
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static inline int ath10k_debug_fw_devcoredump(struct ath10k *ar)
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{
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return 0;
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}
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#define ATH10K_DFS_STAT_INC(ar, c) do { } while (0)
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#define ath10k_debug_get_et_strings NULL
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@ -239,6 +239,7 @@ static void ath10k_htt_tx_free_cont_txbuf(struct ath10k_htt *htt)
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size = htt->max_num_pending_tx * sizeof(struct ath10k_htt_txbuf);
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dma_free_coherent(ar->dev, size, htt->txbuf.vaddr, htt->txbuf.paddr);
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htt->txbuf.vaddr = NULL;
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}
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static int ath10k_htt_tx_alloc_cont_txbuf(struct ath10k_htt *htt)
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@ -268,6 +269,7 @@ static void ath10k_htt_tx_free_cont_frag_desc(struct ath10k_htt *htt)
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size,
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htt->frag_desc.vaddr,
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htt->frag_desc.paddr);
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htt->frag_desc.vaddr = NULL;
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}
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static int ath10k_htt_tx_alloc_cont_frag_desc(struct ath10k_htt *htt)
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@ -512,7 +512,7 @@ ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw,
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/* Target specific defines for WMI-TLV firmware */
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#define TARGET_TLV_NUM_VDEVS 4
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#define TARGET_TLV_NUM_STATIONS 32
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#define TARGET_TLV_NUM_PEERS 35
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#define TARGET_TLV_NUM_PEERS 33
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#define TARGET_TLV_NUM_TDLS_VDEVS 1
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#define TARGET_TLV_NUM_TIDS ((TARGET_TLV_NUM_PEERS) * 2)
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#define TARGET_TLV_NUM_MSDU_DESC (1024 + 32)
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@ -1227,6 +1227,36 @@ static int ath10k_monitor_recalc(struct ath10k *ar)
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return ath10k_monitor_stop(ar);
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}
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static bool ath10k_mac_can_set_cts_prot(struct ath10k_vif *arvif)
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{
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struct ath10k *ar = arvif->ar;
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lockdep_assert_held(&ar->conf_mutex);
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if (!arvif->is_started) {
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ath10k_dbg(ar, ATH10K_DBG_MAC, "defer cts setup, vdev is not ready yet\n");
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return false;
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}
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return true;
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}
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static int ath10k_mac_set_cts_prot(struct ath10k_vif *arvif)
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{
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struct ath10k *ar = arvif->ar;
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u32 vdev_param;
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lockdep_assert_held(&ar->conf_mutex);
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vdev_param = ar->wmi.vdev_param->protection_mode;
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ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d cts_protection %d\n",
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arvif->vdev_id, arvif->use_cts_prot);
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return ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param,
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arvif->use_cts_prot ? 1 : 0);
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}
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static int ath10k_recalc_rtscts_prot(struct ath10k_vif *arvif)
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{
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struct ath10k *ar = arvif->ar;
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@ -1245,6 +1275,9 @@ static int ath10k_recalc_rtscts_prot(struct ath10k_vif *arvif)
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rts_cts |= SM(WMI_RTSCTS_FOR_SECOND_RATESERIES,
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WMI_RTSCTS_PROFILE);
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ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d recalc rts/cts prot %d\n",
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arvif->vdev_id, rts_cts);
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||||
return ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param,
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rts_cts);
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}
|
||||
@ -3495,7 +3528,6 @@ static int ath10k_mac_tx_submit(struct ath10k *ar,
|
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*/
|
||||
static int ath10k_mac_tx(struct ath10k *ar,
|
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struct ieee80211_vif *vif,
|
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struct ieee80211_sta *sta,
|
||||
enum ath10k_hw_txrx_mode txmode,
|
||||
enum ath10k_mac_tx_path txpath,
|
||||
struct sk_buff *skb)
|
||||
@ -3637,7 +3669,7 @@ void ath10k_offchan_tx_work(struct work_struct *work)
|
||||
txmode = ath10k_mac_tx_h_get_txmode(ar, vif, sta, skb);
|
||||
txpath = ath10k_mac_tx_h_get_txpath(ar, skb, txmode);
|
||||
|
||||
ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb);
|
||||
ret = ath10k_mac_tx(ar, vif, txmode, txpath, skb);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to transmit offchannel frame: %d\n",
|
||||
ret);
|
||||
@ -3824,7 +3856,7 @@ int ath10k_mac_tx_push_txq(struct ieee80211_hw *hw,
|
||||
spin_unlock_bh(&ar->htt.tx_lock);
|
||||
}
|
||||
|
||||
ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb);
|
||||
ret = ath10k_mac_tx(ar, vif, txmode, txpath, skb);
|
||||
if (unlikely(ret)) {
|
||||
ath10k_warn(ar, "failed to push frame: %d\n", ret);
|
||||
|
||||
@ -4105,7 +4137,7 @@ static void ath10k_mac_op_tx(struct ieee80211_hw *hw,
|
||||
spin_unlock_bh(&ar->htt.tx_lock);
|
||||
}
|
||||
|
||||
ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb);
|
||||
ret = ath10k_mac_tx(ar, vif, txmode, txpath, skb);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to transmit frame: %d\n", ret);
|
||||
if (is_htt) {
|
||||
@ -4669,7 +4701,8 @@ static int ath10k_mac_txpower_recalc(struct ath10k *ar)
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
list_for_each_entry(arvif, &ar->arvifs, list) {
|
||||
WARN_ON(arvif->txpower < 0);
|
||||
if (arvif->txpower <= 0)
|
||||
continue;
|
||||
|
||||
if (txpower == -1)
|
||||
txpower = arvif->txpower;
|
||||
@ -4677,8 +4710,8 @@ static int ath10k_mac_txpower_recalc(struct ath10k *ar)
|
||||
txpower = min(txpower, arvif->txpower);
|
||||
}
|
||||
|
||||
if (WARN_ON(txpower == -1))
|
||||
return -EINVAL;
|
||||
if (txpower == -1)
|
||||
return 0;
|
||||
|
||||
ret = ath10k_mac_txpower_setup(ar, txpower);
|
||||
if (ret) {
|
||||
@ -5194,6 +5227,10 @@ static void ath10k_remove_interface(struct ieee80211_hw *hw,
|
||||
ath10k_warn(ar, "failed to recalc monitor: %d\n", ret);
|
||||
}
|
||||
|
||||
ret = ath10k_mac_txpower_recalc(ar);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to recalc tx power: %d\n", ret);
|
||||
|
||||
spin_lock_bh(&ar->htt.tx_lock);
|
||||
ath10k_mac_vif_tx_unlock_all(arvif);
|
||||
spin_unlock_bh(&ar->htt.tx_lock);
|
||||
@ -5328,20 +5365,18 @@ static void ath10k_bss_info_changed(struct ieee80211_hw *hw,
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_CTS_PROT) {
|
||||
arvif->use_cts_prot = info->use_cts_prot;
|
||||
ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d cts_prot %d\n",
|
||||
arvif->vdev_id, info->use_cts_prot);
|
||||
|
||||
ret = ath10k_recalc_rtscts_prot(arvif);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to recalculate rts/cts prot for vdev %d: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
|
||||
vdev_param = ar->wmi.vdev_param->protection_mode;
|
||||
ret = ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param,
|
||||
info->use_cts_prot ? 1 : 0);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to set protection mode %d on vdev %i: %d\n",
|
||||
info->use_cts_prot, arvif->vdev_id, ret);
|
||||
if (ath10k_mac_can_set_cts_prot(arvif)) {
|
||||
ret = ath10k_mac_set_cts_prot(arvif);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to set cts protection for vdev %d: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
}
|
||||
}
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_SLOT) {
|
||||
@ -7364,6 +7399,13 @@ ath10k_mac_op_assign_vif_chanctx(struct ieee80211_hw *hw,
|
||||
arvif->is_up = true;
|
||||
}
|
||||
|
||||
if (ath10k_mac_can_set_cts_prot(arvif)) {
|
||||
ret = ath10k_mac_set_cts_prot(arvif);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to set cts protection for vdev %d: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
}
|
||||
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
return 0;
|
||||
|
||||
@ -7548,6 +7590,7 @@ static const struct ieee80211_channel ath10k_5ghz_channels[] = {
|
||||
CHAN5G(157, 5785, 0),
|
||||
CHAN5G(161, 5805, 0),
|
||||
CHAN5G(165, 5825, 0),
|
||||
CHAN5G(169, 5845, 0),
|
||||
};
|
||||
|
||||
struct ath10k *ath10k_mac_create(size_t priv_size)
|
||||
|
@ -1973,7 +1973,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
|
||||
}
|
||||
break;
|
||||
case QCA9377_1_0_DEVICE_ID:
|
||||
return 2;
|
||||
return 4;
|
||||
}
|
||||
|
||||
ath10k_warn(ar, "unknown number of banks, assuming 1\n");
|
||||
@ -3132,7 +3132,7 @@ int ath10k_pci_setup_resource(struct ath10k *ar)
|
||||
setup_timer(&ar_pci->rx_post_retry, ath10k_pci_rx_replenish_retry,
|
||||
(unsigned long)ar);
|
||||
|
||||
if (QCA_REV_6174(ar))
|
||||
if (QCA_REV_6174(ar) || QCA_REV_9377(ar))
|
||||
ath10k_pci_override_ce_config(ar);
|
||||
|
||||
ret = ath10k_pci_alloc_pipes(ar);
|
||||
|
@ -1105,8 +1105,10 @@ static int ath10k_wmi_tlv_op_pull_fw_stats(struct ath10k *ar,
|
||||
struct ath10k_fw_stats_pdev *dst;
|
||||
|
||||
src = data;
|
||||
if (data_len < sizeof(*src))
|
||||
if (data_len < sizeof(*src)) {
|
||||
kfree(tb);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
data += sizeof(*src);
|
||||
data_len -= sizeof(*src);
|
||||
@ -1126,8 +1128,10 @@ static int ath10k_wmi_tlv_op_pull_fw_stats(struct ath10k *ar,
|
||||
struct ath10k_fw_stats_vdev *dst;
|
||||
|
||||
src = data;
|
||||
if (data_len < sizeof(*src))
|
||||
if (data_len < sizeof(*src)) {
|
||||
kfree(tb);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
data += sizeof(*src);
|
||||
data_len -= sizeof(*src);
|
||||
@ -1145,8 +1149,10 @@ static int ath10k_wmi_tlv_op_pull_fw_stats(struct ath10k *ar,
|
||||
struct ath10k_fw_stats_peer *dst;
|
||||
|
||||
src = data;
|
||||
if (data_len < sizeof(*src))
|
||||
if (data_len < sizeof(*src)) {
|
||||
kfree(tb);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
data += sizeof(*src);
|
||||
data_len -= sizeof(*src);
|
||||
|
@ -524,7 +524,7 @@ static bool ar5008_hw_set_rf_regs(struct ath_hw *ah,
|
||||
return true;
|
||||
|
||||
/* Setup rf parameters */
|
||||
eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
|
||||
eepMinorRev = ah->eep_ops->get_eeprom_rev(ah);
|
||||
|
||||
for (i = 0; i < ah->iniBank6.ia_rows; i++)
|
||||
ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
|
||||
|
@ -108,8 +108,7 @@ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
|
||||
{
|
||||
u32 rxgain_type;
|
||||
|
||||
if (ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) >=
|
||||
AR5416_EEP_MINOR_VER_17) {
|
||||
if (ah->eep_ops->get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_17) {
|
||||
rxgain_type = ah->eep_ops->get_eeprom(ah, EEP_RXGAIN_TYPE);
|
||||
|
||||
if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
|
||||
@ -129,8 +128,7 @@ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
|
||||
|
||||
static void ar9280_20_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type)
|
||||
{
|
||||
if (ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) >=
|
||||
AR5416_EEP_MINOR_VER_19) {
|
||||
if (ah->eep_ops->get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19) {
|
||||
if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
ar9280Modes_high_power_tx_gain_9280_2);
|
||||
|
@ -53,7 +53,7 @@ static const struct ar9300_eeprom ar9300_default = {
|
||||
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
|
||||
.opCapFlags = {
|
||||
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
|
||||
.eepMisc = 0,
|
||||
.eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN,
|
||||
},
|
||||
.rfSilent = 0,
|
||||
.blueToothOptions = 0,
|
||||
@ -631,7 +631,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
|
||||
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
|
||||
.opCapFlags = {
|
||||
.opFlags = AR5416_OPFLAGS_11A,
|
||||
.eepMisc = 0,
|
||||
.eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN,
|
||||
},
|
||||
.rfSilent = 0,
|
||||
.blueToothOptions = 0,
|
||||
@ -1210,7 +1210,7 @@ static const struct ar9300_eeprom ar9300_h112 = {
|
||||
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
|
||||
.opCapFlags = {
|
||||
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
|
||||
.eepMisc = 0,
|
||||
.eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN,
|
||||
},
|
||||
.rfSilent = 0,
|
||||
.blueToothOptions = 0,
|
||||
@ -1789,7 +1789,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
|
||||
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
|
||||
.opCapFlags = {
|
||||
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
|
||||
.eepMisc = 0,
|
||||
.eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN,
|
||||
},
|
||||
.rfSilent = 0,
|
||||
.blueToothOptions = 0,
|
||||
@ -2367,7 +2367,7 @@ static const struct ar9300_eeprom ar9300_h116 = {
|
||||
.txrxMask = 0x33, /* 4 bits tx and 4 bits rx */
|
||||
.opCapFlags = {
|
||||
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
|
||||
.eepMisc = 0,
|
||||
.eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN,
|
||||
},
|
||||
.rfSilent = 0,
|
||||
.blueToothOptions = 0,
|
||||
@ -3468,7 +3468,8 @@ static u32 ath9k_hw_ar9003_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
AR5416_OPFLAGS_N_5G_HT20));
|
||||
PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags &
|
||||
AR5416_OPFLAGS_N_5G_HT40));
|
||||
PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 0x01));
|
||||
PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc &
|
||||
AR5416_EEPMISC_BIG_ENDIAN));
|
||||
PR_EEP("RF Silent", pBase->rfSilent);
|
||||
PR_EEP("BT option", pBase->blueToothOptions);
|
||||
PR_EEP("Device Cap", pBase->deviceCap);
|
||||
@ -5497,6 +5498,11 @@ unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
|
||||
}
|
||||
}
|
||||
|
||||
static u8 ar9003_get_eepmisc(struct ath_hw *ah)
|
||||
{
|
||||
return ah->eeprom.map4k.baseEepHeader.eepMisc;
|
||||
}
|
||||
|
||||
const struct eeprom_ops eep_ar9300_ops = {
|
||||
.check_eeprom = ath9k_hw_ar9300_check_eeprom,
|
||||
.get_eeprom = ath9k_hw_ar9300_get_eeprom,
|
||||
@ -5507,5 +5513,6 @@ const struct eeprom_ops eep_ar9300_ops = {
|
||||
.set_board_values = ath9k_hw_ar9300_set_board_values,
|
||||
.set_addac = ath9k_hw_ar9300_set_addac,
|
||||
.set_txpower = ath9k_hw_ar9300_set_txpower,
|
||||
.get_spur_channel = ath9k_hw_ar9300_get_spur_channel
|
||||
.get_spur_channel = ath9k_hw_ar9300_get_spur_channel,
|
||||
.get_eepmisc = ar9003_get_eepmisc
|
||||
};
|
||||
|
@ -38,7 +38,6 @@
|
||||
#define AR9300_NUM_CTLS_2G 12
|
||||
#define AR9300_NUM_BAND_EDGES_5G 8
|
||||
#define AR9300_NUM_BAND_EDGES_2G 4
|
||||
#define AR9300_EEPMISC_BIG_ENDIAN 0x01
|
||||
#define AR9300_EEPMISC_WOW 0x02
|
||||
#define AR9300_CUSTOMER_DATA_SIZE 20
|
||||
|
||||
@ -70,6 +69,9 @@
|
||||
#define AR9300_BASE_ADDR 0x3ff
|
||||
#define AR9300_BASE_ADDR_512 0x1ff
|
||||
|
||||
/* AR5416_EEPMISC_BIG_ENDIAN not set indicates little endian */
|
||||
#define AR9300_EEPMISC_LITTLE_ENDIAN 0
|
||||
|
||||
#define AR9300_OTP_BASE \
|
||||
((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x30000 : 0x14000)
|
||||
#define AR9300_OTP_STATUS \
|
||||
|
@ -112,6 +112,8 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
|
||||
#define ATH_TXFIFO_DEPTH 8
|
||||
#define ATH_TX_ERROR 0x01
|
||||
|
||||
#define ATH_AIRTIME_QUANTUM 300 /* usec */
|
||||
|
||||
/* Stop tx traffic 1ms before the GO goes away */
|
||||
#define ATH_P2P_PS_STOP_TIME 1000
|
||||
|
||||
@ -247,6 +249,9 @@ struct ath_atx_tid {
|
||||
bool has_queued;
|
||||
};
|
||||
|
||||
void __ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid);
|
||||
void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid);
|
||||
|
||||
struct ath_node {
|
||||
struct ath_softc *sc;
|
||||
struct ieee80211_sta *sta; /* station struct we're part of */
|
||||
@ -258,9 +263,12 @@ struct ath_node {
|
||||
|
||||
bool sleeping;
|
||||
bool no_ps_filter;
|
||||
s64 airtime_deficit[IEEE80211_NUM_ACS];
|
||||
u32 airtime_rx_start;
|
||||
|
||||
#ifdef CONFIG_ATH9K_STATION_STATISTICS
|
||||
struct ath_rx_rate_stats rx_rate_stats;
|
||||
struct ath_airtime_stats airtime_stats;
|
||||
#endif
|
||||
u8 key_idx[4];
|
||||
|
||||
@ -317,10 +325,16 @@ struct ath_rx {
|
||||
/* Channel Context */
|
||||
/*******************/
|
||||
|
||||
struct ath_acq {
|
||||
struct list_head acq_new;
|
||||
struct list_head acq_old;
|
||||
spinlock_t lock;
|
||||
};
|
||||
|
||||
struct ath_chanctx {
|
||||
struct cfg80211_chan_def chandef;
|
||||
struct list_head vifs;
|
||||
struct list_head acq[IEEE80211_NUM_ACS];
|
||||
struct ath_acq acq[IEEE80211_NUM_ACS];
|
||||
int hw_queue_base;
|
||||
|
||||
/* do not dereference, use for comparison only */
|
||||
@ -555,6 +569,15 @@ static inline void ath_chanctx_check_active(struct ath_softc *sc,
|
||||
|
||||
#endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
|
||||
|
||||
static inline void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq)
|
||||
{
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
}
|
||||
static inline void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq)
|
||||
{
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
}
|
||||
|
||||
void ath_startrecv(struct ath_softc *sc);
|
||||
bool ath_stoprecv(struct ath_softc *sc);
|
||||
u32 ath_calcrxfilter(struct ath_softc *sc);
|
||||
@ -562,8 +585,6 @@ int ath_rx_init(struct ath_softc *sc, int nbufs);
|
||||
void ath_rx_cleanup(struct ath_softc *sc);
|
||||
int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
|
||||
struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
|
||||
void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
|
||||
void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
|
||||
void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
|
||||
void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
|
||||
bool ath_drain_all_txq(struct ath_softc *sc);
|
||||
@ -575,6 +596,8 @@ void ath_txq_schedule_all(struct ath_softc *sc);
|
||||
int ath_tx_init(struct ath_softc *sc, int nbufs);
|
||||
int ath_txq_update(struct ath_softc *sc, int qnum,
|
||||
struct ath9k_tx_queue_info *q);
|
||||
u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
|
||||
int width, int half_gi, bool shortPreamble);
|
||||
void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
|
||||
void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
|
||||
int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
|
||||
@ -963,6 +986,11 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
|
||||
|
||||
#define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
|
||||
|
||||
#define AIRTIME_USE_TX BIT(0)
|
||||
#define AIRTIME_USE_RX BIT(1)
|
||||
#define AIRTIME_USE_NEW_QUEUES BIT(2)
|
||||
#define AIRTIME_ACTIVE(flags) (!!(flags & (AIRTIME_USE_TX|AIRTIME_USE_RX)))
|
||||
|
||||
struct ath_softc {
|
||||
struct ieee80211_hw *hw;
|
||||
struct device *dev;
|
||||
@ -1005,6 +1033,8 @@ struct ath_softc {
|
||||
short nbcnvifs;
|
||||
unsigned long ps_usecount;
|
||||
|
||||
u16 airtime_flags; /* AIRTIME_* */
|
||||
|
||||
struct ath_rx rx;
|
||||
struct ath_tx tx;
|
||||
struct ath_beacon beacon;
|
||||
|
@ -118,8 +118,11 @@ void ath_chanctx_init(struct ath_softc *sc)
|
||||
INIT_LIST_HEAD(&ctx->vifs);
|
||||
ctx->txpower = ATH_TXPOWER_MAX;
|
||||
ctx->flush_timeout = HZ / 5; /* 200ms */
|
||||
for (j = 0; j < ARRAY_SIZE(ctx->acq); j++)
|
||||
INIT_LIST_HEAD(&ctx->acq[j]);
|
||||
for (j = 0; j < ARRAY_SIZE(ctx->acq); j++) {
|
||||
INIT_LIST_HEAD(&ctx->acq[j].acq_new);
|
||||
INIT_LIST_HEAD(&ctx->acq[j].acq_old);
|
||||
spin_lock_init(&ctx->acq[j].lock);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1345,8 +1348,11 @@ void ath9k_offchannel_init(struct ath_softc *sc)
|
||||
ctx->txpower = ATH_TXPOWER_MAX;
|
||||
cfg80211_chandef_create(&ctx->chandef, chan, NL80211_CHAN_HT20);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ctx->acq); i++)
|
||||
INIT_LIST_HEAD(&ctx->acq[i]);
|
||||
for (i = 0; i < ARRAY_SIZE(ctx->acq); i++) {
|
||||
INIT_LIST_HEAD(&ctx->acq[i].acq_new);
|
||||
INIT_LIST_HEAD(&ctx->acq[i].acq_old);
|
||||
spin_lock_init(&ctx->acq[i].lock);
|
||||
}
|
||||
|
||||
sc->offchannel.chan.offchannel = true;
|
||||
}
|
||||
|
@ -1399,5 +1399,8 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
debugfs_create_file("tpc", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_tpc);
|
||||
|
||||
debugfs_create_u16("airtime_flags", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, &sc->airtime_flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -221,6 +221,11 @@ struct ath_rx_rate_stats {
|
||||
} cck_stats[4];
|
||||
};
|
||||
|
||||
struct ath_airtime_stats {
|
||||
u32 rx_airtime;
|
||||
u32 tx_airtime;
|
||||
};
|
||||
|
||||
#define ANT_MAIN 0
|
||||
#define ANT_ALT 1
|
||||
|
||||
@ -314,12 +319,20 @@ ath9k_debug_sync_cause(struct ath_softc *sc, u32 sync_cause)
|
||||
void ath_debug_rate_stats(struct ath_softc *sc,
|
||||
struct ath_rx_status *rs,
|
||||
struct sk_buff *skb);
|
||||
void ath_debug_airtime(struct ath_softc *sc,
|
||||
struct ath_node *an,
|
||||
u32 rx, u32 tx);
|
||||
#else
|
||||
static inline void ath_debug_rate_stats(struct ath_softc *sc,
|
||||
struct ath_rx_status *rs,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
}
|
||||
static inline void ath_debug_airtime(struct ath_softc *sc,
|
||||
struct ath_node *an,
|
||||
u32 rx, u32 tx)
|
||||
{
|
||||
}
|
||||
#endif /* CONFIG_ATH9K_STATION_STATISTICS */
|
||||
|
||||
#endif /* DEBUG_H */
|
||||
|
@ -242,6 +242,59 @@ static const struct file_operations fops_node_recv = {
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
void ath_debug_airtime(struct ath_softc *sc,
|
||||
struct ath_node *an,
|
||||
u32 rx,
|
||||
u32 tx)
|
||||
{
|
||||
struct ath_airtime_stats *astats = &an->airtime_stats;
|
||||
|
||||
astats->rx_airtime += rx;
|
||||
astats->tx_airtime += tx;
|
||||
}
|
||||
|
||||
static ssize_t read_airtime(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_node *an = file->private_data;
|
||||
struct ath_airtime_stats *astats;
|
||||
static const char *qname[4] = {
|
||||
"VO", "VI", "BE", "BK"
|
||||
};
|
||||
u32 len = 0, size = 256;
|
||||
char *buf;
|
||||
size_t retval;
|
||||
int i;
|
||||
|
||||
buf = kzalloc(size, GFP_KERNEL);
|
||||
if (buf == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
astats = &an->airtime_stats;
|
||||
|
||||
len += scnprintf(buf + len, size - len, "RX: %u us\n", astats->rx_airtime);
|
||||
len += scnprintf(buf + len, size - len, "TX: %u us\n", astats->tx_airtime);
|
||||
len += scnprintf(buf + len, size - len, "Deficit: ");
|
||||
for (i = 0; i < 4; i++)
|
||||
len += scnprintf(buf+len, size - len, "%s: %lld us ", qname[i], an->airtime_deficit[i]);
|
||||
if (len < size)
|
||||
buf[len++] = '\n';
|
||||
|
||||
retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
kfree(buf);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
static const struct file_operations fops_airtime = {
|
||||
.read = read_airtime,
|
||||
.open = simple_open,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
|
||||
void ath9k_sta_add_debugfs(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta,
|
||||
@ -251,4 +304,5 @@ void ath9k_sta_add_debugfs(struct ieee80211_hw *hw,
|
||||
|
||||
debugfs_create_file("node_aggr", S_IRUGO, dir, an, &fops_node_aggr);
|
||||
debugfs_create_file("node_recv", S_IRUGO, dir, an, &fops_node_recv);
|
||||
debugfs_create_file("airtime", S_IRUGO, dir, an, &fops_airtime);
|
||||
}
|
||||
|
@ -160,6 +160,7 @@ int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size)
|
||||
u16 magic;
|
||||
u16 *eepdata;
|
||||
int i;
|
||||
bool needs_byteswap = false;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) {
|
||||
@ -167,31 +168,40 @@ int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size)
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
*swap_needed = false;
|
||||
if (swab16(magic) == AR5416_EEPROM_MAGIC) {
|
||||
needs_byteswap = true;
|
||||
ath_dbg(common, EEPROM,
|
||||
"EEPROM needs byte-swapping to correct endianness.\n");
|
||||
} else if (magic != AR5416_EEPROM_MAGIC) {
|
||||
if (ath9k_hw_use_flash(ah)) {
|
||||
ath_dbg(common, EEPROM,
|
||||
"Ignoring invalid EEPROM magic (0x%04x).\n",
|
||||
magic);
|
||||
} else {
|
||||
ath_err(common,
|
||||
"Invalid EEPROM magic (0x%04x).\n", magic);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
if (needs_byteswap) {
|
||||
if (ah->ah_flags & AH_NO_EEP_SWAP) {
|
||||
ath_info(common,
|
||||
"Ignoring endianness difference in EEPROM magic bytes.\n");
|
||||
} else {
|
||||
*swap_needed = true;
|
||||
}
|
||||
} else if (magic != AR5416_EEPROM_MAGIC) {
|
||||
if (ath9k_hw_use_flash(ah))
|
||||
return 0;
|
||||
eepdata = (u16 *)(&ah->eeprom);
|
||||
|
||||
ath_err(common,
|
||||
"Invalid EEPROM Magic (0x%04x).\n", magic);
|
||||
return -EINVAL;
|
||||
for (i = 0; i < size; i++)
|
||||
eepdata[i] = swab16(eepdata[i]);
|
||||
}
|
||||
}
|
||||
|
||||
eepdata = (u16 *)(&ah->eeprom);
|
||||
|
||||
if (*swap_needed) {
|
||||
if (ah->eep_ops->get_eepmisc(ah) & AR5416_EEPMISC_BIG_ENDIAN) {
|
||||
*swap_needed = true;
|
||||
ath_dbg(common, EEPROM,
|
||||
"EEPROM Endianness is not native.. Changing.\n");
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
eepdata[i] = swab16(eepdata[i]);
|
||||
"Big Endian EEPROM detected according to EEPMISC register.\n");
|
||||
} else {
|
||||
*swap_needed = false;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -23,6 +23,17 @@
|
||||
#include <net/cfg80211.h>
|
||||
#include "ar9003_eeprom.h"
|
||||
|
||||
/* helpers to swap EEPROM fields, which are stored as __le16 or __le32. Since
|
||||
* we are 100% sure about it we __force these to u16/u32 for the swab calls to
|
||||
* silence the sparse checks. These macros are used when we have a Big Endian
|
||||
* EEPROM (according to AR5416_EEPMISC_BIG_ENDIAN) and need to convert the
|
||||
* fields to __le16/__le32.
|
||||
*/
|
||||
#define EEPROM_FIELD_SWAB16(field) \
|
||||
(field = (__force __le16)swab16((__force u16)field))
|
||||
#define EEPROM_FIELD_SWAB32(field) \
|
||||
(field = (__force __le32)swab32((__force u32)field))
|
||||
|
||||
#ifdef __BIG_ENDIAN
|
||||
#define AR5416_EEPROM_MAGIC 0x5aa5
|
||||
#else
|
||||
@ -99,7 +110,6 @@
|
||||
#define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x))
|
||||
#define ath9k_hw_use_flash(_ah) (!(_ah->ah_flags & AH_USE_EEPROM))
|
||||
|
||||
#define AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK)
|
||||
#define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \
|
||||
ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
|
||||
#define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \
|
||||
@ -121,6 +131,8 @@
|
||||
|
||||
#define AR5416_EEP_NO_BACK_VER 0x1
|
||||
#define AR5416_EEP_VER 0xE
|
||||
#define AR5416_EEP_VER_MAJOR_SHIFT 12
|
||||
#define AR5416_EEP_VER_MAJOR_MASK 0xF000
|
||||
#define AR5416_EEP_VER_MINOR_MASK 0x0FFF
|
||||
#define AR5416_EEP_MINOR_VER_2 0x2
|
||||
#define AR5416_EEP_MINOR_VER_3 0x3
|
||||
@ -161,6 +173,9 @@
|
||||
#define AR5416_EEP_TXGAIN_ORIGINAL 0
|
||||
#define AR5416_EEP_TXGAIN_HIGH_POWER 1
|
||||
|
||||
/* Endianness of EEPROM content */
|
||||
#define AR5416_EEPMISC_BIG_ENDIAN 0x01
|
||||
|
||||
#define AR5416_EEP4K_START_LOC 64
|
||||
#define AR5416_EEP4K_NUM_2G_CAL_PIERS 3
|
||||
#define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3
|
||||
@ -174,7 +189,6 @@
|
||||
#define AR9280_TX_GAIN_TABLE_SIZE 22
|
||||
|
||||
#define AR9287_EEP_VER 0xE
|
||||
#define AR9287_EEP_VER_MINOR_MASK 0xFFF
|
||||
#define AR9287_EEP_MINOR_VER_1 0x1
|
||||
#define AR9287_EEP_MINOR_VER_2 0x2
|
||||
#define AR9287_EEP_MINOR_VER_3 0x3
|
||||
@ -191,7 +205,6 @@
|
||||
#define AR9287_NUM_CTLS 12
|
||||
#define AR9287_NUM_BAND_EDGES 4
|
||||
#define AR9287_PD_GAIN_ICEPTS 1
|
||||
#define AR9287_EEPMISC_BIG_ENDIAN 0x01
|
||||
#define AR9287_EEPMISC_WOW 0x02
|
||||
#define AR9287_MAX_CHAINS 2
|
||||
#define AR9287_ANT_16S 32
|
||||
@ -228,7 +241,6 @@ enum eeprom_param {
|
||||
EEP_DB_5,
|
||||
EEP_OB_2,
|
||||
EEP_DB_2,
|
||||
EEP_MINOR_REV,
|
||||
EEP_TX_MASK,
|
||||
EEP_RX_MASK,
|
||||
EEP_FSTCLK_5G,
|
||||
@ -269,19 +281,19 @@ enum ath9k_hal_freq_band {
|
||||
};
|
||||
|
||||
struct base_eep_header {
|
||||
u16 length;
|
||||
u16 checksum;
|
||||
u16 version;
|
||||
__le16 length;
|
||||
__le16 checksum;
|
||||
__le16 version;
|
||||
u8 opCapFlags;
|
||||
u8 eepMisc;
|
||||
u16 regDmn[2];
|
||||
__le16 regDmn[2];
|
||||
u8 macAddr[6];
|
||||
u8 rxMask;
|
||||
u8 txMask;
|
||||
u16 rfSilent;
|
||||
u16 blueToothOptions;
|
||||
u16 deviceCap;
|
||||
u32 binBuildNumber;
|
||||
__le16 rfSilent;
|
||||
__le16 blueToothOptions;
|
||||
__le16 deviceCap;
|
||||
__le32 binBuildNumber;
|
||||
u8 deviceType;
|
||||
u8 pwdclkind;
|
||||
u8 fastClk5g;
|
||||
@ -299,33 +311,33 @@ struct base_eep_header {
|
||||
} __packed;
|
||||
|
||||
struct base_eep_header_4k {
|
||||
u16 length;
|
||||
u16 checksum;
|
||||
u16 version;
|
||||
__le16 length;
|
||||
__le16 checksum;
|
||||
__le16 version;
|
||||
u8 opCapFlags;
|
||||
u8 eepMisc;
|
||||
u16 regDmn[2];
|
||||
__le16 regDmn[2];
|
||||
u8 macAddr[6];
|
||||
u8 rxMask;
|
||||
u8 txMask;
|
||||
u16 rfSilent;
|
||||
u16 blueToothOptions;
|
||||
u16 deviceCap;
|
||||
u32 binBuildNumber;
|
||||
__le16 rfSilent;
|
||||
__le16 blueToothOptions;
|
||||
__le16 deviceCap;
|
||||
__le32 binBuildNumber;
|
||||
u8 deviceType;
|
||||
u8 txGainType;
|
||||
} __packed;
|
||||
|
||||
|
||||
struct spur_chan {
|
||||
u16 spurChan;
|
||||
__le16 spurChan;
|
||||
u8 spurRangeLow;
|
||||
u8 spurRangeHigh;
|
||||
} __packed;
|
||||
|
||||
struct modal_eep_header {
|
||||
u32 antCtrlChain[AR5416_MAX_CHAINS];
|
||||
u32 antCtrlCommon;
|
||||
__le32 antCtrlChain[AR5416_MAX_CHAINS];
|
||||
__le32 antCtrlCommon;
|
||||
u8 antennaGainCh[AR5416_MAX_CHAINS];
|
||||
u8 switchSettling;
|
||||
u8 txRxAttenCh[AR5416_MAX_CHAINS];
|
||||
@ -360,7 +372,7 @@ struct modal_eep_header {
|
||||
u8 db_ch1;
|
||||
u8 lna_ctl;
|
||||
u8 miscBits;
|
||||
u16 xpaBiasLvlFreq[3];
|
||||
__le16 xpaBiasLvlFreq[3];
|
||||
u8 futureModal[6];
|
||||
|
||||
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
|
||||
@ -374,8 +386,8 @@ struct calDataPerFreqOpLoop {
|
||||
} __packed;
|
||||
|
||||
struct modal_eep_4k_header {
|
||||
u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
|
||||
u32 antCtrlCommon;
|
||||
__le32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
|
||||
__le32 antCtrlCommon;
|
||||
u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS];
|
||||
u8 switchSettling;
|
||||
u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS];
|
||||
@ -439,19 +451,19 @@ struct modal_eep_4k_header {
|
||||
} __packed;
|
||||
|
||||
struct base_eep_ar9287_header {
|
||||
u16 length;
|
||||
u16 checksum;
|
||||
u16 version;
|
||||
__le16 length;
|
||||
__le16 checksum;
|
||||
__le16 version;
|
||||
u8 opCapFlags;
|
||||
u8 eepMisc;
|
||||
u16 regDmn[2];
|
||||
__le16 regDmn[2];
|
||||
u8 macAddr[6];
|
||||
u8 rxMask;
|
||||
u8 txMask;
|
||||
u16 rfSilent;
|
||||
u16 blueToothOptions;
|
||||
u16 deviceCap;
|
||||
u32 binBuildNumber;
|
||||
__le16 rfSilent;
|
||||
__le16 blueToothOptions;
|
||||
__le16 deviceCap;
|
||||
__le32 binBuildNumber;
|
||||
u8 deviceType;
|
||||
u8 openLoopPwrCntl;
|
||||
int8_t pwrTableOffset;
|
||||
@ -461,8 +473,8 @@ struct base_eep_ar9287_header {
|
||||
} __packed;
|
||||
|
||||
struct modal_eep_ar9287_header {
|
||||
u32 antCtrlChain[AR9287_MAX_CHAINS];
|
||||
u32 antCtrlCommon;
|
||||
__le32 antCtrlChain[AR9287_MAX_CHAINS];
|
||||
__le32 antCtrlCommon;
|
||||
int8_t antennaGainCh[AR9287_MAX_CHAINS];
|
||||
u8 switchSettling;
|
||||
u8 txRxAttenCh[AR9287_MAX_CHAINS];
|
||||
@ -653,6 +665,7 @@ struct eeprom_ops {
|
||||
u16 cfgCtl, u8 twiceAntennaReduction,
|
||||
u8 powerLimit, bool test);
|
||||
u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
|
||||
u8 (*get_eepmisc)(struct ath_hw *ah);
|
||||
};
|
||||
|
||||
void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val);
|
||||
|
@ -20,12 +20,17 @@
|
||||
|
||||
static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
|
||||
{
|
||||
return ((ah->eeprom.map4k.baseEepHeader.version >> 12) & 0xF);
|
||||
u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version);
|
||||
|
||||
return (version & AR5416_EEP_VER_MAJOR_MASK) >>
|
||||
AR5416_EEP_VER_MAJOR_SHIFT;
|
||||
}
|
||||
|
||||
static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
|
||||
{
|
||||
return ((ah->eeprom.map4k.baseEepHeader.version) & 0xFFF);
|
||||
u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version);
|
||||
|
||||
return version & AR5416_EEP_VER_MINOR_MASK;
|
||||
}
|
||||
|
||||
#define SIZE_EEPROM_4K (sizeof(struct ar5416_eeprom_4k) / sizeof(u16))
|
||||
@ -71,8 +76,8 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
|
||||
static u32 ath9k_dump_4k_modal_eeprom(char *buf, u32 len, u32 size,
|
||||
struct modal_eep_4k_header *modal_hdr)
|
||||
{
|
||||
PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]);
|
||||
PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon);
|
||||
PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
|
||||
PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
|
||||
PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
|
||||
PR_EEP("Switch Settle", modal_hdr->switchSettling);
|
||||
PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]);
|
||||
@ -127,6 +132,7 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
{
|
||||
struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
|
||||
struct base_eep_header_4k *pBase = &eep->baseEepHeader;
|
||||
u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
|
||||
|
||||
if (!dump_base_hdr) {
|
||||
len += scnprintf(buf + len, size - len,
|
||||
@ -136,12 +142,12 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
goto out;
|
||||
}
|
||||
|
||||
PR_EEP("Major Version", pBase->version >> 12);
|
||||
PR_EEP("Minor Version", pBase->version & 0xFFF);
|
||||
PR_EEP("Checksum", pBase->checksum);
|
||||
PR_EEP("Length", pBase->length);
|
||||
PR_EEP("RegDomain1", pBase->regDmn[0]);
|
||||
PR_EEP("RegDomain2", pBase->regDmn[1]);
|
||||
PR_EEP("Major Version", ath9k_hw_4k_get_eeprom_ver(ah));
|
||||
PR_EEP("Minor Version", ath9k_hw_4k_get_eeprom_rev(ah));
|
||||
PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
|
||||
PR_EEP("Length", le16_to_cpu(pBase->length));
|
||||
PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
|
||||
PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
|
||||
PR_EEP("TX Mask", pBase->txMask);
|
||||
PR_EEP("RX Mask", pBase->rxMask);
|
||||
PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
|
||||
@ -154,10 +160,10 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
AR5416_OPFLAGS_N_5G_HT20));
|
||||
PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
|
||||
AR5416_OPFLAGS_N_5G_HT40));
|
||||
PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));
|
||||
PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
|
||||
PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
|
||||
PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
|
||||
PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
|
||||
PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
|
||||
PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
|
||||
PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
|
||||
PR_EEP("TX Gain type", pBase->txGainType);
|
||||
|
||||
len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
|
||||
@ -189,54 +195,31 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
|
||||
return err;
|
||||
|
||||
if (need_swap)
|
||||
el = swab16(eep->baseEepHeader.length);
|
||||
el = swab16((__force u16)eep->baseEepHeader.length);
|
||||
else
|
||||
el = eep->baseEepHeader.length;
|
||||
el = le16_to_cpu(eep->baseEepHeader.length);
|
||||
|
||||
el = min(el / sizeof(u16), SIZE_EEPROM_4K);
|
||||
if (!ath9k_hw_nvram_validate_checksum(ah, el))
|
||||
return -EINVAL;
|
||||
|
||||
if (need_swap) {
|
||||
u32 integer;
|
||||
u16 word;
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
|
||||
EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon);
|
||||
|
||||
word = swab16(eep->baseEepHeader.length);
|
||||
eep->baseEepHeader.length = word;
|
||||
for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++)
|
||||
EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]);
|
||||
|
||||
word = swab16(eep->baseEepHeader.checksum);
|
||||
eep->baseEepHeader.checksum = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.version);
|
||||
eep->baseEepHeader.version = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.regDmn[0]);
|
||||
eep->baseEepHeader.regDmn[0] = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.regDmn[1]);
|
||||
eep->baseEepHeader.regDmn[1] = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.rfSilent);
|
||||
eep->baseEepHeader.rfSilent = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.blueToothOptions);
|
||||
eep->baseEepHeader.blueToothOptions = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.deviceCap);
|
||||
eep->baseEepHeader.deviceCap = word;
|
||||
|
||||
integer = swab32(eep->modalHeader.antCtrlCommon);
|
||||
eep->modalHeader.antCtrlCommon = integer;
|
||||
|
||||
for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
|
||||
integer = swab32(eep->modalHeader.antCtrlChain[i]);
|
||||
eep->modalHeader.antCtrlChain[i] = integer;
|
||||
}
|
||||
|
||||
for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
|
||||
word = swab16(eep->modalHeader.spurChans[i].spurChan);
|
||||
eep->modalHeader.spurChans[i].spurChan = word;
|
||||
}
|
||||
for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
|
||||
EEPROM_FIELD_SWAB16(
|
||||
eep->modalHeader.spurChans[i].spurChan);
|
||||
}
|
||||
|
||||
if (!ath9k_hw_nvram_check_version(ah, AR5416_EEP_VER,
|
||||
@ -254,9 +237,6 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
|
||||
struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
|
||||
struct modal_eep_4k_header *pModal = &eep->modalHeader;
|
||||
struct base_eep_header_4k *pBase = &eep->baseEepHeader;
|
||||
u16 ver_minor;
|
||||
|
||||
ver_minor = pBase->version & AR5416_EEP_VER_MINOR_MASK;
|
||||
|
||||
switch (param) {
|
||||
case EEP_NFTHRESH_2:
|
||||
@ -268,19 +248,17 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
|
||||
case EEP_MAC_MSW:
|
||||
return get_unaligned_be16(pBase->macAddr + 4);
|
||||
case EEP_REG_0:
|
||||
return pBase->regDmn[0];
|
||||
return le16_to_cpu(pBase->regDmn[0]);
|
||||
case EEP_OP_CAP:
|
||||
return pBase->deviceCap;
|
||||
return le16_to_cpu(pBase->deviceCap);
|
||||
case EEP_OP_MODE:
|
||||
return pBase->opCapFlags;
|
||||
case EEP_RF_SILENT:
|
||||
return pBase->rfSilent;
|
||||
return le16_to_cpu(pBase->rfSilent);
|
||||
case EEP_OB_2:
|
||||
return pModal->ob_0;
|
||||
case EEP_DB_2:
|
||||
return pModal->db1_1;
|
||||
case EEP_MINOR_REV:
|
||||
return ver_minor;
|
||||
case EEP_TX_MASK:
|
||||
return pBase->txMask;
|
||||
case EEP_RX_MASK:
|
||||
@ -319,14 +297,12 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
|
||||
|
||||
xpdMask = pEepData->modalHeader.xpdGain;
|
||||
|
||||
if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_2) {
|
||||
if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2)
|
||||
pdGainOverlap_t2 =
|
||||
pEepData->modalHeader.pdGainOverlap;
|
||||
} else {
|
||||
else
|
||||
pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5),
|
||||
AR_PHY_TPCRG5_PD_GAIN_OVERLAP));
|
||||
}
|
||||
|
||||
pCalBChans = pEepData->calFreqPier2G;
|
||||
numPiers = AR5416_EEP4K_NUM_2G_CAL_PIERS;
|
||||
@ -612,10 +588,8 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
|
||||
|
||||
memset(ratesArray, 0, sizeof(ratesArray));
|
||||
|
||||
if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_2) {
|
||||
if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2)
|
||||
ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
|
||||
}
|
||||
|
||||
ath9k_hw_set_4k_power_per_rate_table(ah, chan,
|
||||
&ratesArray[0], cfgCtl,
|
||||
@ -728,15 +702,14 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
|
||||
{
|
||||
ENABLE_REG_RMW_BUFFER(ah);
|
||||
REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0,
|
||||
pModal->antCtrlChain[0], 0);
|
||||
le32_to_cpu(pModal->antCtrlChain[0]), 0);
|
||||
|
||||
REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
|
||||
SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
|
||||
SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF),
|
||||
AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF);
|
||||
|
||||
if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_3) {
|
||||
if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
|
||||
txRxAttenLocal = pModal->txRxAttenCh[0];
|
||||
|
||||
REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
|
||||
@ -795,7 +768,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
|
||||
pModal = &eep->modalHeader;
|
||||
txRxAttenLocal = 23;
|
||||
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
|
||||
|
||||
/* Single chain for 4K EEPROM*/
|
||||
ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal);
|
||||
@ -1014,16 +987,14 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
|
||||
REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
|
||||
pModal->thresh62);
|
||||
|
||||
if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_2) {
|
||||
if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) {
|
||||
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START,
|
||||
pModal->txFrameToDataStart);
|
||||
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,
|
||||
pModal->txFrameToPaOn);
|
||||
}
|
||||
|
||||
if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_3) {
|
||||
if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
|
||||
if (IS_CHAN_HT40(chan))
|
||||
REG_RMW_FIELD(ah, AR_PHY_SETTLING,
|
||||
AR_PHY_SETTLING_SWITCH,
|
||||
@ -1061,7 +1032,12 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
|
||||
|
||||
static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
|
||||
{
|
||||
return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan;
|
||||
return le16_to_cpu(ah->eeprom.map4k.modalHeader.spurChans[i].spurChan);
|
||||
}
|
||||
|
||||
static u8 ath9k_hw_4k_get_eepmisc(struct ath_hw *ah)
|
||||
{
|
||||
return ah->eeprom.map4k.baseEepHeader.eepMisc;
|
||||
}
|
||||
|
||||
const struct eeprom_ops eep_4k_ops = {
|
||||
@ -1073,5 +1049,6 @@ const struct eeprom_ops eep_4k_ops = {
|
||||
.get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev,
|
||||
.set_board_values = ath9k_hw_4k_set_board_values,
|
||||
.set_txpower = ath9k_hw_4k_set_txpower,
|
||||
.get_spur_channel = ath9k_hw_4k_get_spur_channel
|
||||
.get_spur_channel = ath9k_hw_4k_get_spur_channel,
|
||||
.get_eepmisc = ath9k_hw_4k_get_eepmisc
|
||||
};
|
||||
|
@ -22,12 +22,17 @@
|
||||
|
||||
static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah)
|
||||
{
|
||||
return (ah->eeprom.map9287.baseEepHeader.version >> 12) & 0xF;
|
||||
u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version);
|
||||
|
||||
return (version & AR5416_EEP_VER_MAJOR_MASK) >>
|
||||
AR5416_EEP_VER_MAJOR_SHIFT;
|
||||
}
|
||||
|
||||
static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah)
|
||||
{
|
||||
return (ah->eeprom.map9287.baseEepHeader.version) & 0xFFF;
|
||||
u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version);
|
||||
|
||||
return version & AR5416_EEP_VER_MINOR_MASK;
|
||||
}
|
||||
|
||||
static bool __ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
|
||||
@ -74,9 +79,9 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
|
||||
static u32 ar9287_dump_modal_eeprom(char *buf, u32 len, u32 size,
|
||||
struct modal_eep_ar9287_header *modal_hdr)
|
||||
{
|
||||
PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]);
|
||||
PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]);
|
||||
PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon);
|
||||
PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
|
||||
PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1]));
|
||||
PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
|
||||
PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
|
||||
PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]);
|
||||
PR_EEP("Switch Settle", modal_hdr->switchSettling);
|
||||
@ -123,6 +128,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
{
|
||||
struct ar9287_eeprom *eep = &ah->eeprom.map9287;
|
||||
struct base_eep_ar9287_header *pBase = &eep->baseEepHeader;
|
||||
u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
|
||||
|
||||
if (!dump_base_hdr) {
|
||||
len += scnprintf(buf + len, size - len,
|
||||
@ -132,12 +138,12 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
goto out;
|
||||
}
|
||||
|
||||
PR_EEP("Major Version", pBase->version >> 12);
|
||||
PR_EEP("Minor Version", pBase->version & 0xFFF);
|
||||
PR_EEP("Checksum", pBase->checksum);
|
||||
PR_EEP("Length", pBase->length);
|
||||
PR_EEP("RegDomain1", pBase->regDmn[0]);
|
||||
PR_EEP("RegDomain2", pBase->regDmn[1]);
|
||||
PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah));
|
||||
PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah));
|
||||
PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
|
||||
PR_EEP("Length", le16_to_cpu(pBase->length));
|
||||
PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
|
||||
PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
|
||||
PR_EEP("TX Mask", pBase->txMask);
|
||||
PR_EEP("RX Mask", pBase->rxMask);
|
||||
PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
|
||||
@ -150,10 +156,10 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
AR5416_OPFLAGS_N_5G_HT20));
|
||||
PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
|
||||
AR5416_OPFLAGS_N_5G_HT40));
|
||||
PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));
|
||||
PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
|
||||
PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
|
||||
PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
|
||||
PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
|
||||
PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
|
||||
PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
|
||||
PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
|
||||
PR_EEP("Power Table Offset", pBase->pwrTableOffset);
|
||||
PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl);
|
||||
|
||||
@ -177,8 +183,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
|
||||
static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
|
||||
{
|
||||
u32 el, integer;
|
||||
u16 word;
|
||||
u32 el;
|
||||
int i, err;
|
||||
bool need_swap;
|
||||
struct ar9287_eeprom *eep = &ah->eeprom.map9287;
|
||||
@ -188,51 +193,31 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
|
||||
return err;
|
||||
|
||||
if (need_swap)
|
||||
el = swab16(eep->baseEepHeader.length);
|
||||
el = swab16((__force u16)eep->baseEepHeader.length);
|
||||
else
|
||||
el = eep->baseEepHeader.length;
|
||||
el = le16_to_cpu(eep->baseEepHeader.length);
|
||||
|
||||
el = min(el / sizeof(u16), SIZE_EEPROM_AR9287);
|
||||
if (!ath9k_hw_nvram_validate_checksum(ah, el))
|
||||
return -EINVAL;
|
||||
|
||||
if (need_swap) {
|
||||
word = swab16(eep->baseEepHeader.length);
|
||||
eep->baseEepHeader.length = word;
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
|
||||
EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon);
|
||||
|
||||
word = swab16(eep->baseEepHeader.checksum);
|
||||
eep->baseEepHeader.checksum = word;
|
||||
for (i = 0; i < AR9287_MAX_CHAINS; i++)
|
||||
EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]);
|
||||
|
||||
word = swab16(eep->baseEepHeader.version);
|
||||
eep->baseEepHeader.version = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.regDmn[0]);
|
||||
eep->baseEepHeader.regDmn[0] = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.regDmn[1]);
|
||||
eep->baseEepHeader.regDmn[1] = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.rfSilent);
|
||||
eep->baseEepHeader.rfSilent = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.blueToothOptions);
|
||||
eep->baseEepHeader.blueToothOptions = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.deviceCap);
|
||||
eep->baseEepHeader.deviceCap = word;
|
||||
|
||||
integer = swab32(eep->modalHeader.antCtrlCommon);
|
||||
eep->modalHeader.antCtrlCommon = integer;
|
||||
|
||||
for (i = 0; i < AR9287_MAX_CHAINS; i++) {
|
||||
integer = swab32(eep->modalHeader.antCtrlChain[i]);
|
||||
eep->modalHeader.antCtrlChain[i] = integer;
|
||||
}
|
||||
|
||||
for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
|
||||
word = swab16(eep->modalHeader.spurChans[i].spurChan);
|
||||
eep->modalHeader.spurChans[i].spurChan = word;
|
||||
}
|
||||
for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
|
||||
EEPROM_FIELD_SWAB16(
|
||||
eep->modalHeader.spurChans[i].spurChan);
|
||||
}
|
||||
|
||||
if (!ath9k_hw_nvram_check_version(ah, AR9287_EEP_VER,
|
||||
@ -250,9 +235,7 @@ static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah,
|
||||
struct ar9287_eeprom *eep = &ah->eeprom.map9287;
|
||||
struct modal_eep_ar9287_header *pModal = &eep->modalHeader;
|
||||
struct base_eep_ar9287_header *pBase = &eep->baseEepHeader;
|
||||
u16 ver_minor;
|
||||
|
||||
ver_minor = pBase->version & AR9287_EEP_VER_MINOR_MASK;
|
||||
u16 ver_minor = ath9k_hw_ar9287_get_eeprom_rev(ah);
|
||||
|
||||
switch (param) {
|
||||
case EEP_NFTHRESH_2:
|
||||
@ -264,15 +247,13 @@ static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah,
|
||||
case EEP_MAC_MSW:
|
||||
return get_unaligned_be16(pBase->macAddr + 4);
|
||||
case EEP_REG_0:
|
||||
return pBase->regDmn[0];
|
||||
return le16_to_cpu(pBase->regDmn[0]);
|
||||
case EEP_OP_CAP:
|
||||
return pBase->deviceCap;
|
||||
return le16_to_cpu(pBase->deviceCap);
|
||||
case EEP_OP_MODE:
|
||||
return pBase->opCapFlags;
|
||||
case EEP_RF_SILENT:
|
||||
return pBase->rfSilent;
|
||||
case EEP_MINOR_REV:
|
||||
return ver_minor;
|
||||
return le16_to_cpu(pBase->rfSilent);
|
||||
case EEP_TX_MASK:
|
||||
return pBase->txMask;
|
||||
case EEP_RX_MASK:
|
||||
@ -387,8 +368,7 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
|
||||
|
||||
xpdMask = pEepData->modalHeader.xpdGain;
|
||||
|
||||
if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >=
|
||||
AR9287_EEP_MINOR_VER_2)
|
||||
if (ath9k_hw_ar9287_get_eeprom_rev(ah) >= AR9287_EEP_MINOR_VER_2)
|
||||
pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap;
|
||||
else
|
||||
pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5),
|
||||
@ -737,8 +717,7 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
|
||||
|
||||
memset(ratesArray, 0, sizeof(ratesArray));
|
||||
|
||||
if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >=
|
||||
AR9287_EEP_MINOR_VER_2)
|
||||
if (ath9k_hw_ar9287_get_eeprom_rev(ah) >= AR9287_EEP_MINOR_VER_2)
|
||||
ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
|
||||
|
||||
ath9k_hw_set_ar9287_power_per_rate_table(ah, chan,
|
||||
@ -879,13 +858,13 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
|
||||
|
||||
pModal = &eep->modalHeader;
|
||||
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
|
||||
|
||||
for (i = 0; i < AR9287_MAX_CHAINS; i++) {
|
||||
regChainOffset = i * 0x1000;
|
||||
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
|
||||
pModal->antCtrlChain[i]);
|
||||
le32_to_cpu(pModal->antCtrlChain[i]));
|
||||
|
||||
REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
|
||||
(REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset)
|
||||
@ -983,7 +962,14 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
|
||||
static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
|
||||
u16 i, bool is2GHz)
|
||||
{
|
||||
return ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
|
||||
__le16 spur_ch = ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
|
||||
|
||||
return le16_to_cpu(spur_ch);
|
||||
}
|
||||
|
||||
static u8 ath9k_hw_ar9287_get_eepmisc(struct ath_hw *ah)
|
||||
{
|
||||
return ah->eeprom.map9287.baseEepHeader.eepMisc;
|
||||
}
|
||||
|
||||
const struct eeprom_ops eep_ar9287_ops = {
|
||||
@ -995,5 +981,6 @@ const struct eeprom_ops eep_ar9287_ops = {
|
||||
.get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev,
|
||||
.set_board_values = ath9k_hw_ar9287_set_board_values,
|
||||
.set_txpower = ath9k_hw_ar9287_set_txpower,
|
||||
.get_spur_channel = ath9k_hw_ar9287_get_spur_channel
|
||||
.get_spur_channel = ath9k_hw_ar9287_get_spur_channel,
|
||||
.get_eepmisc = ath9k_hw_ar9287_get_eepmisc
|
||||
};
|
||||
|
@ -79,12 +79,17 @@ static void ath9k_olc_get_pdadcs(struct ath_hw *ah,
|
||||
|
||||
static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah)
|
||||
{
|
||||
return ((ah->eeprom.def.baseEepHeader.version >> 12) & 0xF);
|
||||
u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version);
|
||||
|
||||
return (version & AR5416_EEP_VER_MAJOR_MASK) >>
|
||||
AR5416_EEP_VER_MAJOR_SHIFT;
|
||||
}
|
||||
|
||||
static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah)
|
||||
{
|
||||
return ((ah->eeprom.def.baseEepHeader.version) & 0xFFF);
|
||||
u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version);
|
||||
|
||||
return version & AR5416_EEP_VER_MINOR_MASK;
|
||||
}
|
||||
|
||||
#define SIZE_EEPROM_DEF (sizeof(struct ar5416_eeprom_def) / sizeof(u16))
|
||||
@ -130,10 +135,10 @@ static bool ath9k_hw_def_fill_eeprom(struct ath_hw *ah)
|
||||
static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size,
|
||||
struct modal_eep_header *modal_hdr)
|
||||
{
|
||||
PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]);
|
||||
PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]);
|
||||
PR_EEP("Chain2 Ant. Control", modal_hdr->antCtrlChain[2]);
|
||||
PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon);
|
||||
PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
|
||||
PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1]));
|
||||
PR_EEP("Chain2 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[2]));
|
||||
PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
|
||||
PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
|
||||
PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]);
|
||||
PR_EEP("Chain2 Ant. Gain", modal_hdr->antennaGainCh[2]);
|
||||
@ -189,9 +194,9 @@ static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size,
|
||||
PR_EEP("Chain1 OutputBias", modal_hdr->ob_ch1);
|
||||
PR_EEP("Chain1 DriverBias", modal_hdr->db_ch1);
|
||||
PR_EEP("LNA Control", modal_hdr->lna_ctl);
|
||||
PR_EEP("XPA Bias Freq0", modal_hdr->xpaBiasLvlFreq[0]);
|
||||
PR_EEP("XPA Bias Freq1", modal_hdr->xpaBiasLvlFreq[1]);
|
||||
PR_EEP("XPA Bias Freq2", modal_hdr->xpaBiasLvlFreq[2]);
|
||||
PR_EEP("XPA Bias Freq0", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[0]));
|
||||
PR_EEP("XPA Bias Freq1", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[1]));
|
||||
PR_EEP("XPA Bias Freq2", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[2]));
|
||||
|
||||
return len;
|
||||
}
|
||||
@ -201,6 +206,7 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
{
|
||||
struct ar5416_eeprom_def *eep = &ah->eeprom.def;
|
||||
struct base_eep_header *pBase = &eep->baseEepHeader;
|
||||
u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
|
||||
|
||||
if (!dump_base_hdr) {
|
||||
len += scnprintf(buf + len, size - len,
|
||||
@ -214,12 +220,12 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
goto out;
|
||||
}
|
||||
|
||||
PR_EEP("Major Version", pBase->version >> 12);
|
||||
PR_EEP("Minor Version", pBase->version & 0xFFF);
|
||||
PR_EEP("Checksum", pBase->checksum);
|
||||
PR_EEP("Length", pBase->length);
|
||||
PR_EEP("RegDomain1", pBase->regDmn[0]);
|
||||
PR_EEP("RegDomain2", pBase->regDmn[1]);
|
||||
PR_EEP("Major Version", ath9k_hw_def_get_eeprom_ver(ah));
|
||||
PR_EEP("Minor Version", ath9k_hw_def_get_eeprom_rev(ah));
|
||||
PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
|
||||
PR_EEP("Length", le16_to_cpu(pBase->length));
|
||||
PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
|
||||
PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
|
||||
PR_EEP("TX Mask", pBase->txMask);
|
||||
PR_EEP("RX Mask", pBase->rxMask);
|
||||
PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
|
||||
@ -232,10 +238,10 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
|
||||
AR5416_OPFLAGS_N_5G_HT20));
|
||||
PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
|
||||
AR5416_OPFLAGS_N_5G_HT40));
|
||||
PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));
|
||||
PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
|
||||
PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
|
||||
PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
|
||||
PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
|
||||
PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
|
||||
PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
|
||||
PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
|
||||
PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl);
|
||||
|
||||
len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
|
||||
@ -268,61 +274,40 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
|
||||
return err;
|
||||
|
||||
if (need_swap)
|
||||
el = swab16(eep->baseEepHeader.length);
|
||||
el = swab16((__force u16)eep->baseEepHeader.length);
|
||||
else
|
||||
el = eep->baseEepHeader.length;
|
||||
el = le16_to_cpu(eep->baseEepHeader.length);
|
||||
|
||||
el = min(el / sizeof(u16), SIZE_EEPROM_DEF);
|
||||
if (!ath9k_hw_nvram_validate_checksum(ah, el))
|
||||
return -EINVAL;
|
||||
|
||||
if (need_swap) {
|
||||
u32 integer, j;
|
||||
u16 word;
|
||||
u32 j;
|
||||
|
||||
word = swab16(eep->baseEepHeader.length);
|
||||
eep->baseEepHeader.length = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.checksum);
|
||||
eep->baseEepHeader.checksum = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.version);
|
||||
eep->baseEepHeader.version = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.regDmn[0]);
|
||||
eep->baseEepHeader.regDmn[0] = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.regDmn[1]);
|
||||
eep->baseEepHeader.regDmn[1] = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.rfSilent);
|
||||
eep->baseEepHeader.rfSilent = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.blueToothOptions);
|
||||
eep->baseEepHeader.blueToothOptions = word;
|
||||
|
||||
word = swab16(eep->baseEepHeader.deviceCap);
|
||||
eep->baseEepHeader.deviceCap = word;
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
|
||||
EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
|
||||
|
||||
for (j = 0; j < ARRAY_SIZE(eep->modalHeader); j++) {
|
||||
struct modal_eep_header *pModal =
|
||||
&eep->modalHeader[j];
|
||||
integer = swab32(pModal->antCtrlCommon);
|
||||
pModal->antCtrlCommon = integer;
|
||||
EEPROM_FIELD_SWAB32(pModal->antCtrlCommon);
|
||||
|
||||
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
|
||||
integer = swab32(pModal->antCtrlChain[i]);
|
||||
pModal->antCtrlChain[i] = integer;
|
||||
}
|
||||
for (i = 0; i < 3; i++) {
|
||||
word = swab16(pModal->xpaBiasLvlFreq[i]);
|
||||
pModal->xpaBiasLvlFreq[i] = word;
|
||||
}
|
||||
for (i = 0; i < AR5416_MAX_CHAINS; i++)
|
||||
EEPROM_FIELD_SWAB32(pModal->antCtrlChain[i]);
|
||||
|
||||
for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
|
||||
word = swab16(pModal->spurChans[i].spurChan);
|
||||
pModal->spurChans[i].spurChan = word;
|
||||
}
|
||||
for (i = 0; i < 3; i++)
|
||||
EEPROM_FIELD_SWAB16(pModal->xpaBiasLvlFreq[i]);
|
||||
|
||||
for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
|
||||
EEPROM_FIELD_SWAB16(
|
||||
pModal->spurChans[i].spurChan);
|
||||
}
|
||||
}
|
||||
|
||||
@ -332,7 +317,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
|
||||
|
||||
/* Enable fixup for AR_AN_TOP2 if necessary */
|
||||
if ((ah->hw_version.devid == AR9280_DEVID_PCI) &&
|
||||
((eep->baseEepHeader.version & 0xff) > 0x0a) &&
|
||||
((le16_to_cpu(eep->baseEepHeader.version) & 0xff) > 0x0a) &&
|
||||
(eep->baseEepHeader.pwdclkind == 0))
|
||||
ah->need_an_top2_fixup = true;
|
||||
|
||||
@ -365,13 +350,13 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
|
||||
case EEP_MAC_MSW:
|
||||
return get_unaligned_be16(pBase->macAddr + 4);
|
||||
case EEP_REG_0:
|
||||
return pBase->regDmn[0];
|
||||
return le16_to_cpu(pBase->regDmn[0]);
|
||||
case EEP_OP_CAP:
|
||||
return pBase->deviceCap;
|
||||
return le16_to_cpu(pBase->deviceCap);
|
||||
case EEP_OP_MODE:
|
||||
return pBase->opCapFlags;
|
||||
case EEP_RF_SILENT:
|
||||
return pBase->rfSilent;
|
||||
return le16_to_cpu(pBase->rfSilent);
|
||||
case EEP_OB_5:
|
||||
return pModal[0].ob;
|
||||
case EEP_DB_5:
|
||||
@ -380,8 +365,6 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
|
||||
return pModal[1].ob;
|
||||
case EEP_DB_2:
|
||||
return pModal[1].db;
|
||||
case EEP_MINOR_REV:
|
||||
return AR5416_VER_MASK;
|
||||
case EEP_TX_MASK:
|
||||
return pBase->txMask;
|
||||
case EEP_RX_MASK:
|
||||
@ -393,27 +376,27 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
|
||||
case EEP_TXGAIN_TYPE:
|
||||
return pBase->txGainType;
|
||||
case EEP_OL_PWRCTRL:
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19)
|
||||
return pBase->openLoopPwrCntl ? true : false;
|
||||
else
|
||||
return false;
|
||||
case EEP_RC_CHAIN_MASK:
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19)
|
||||
return pBase->rcChainMask;
|
||||
else
|
||||
return 0;
|
||||
case EEP_DAC_HPWR_5G:
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20)
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_20)
|
||||
return pBase->dacHiPwrMode_5G;
|
||||
else
|
||||
return 0;
|
||||
case EEP_FRAC_N_5G:
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_22)
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_22)
|
||||
return pBase->frac_n_5g;
|
||||
else
|
||||
return 0;
|
||||
case EEP_PWR_TABLE_OFFSET:
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_21)
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_21)
|
||||
return pBase->pwr_table_offset;
|
||||
else
|
||||
return AR5416_PWR_TABLE_OFFSET_DB;
|
||||
@ -436,7 +419,7 @@ static void ath9k_hw_def_set_gain(struct ath_hw *ah,
|
||||
u8 txRxAttenLocal, int regChainOffset, int i)
|
||||
{
|
||||
ENABLE_REG_RMW_BUFFER(ah);
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
|
||||
txRxAttenLocal = pModal->txRxAttenCh[i];
|
||||
|
||||
if (AR_SREV_9280_20_OR_LATER(ah)) {
|
||||
@ -487,11 +470,13 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
||||
struct ar5416_eeprom_def *eep = &ah->eeprom.def;
|
||||
int i, regChainOffset;
|
||||
u8 txRxAttenLocal;
|
||||
u32 antCtrlCommon;
|
||||
|
||||
pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
|
||||
txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44;
|
||||
antCtrlCommon = le32_to_cpu(pModal->antCtrlCommon);
|
||||
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff);
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_COM, antCtrlCommon & 0xffff);
|
||||
|
||||
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
|
||||
if (AR_SREV_9280(ah)) {
|
||||
@ -505,7 +490,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
||||
regChainOffset = i * 0x1000;
|
||||
|
||||
REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
|
||||
pModal->antCtrlChain[i]);
|
||||
le32_to_cpu(pModal->antCtrlChain[i]));
|
||||
|
||||
REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
|
||||
(REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &
|
||||
@ -605,7 +590,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
||||
pModal->thresh62);
|
||||
}
|
||||
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_2) {
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) {
|
||||
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,
|
||||
AR_PHY_TX_END_DATA_START,
|
||||
pModal->txFrameToDataStart);
|
||||
@ -613,7 +598,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
||||
pModal->txFrameToPaOn);
|
||||
}
|
||||
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
|
||||
if (IS_CHAN_HT40(chan))
|
||||
REG_RMW_FIELD(ah, AR_PHY_SETTLING,
|
||||
AR_PHY_SETTLING_SWITCH,
|
||||
@ -621,13 +606,14 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
||||
}
|
||||
|
||||
if (AR_SREV_9280_20_OR_LATER(ah) &&
|
||||
AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
|
||||
ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19)
|
||||
REG_RMW_FIELD(ah, AR_PHY_CCK_TX_CTRL,
|
||||
AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK,
|
||||
pModal->miscBits);
|
||||
|
||||
|
||||
if (AR_SREV_9280_20(ah) && AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20) {
|
||||
if (AR_SREV_9280_20(ah) &&
|
||||
ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_20) {
|
||||
if (IS_CHAN_2GHZ(chan))
|
||||
REG_RMW_FIELD(ah, AR_AN_TOP1, AR_AN_TOP1_DACIPMODE,
|
||||
eep->baseEepHeader.dacLpMode);
|
||||
@ -651,7 +637,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
||||
static void ath9k_hw_def_set_addac(struct ath_hw *ah,
|
||||
struct ath9k_channel *chan)
|
||||
{
|
||||
#define XPA_LVL_FREQ(cnt) (pModal->xpaBiasLvlFreq[cnt])
|
||||
#define XPA_LVL_FREQ(cnt) (le16_to_cpu(pModal->xpaBiasLvlFreq[cnt]))
|
||||
struct modal_eep_header *pModal;
|
||||
struct ar5416_eeprom_def *eep = &ah->eeprom.def;
|
||||
u8 biaslevel;
|
||||
@ -798,8 +784,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
|
||||
|
||||
pwr_table_offset = ah->eep_ops->get_eeprom(ah, EEP_PWR_TABLE_OFFSET);
|
||||
|
||||
if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_2) {
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) {
|
||||
pdGainOverlap_t2 =
|
||||
pEepData->modalHeader[modalIdx].pdGainOverlap;
|
||||
} else {
|
||||
@ -1171,10 +1156,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
|
||||
|
||||
memset(ratesArray, 0, sizeof(ratesArray));
|
||||
|
||||
if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||
AR5416_EEP_MINOR_VER_2) {
|
||||
if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2)
|
||||
ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
|
||||
}
|
||||
|
||||
ath9k_hw_set_def_power_per_rate_table(ah, chan,
|
||||
&ratesArray[0], cfgCtl,
|
||||
@ -1314,7 +1297,14 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
|
||||
|
||||
static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
|
||||
{
|
||||
return ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
|
||||
__le16 spch = ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
|
||||
|
||||
return le16_to_cpu(spch);
|
||||
}
|
||||
|
||||
static u8 ath9k_hw_def_get_eepmisc(struct ath_hw *ah)
|
||||
{
|
||||
return ah->eeprom.def.baseEepHeader.eepMisc;
|
||||
}
|
||||
|
||||
const struct eeprom_ops eep_def_ops = {
|
||||
@ -1327,5 +1317,6 @@ const struct eeprom_ops eep_def_ops = {
|
||||
.set_board_values = ath9k_hw_def_set_board_values,
|
||||
.set_addac = ath9k_hw_def_set_addac,
|
||||
.set_txpower = ath9k_hw_def_set_txpower,
|
||||
.get_spur_channel = ath9k_hw_def_get_spur_channel
|
||||
.get_spur_channel = ath9k_hw_def_get_spur_channel,
|
||||
.get_eepmisc = ath9k_hw_def_get_eepmisc
|
||||
};
|
||||
|
@ -620,6 +620,8 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
|
||||
|
||||
/* Will be cleared in ath9k_start() */
|
||||
set_bit(ATH_OP_INVALID, &common->op_flags);
|
||||
sc->airtime_flags = (AIRTIME_USE_TX | AIRTIME_USE_RX |
|
||||
AIRTIME_USE_NEW_QUEUES);
|
||||
|
||||
sc->sc_ah = ah;
|
||||
sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
|
||||
|
@ -70,10 +70,10 @@ static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
|
||||
goto out;
|
||||
|
||||
if (txq->mac80211_qnum >= 0) {
|
||||
struct list_head *list;
|
||||
struct ath_acq *acq;
|
||||
|
||||
list = &sc->cur_chan->acq[txq->mac80211_qnum];
|
||||
if (!list_empty(list))
|
||||
acq = &sc->cur_chan->acq[txq->mac80211_qnum];
|
||||
if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
|
||||
pending = true;
|
||||
}
|
||||
out:
|
||||
|
@ -1002,6 +1002,70 @@ static void ath9k_apply_ampdu_details(struct ath_softc *sc,
|
||||
}
|
||||
}
|
||||
|
||||
static void ath_rx_count_airtime(struct ath_softc *sc,
|
||||
struct ath_rx_status *rs,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath_node *an;
|
||||
struct ath_acq *acq;
|
||||
struct ath_vif *avp;
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
struct ieee80211_sta *sta;
|
||||
struct ieee80211_rx_status *rxs;
|
||||
const struct ieee80211_rate *rate;
|
||||
bool is_sgi, is_40, is_sp;
|
||||
int phy;
|
||||
u16 len = rs->rs_datalen;
|
||||
u32 airtime = 0;
|
||||
u8 tidno, acno;
|
||||
|
||||
if (!ieee80211_is_data(hdr->frame_control))
|
||||
return;
|
||||
|
||||
rcu_read_lock();
|
||||
|
||||
sta = ieee80211_find_sta_by_ifaddr(sc->hw, hdr->addr2, NULL);
|
||||
if (!sta)
|
||||
goto exit;
|
||||
an = (struct ath_node *) sta->drv_priv;
|
||||
avp = (struct ath_vif *) an->vif->drv_priv;
|
||||
tidno = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
|
||||
acno = TID_TO_WME_AC(tidno);
|
||||
acq = &avp->chanctx->acq[acno];
|
||||
|
||||
rxs = IEEE80211_SKB_RXCB(skb);
|
||||
|
||||
is_sgi = !!(rxs->flag & RX_FLAG_SHORT_GI);
|
||||
is_40 = !!(rxs->flag & RX_FLAG_40MHZ);
|
||||
is_sp = !!(rxs->flag & RX_FLAG_SHORTPRE);
|
||||
|
||||
if (!!(rxs->flag & RX_FLAG_HT)) {
|
||||
/* MCS rates */
|
||||
|
||||
airtime += ath_pkt_duration(sc, rxs->rate_idx, len,
|
||||
is_40, is_sgi, is_sp);
|
||||
} else {
|
||||
|
||||
phy = IS_CCK_RATE(rs->rs_rate) ? WLAN_RC_PHY_CCK : WLAN_RC_PHY_OFDM;
|
||||
rate = &common->sbands[rxs->band].bitrates[rxs->rate_idx];
|
||||
airtime += ath9k_hw_computetxtime(ah, phy, rate->bitrate * 100,
|
||||
len, rxs->rate_idx, is_sp);
|
||||
}
|
||||
|
||||
if (!!(sc->airtime_flags & AIRTIME_USE_RX)) {
|
||||
spin_lock_bh(&acq->lock);
|
||||
an->airtime_deficit[acno] -= airtime;
|
||||
if (an->airtime_deficit[acno] <= 0)
|
||||
__ath_tx_queue_tid(sc, ATH_AN_2_TID(an, tidno));
|
||||
spin_unlock_bh(&acq->lock);
|
||||
}
|
||||
ath_debug_airtime(sc, an, airtime, 0);
|
||||
exit:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
|
||||
{
|
||||
struct ath_rxbuf *bf;
|
||||
@ -1148,6 +1212,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
|
||||
ath9k_antenna_check(sc, &rs);
|
||||
ath9k_apply_ampdu_details(sc, &rs, rxs);
|
||||
ath_debug_rate_stats(sc, &rs, skb);
|
||||
ath_rx_count_airtime(sc, &rs, skb);
|
||||
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
if (ieee80211_is_ack(hdr->frame_control))
|
||||
|
@ -97,18 +97,6 @@ static void ath_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
|
||||
dev_kfree_skb(skb);
|
||||
}
|
||||
|
||||
void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq)
|
||||
__acquires(&txq->axq_lock)
|
||||
{
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
}
|
||||
|
||||
void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq)
|
||||
__releases(&txq->axq_lock)
|
||||
{
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
}
|
||||
|
||||
void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq)
|
||||
__releases(&txq->axq_lock)
|
||||
{
|
||||
@ -124,21 +112,44 @@ void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq)
|
||||
ath_tx_status(hw, skb);
|
||||
}
|
||||
|
||||
static void ath_tx_queue_tid(struct ath_softc *sc, struct ath_txq *txq,
|
||||
struct ath_atx_tid *tid)
|
||||
void __ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
|
||||
{
|
||||
struct list_head *list;
|
||||
struct ath_vif *avp = (struct ath_vif *) tid->an->vif->drv_priv;
|
||||
struct ath_chanctx *ctx = avp->chanctx;
|
||||
struct ath_acq *acq;
|
||||
struct list_head *tid_list;
|
||||
u8 acno = TID_TO_WME_AC(tid->tidno);
|
||||
|
||||
if (!ctx)
|
||||
if (!ctx || !list_empty(&tid->list))
|
||||
return;
|
||||
|
||||
list = &ctx->acq[TID_TO_WME_AC(tid->tidno)];
|
||||
if (list_empty(&tid->list))
|
||||
list_add_tail(&tid->list, list);
|
||||
|
||||
acq = &ctx->acq[acno];
|
||||
if ((sc->airtime_flags & AIRTIME_USE_NEW_QUEUES) &&
|
||||
tid->an->airtime_deficit[acno] > 0)
|
||||
tid_list = &acq->acq_new;
|
||||
else
|
||||
tid_list = &acq->acq_old;
|
||||
|
||||
list_add_tail(&tid->list, tid_list);
|
||||
}
|
||||
|
||||
void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
|
||||
{
|
||||
struct ath_vif *avp = (struct ath_vif *) tid->an->vif->drv_priv;
|
||||
struct ath_chanctx *ctx = avp->chanctx;
|
||||
struct ath_acq *acq;
|
||||
|
||||
if (!ctx || !list_empty(&tid->list))
|
||||
return;
|
||||
|
||||
acq = &ctx->acq[TID_TO_WME_AC(tid->tidno)];
|
||||
spin_lock_bh(&acq->lock);
|
||||
__ath_tx_queue_tid(sc, tid);
|
||||
spin_unlock_bh(&acq->lock);
|
||||
}
|
||||
|
||||
|
||||
void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
@ -153,7 +164,7 @@ void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue)
|
||||
ath_txq_lock(sc, txq);
|
||||
|
||||
tid->has_queued = true;
|
||||
ath_tx_queue_tid(sc, txq, tid);
|
||||
ath_tx_queue_tid(sc, tid);
|
||||
ath_txq_schedule(sc, txq);
|
||||
|
||||
ath_txq_unlock(sc, txq);
|
||||
@ -660,7 +671,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
|
||||
skb_queue_splice_tail(&bf_pending, &tid->retry_q);
|
||||
if (!an->sleeping) {
|
||||
ath_tx_queue_tid(sc, txq, tid);
|
||||
ath_tx_queue_tid(sc, tid);
|
||||
|
||||
if (ts->ts_status & (ATH9K_TXERR_FILT | ATH9K_TXERR_XRETRY))
|
||||
tid->clear_ps_filter = true;
|
||||
@ -688,6 +699,53 @@ static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
|
||||
return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
|
||||
}
|
||||
|
||||
static void ath_tx_count_airtime(struct ath_softc *sc, struct ath_txq *txq,
|
||||
struct ath_buf *bf, struct ath_tx_status *ts)
|
||||
{
|
||||
struct ath_node *an;
|
||||
struct ath_acq *acq = &sc->cur_chan->acq[txq->mac80211_qnum];
|
||||
struct sk_buff *skb;
|
||||
struct ieee80211_hdr *hdr;
|
||||
struct ieee80211_hw *hw = sc->hw;
|
||||
struct ieee80211_tx_rate rates[4];
|
||||
struct ieee80211_sta *sta;
|
||||
int i;
|
||||
u32 airtime = 0;
|
||||
|
||||
skb = bf->bf_mpdu;
|
||||
if(!skb)
|
||||
return;
|
||||
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
memcpy(rates, bf->rates, sizeof(rates));
|
||||
|
||||
rcu_read_lock();
|
||||
|
||||
sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr1, hdr->addr2);
|
||||
if(!sta)
|
||||
goto exit;
|
||||
|
||||
|
||||
an = (struct ath_node *) sta->drv_priv;
|
||||
|
||||
airtime += ts->duration * (ts->ts_longretry + 1);
|
||||
|
||||
for(i=0; i < ts->ts_rateindex; i++)
|
||||
airtime += ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc, i) * rates[i].count;
|
||||
|
||||
if (!!(sc->airtime_flags & AIRTIME_USE_TX)) {
|
||||
spin_lock_bh(&acq->lock);
|
||||
an->airtime_deficit[txq->mac80211_qnum] -= airtime;
|
||||
if (an->airtime_deficit[txq->mac80211_qnum] <= 0)
|
||||
__ath_tx_queue_tid(sc, ath_get_skb_tid(sc, an, skb));
|
||||
spin_unlock_bh(&acq->lock);
|
||||
}
|
||||
ath_debug_airtime(sc, an, 0, airtime);
|
||||
|
||||
exit:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
|
||||
struct ath_tx_status *ts, struct ath_buf *bf,
|
||||
struct list_head *bf_head)
|
||||
@ -709,6 +767,7 @@ static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
|
||||
|
||||
ts->duration = ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc,
|
||||
ts->ts_rateindex);
|
||||
ath_tx_count_airtime(sc, txq, bf, ts);
|
||||
|
||||
hdr = (struct ieee80211_hdr *) bf->bf_mpdu->data;
|
||||
sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr1, hdr->addr2);
|
||||
@ -1068,8 +1127,8 @@ finish:
|
||||
* width - 0 for 20 MHz, 1 for 40 MHz
|
||||
* half_gi - to use 4us v/s 3.6 us for symbol time
|
||||
*/
|
||||
static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
|
||||
int width, int half_gi, bool shortPreamble)
|
||||
u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
|
||||
int width, int half_gi, bool shortPreamble)
|
||||
{
|
||||
u32 nbits, nsymbits, duration, nsymbols;
|
||||
int streams;
|
||||
@ -1151,8 +1210,9 @@ static u8 ath_get_rate_txpower(struct ath_softc *sc, struct ath_buf *bf,
|
||||
if (is_40) {
|
||||
u8 power_ht40delta;
|
||||
struct ar5416_eeprom_def *eep = &ah->eeprom.def;
|
||||
u16 eeprom_rev = ah->eep_ops->get_eeprom_rev(ah);
|
||||
|
||||
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_2) {
|
||||
if (eeprom_rev >= AR5416_EEP_MINOR_VER_2) {
|
||||
bool is_2ghz;
|
||||
struct modal_eep_header *pmodal;
|
||||
|
||||
@ -1467,7 +1527,7 @@ ath_tx_form_burst(struct ath_softc *sc, struct ath_txq *txq,
|
||||
}
|
||||
|
||||
static bool ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
struct ath_atx_tid *tid, bool *stop)
|
||||
struct ath_atx_tid *tid)
|
||||
{
|
||||
struct ath_buf *bf;
|
||||
struct ieee80211_tx_info *tx_info;
|
||||
@ -1489,7 +1549,6 @@ static bool ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
if ((aggr && txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) ||
|
||||
(!aggr && txq->axq_depth >= ATH_NON_AGGR_MIN_QDEPTH)) {
|
||||
__skb_queue_tail(&tid->retry_q, bf->bf_mpdu);
|
||||
*stop = true;
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -1613,7 +1672,7 @@ void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an)
|
||||
ath_txq_lock(sc, txq);
|
||||
tid->clear_ps_filter = true;
|
||||
if (ath_tid_has_buffered(tid)) {
|
||||
ath_tx_queue_tid(sc, txq, tid);
|
||||
ath_tx_queue_tid(sc, tid);
|
||||
ath_txq_schedule(sc, txq);
|
||||
}
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
@ -1912,9 +1971,10 @@ void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
|
||||
void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
struct ath_atx_tid *tid, *last_tid;
|
||||
struct ath_atx_tid *tid;
|
||||
struct list_head *tid_list;
|
||||
bool sent = false;
|
||||
struct ath_acq *acq;
|
||||
bool active = AIRTIME_ACTIVE(sc->airtime_flags);
|
||||
|
||||
if (txq->mac80211_qnum < 0)
|
||||
return;
|
||||
@ -1923,48 +1983,55 @@ void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
|
||||
return;
|
||||
|
||||
spin_lock_bh(&sc->chan_lock);
|
||||
tid_list = &sc->cur_chan->acq[txq->mac80211_qnum];
|
||||
|
||||
if (list_empty(tid_list)) {
|
||||
spin_unlock_bh(&sc->chan_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
rcu_read_lock();
|
||||
acq = &sc->cur_chan->acq[txq->mac80211_qnum];
|
||||
|
||||
last_tid = list_entry(tid_list->prev, struct ath_atx_tid, list);
|
||||
while (!list_empty(tid_list)) {
|
||||
bool stop = false;
|
||||
if (sc->cur_chan->stopped)
|
||||
goto out;
|
||||
|
||||
if (sc->cur_chan->stopped)
|
||||
break;
|
||||
begin:
|
||||
tid_list = &acq->acq_new;
|
||||
if (list_empty(tid_list)) {
|
||||
tid_list = &acq->acq_old;
|
||||
if (list_empty(tid_list))
|
||||
goto out;
|
||||
}
|
||||
tid = list_first_entry(tid_list, struct ath_atx_tid, list);
|
||||
|
||||
tid = list_first_entry(tid_list, struct ath_atx_tid, list);
|
||||
list_del_init(&tid->list);
|
||||
|
||||
if (ath_tx_sched_aggr(sc, txq, tid, &stop))
|
||||
sent = true;
|
||||
|
||||
/*
|
||||
* add tid to round-robin queue if more frames
|
||||
* are pending for the tid
|
||||
*/
|
||||
if (ath_tid_has_buffered(tid))
|
||||
ath_tx_queue_tid(sc, txq, tid);
|
||||
|
||||
if (stop)
|
||||
break;
|
||||
|
||||
if (tid == last_tid) {
|
||||
if (!sent)
|
||||
break;
|
||||
|
||||
sent = false;
|
||||
last_tid = list_entry(tid_list->prev,
|
||||
struct ath_atx_tid, list);
|
||||
}
|
||||
if (active && tid->an->airtime_deficit[txq->mac80211_qnum] <= 0) {
|
||||
spin_lock_bh(&acq->lock);
|
||||
tid->an->airtime_deficit[txq->mac80211_qnum] += ATH_AIRTIME_QUANTUM;
|
||||
list_move_tail(&tid->list, &acq->acq_old);
|
||||
spin_unlock_bh(&acq->lock);
|
||||
goto begin;
|
||||
}
|
||||
|
||||
if (!ath_tid_has_buffered(tid)) {
|
||||
spin_lock_bh(&acq->lock);
|
||||
if ((tid_list == &acq->acq_new) && !list_empty(&acq->acq_old))
|
||||
list_move_tail(&tid->list, &acq->acq_old);
|
||||
else {
|
||||
list_del_init(&tid->list);
|
||||
}
|
||||
spin_unlock_bh(&acq->lock);
|
||||
goto begin;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* If we succeed in scheduling something, immediately restart to make
|
||||
* sure we keep the HW busy.
|
||||
*/
|
||||
if(ath_tx_sched_aggr(sc, txq, tid)) {
|
||||
if (!active) {
|
||||
spin_lock_bh(&acq->lock);
|
||||
list_move_tail(&tid->list, &acq->acq_old);
|
||||
spin_unlock_bh(&acq->lock);
|
||||
}
|
||||
goto begin;
|
||||
}
|
||||
|
||||
out:
|
||||
rcu_read_unlock();
|
||||
spin_unlock_bh(&sc->chan_lock);
|
||||
}
|
||||
@ -2818,6 +2885,9 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
|
||||
struct ath_atx_tid *tid;
|
||||
int tidno, acno;
|
||||
|
||||
for (acno = 0; acno < IEEE80211_NUM_ACS; acno++)
|
||||
an->airtime_deficit[acno] = ATH_AIRTIME_QUANTUM;
|
||||
|
||||
for (tidno = 0; tidno < IEEE80211_NUM_TIDS; tidno++) {
|
||||
tid = ath_node_to_tid(an, tidno);
|
||||
tid->an = an;
|
||||
|
@ -3971,7 +3971,7 @@ brcmf_configure_wpaie(struct brcmf_if *ifp,
|
||||
pval |= AES_ENABLED;
|
||||
break;
|
||||
default:
|
||||
brcmf_err("Ivalid unicast security info\n");
|
||||
brcmf_err("Invalid unicast security info\n");
|
||||
}
|
||||
offset++;
|
||||
}
|
||||
@ -4015,7 +4015,7 @@ brcmf_configure_wpaie(struct brcmf_if *ifp,
|
||||
wpa_auth |= WPA2_AUTH_1X_SHA256;
|
||||
break;
|
||||
default:
|
||||
brcmf_err("Ivalid key mgmt info\n");
|
||||
brcmf_err("Invalid key mgmt info\n");
|
||||
}
|
||||
offset++;
|
||||
}
|
||||
|
@ -3469,7 +3469,7 @@ static struct attribute_group il3945_attribute_group = {
|
||||
.attrs = il3945_sysfs_entries,
|
||||
};
|
||||
|
||||
static struct ieee80211_ops il3945_mac_ops __read_mostly = {
|
||||
static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
|
||||
.tx = il3945_mac_tx,
|
||||
.start = il3945_mac_start,
|
||||
.stop = il3945_mac_stop,
|
||||
@ -3627,15 +3627,6 @@ il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
il->cmd_queue = IL39_CMD_QUEUE_NUM;
|
||||
|
||||
/*
|
||||
* Disabling hardware scan means that mac80211 will perform scans
|
||||
* "the hard way", rather than using device's scan.
|
||||
*/
|
||||
if (il3945_mod_params.disable_hw_scan) {
|
||||
D_INFO("Disabling hw_scan\n");
|
||||
il3945_mac_ops.hw_scan = NULL;
|
||||
}
|
||||
|
||||
D_INFO("*** LOAD DRIVER ***\n");
|
||||
il->cfg = cfg;
|
||||
il->ops = &il3945_ops;
|
||||
@ -3913,6 +3904,15 @@ il3945_init(void)
|
||||
pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
|
||||
pr_info(DRV_COPYRIGHT "\n");
|
||||
|
||||
/*
|
||||
* Disabling hardware scan means that mac80211 will perform scans
|
||||
* "the hard way", rather than using device's scan.
|
||||
*/
|
||||
if (il3945_mod_params.disable_hw_scan) {
|
||||
pr_info("hw_scan is disabled\n");
|
||||
il3945_mac_ops.hw_scan = NULL;
|
||||
}
|
||||
|
||||
ret = il3945_rate_control_register();
|
||||
if (ret) {
|
||||
pr_err("Unable to register rate control algorithm: %d\n", ret);
|
||||
|
@ -16,7 +16,7 @@
|
||||
/********************************************************************/
|
||||
int orinoco_mic_init(struct orinoco_private *priv)
|
||||
{
|
||||
priv->tx_tfm_mic = crypto_alloc_ahash("michael_mic", 0,
|
||||
priv->tx_tfm_mic = crypto_alloc_shash("michael_mic", 0,
|
||||
CRYPTO_ALG_ASYNC);
|
||||
if (IS_ERR(priv->tx_tfm_mic)) {
|
||||
printk(KERN_DEBUG "orinoco_mic_init: could not allocate "
|
||||
@ -25,7 +25,7 @@ int orinoco_mic_init(struct orinoco_private *priv)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
priv->rx_tfm_mic = crypto_alloc_ahash("michael_mic", 0,
|
||||
priv->rx_tfm_mic = crypto_alloc_shash("michael_mic", 0,
|
||||
CRYPTO_ALG_ASYNC);
|
||||
if (IS_ERR(priv->rx_tfm_mic)) {
|
||||
printk(KERN_DEBUG "orinoco_mic_init: could not allocate "
|
||||
@ -40,17 +40,16 @@ int orinoco_mic_init(struct orinoco_private *priv)
|
||||
void orinoco_mic_free(struct orinoco_private *priv)
|
||||
{
|
||||
if (priv->tx_tfm_mic)
|
||||
crypto_free_ahash(priv->tx_tfm_mic);
|
||||
crypto_free_shash(priv->tx_tfm_mic);
|
||||
if (priv->rx_tfm_mic)
|
||||
crypto_free_ahash(priv->rx_tfm_mic);
|
||||
crypto_free_shash(priv->rx_tfm_mic);
|
||||
}
|
||||
|
||||
int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key,
|
||||
int orinoco_mic(struct crypto_shash *tfm_michael, u8 *key,
|
||||
u8 *da, u8 *sa, u8 priority,
|
||||
u8 *data, size_t data_len, u8 *mic)
|
||||
{
|
||||
AHASH_REQUEST_ON_STACK(req, tfm_michael);
|
||||
struct scatterlist sg[2];
|
||||
SHASH_DESC_ON_STACK(desc, tfm_michael);
|
||||
u8 hdr[ETH_HLEN + 2]; /* size of header + padding */
|
||||
int err;
|
||||
|
||||
@ -67,18 +66,27 @@ int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key,
|
||||
hdr[ETH_ALEN * 2 + 2] = 0;
|
||||
hdr[ETH_ALEN * 2 + 3] = 0;
|
||||
|
||||
/* Use scatter gather to MIC header and data in one go */
|
||||
sg_init_table(sg, 2);
|
||||
sg_set_buf(&sg[0], hdr, sizeof(hdr));
|
||||
sg_set_buf(&sg[1], data, data_len);
|
||||
desc->tfm = tfm_michael;
|
||||
desc->flags = 0;
|
||||
|
||||
if (crypto_ahash_setkey(tfm_michael, key, MIC_KEYLEN))
|
||||
return -1;
|
||||
err = crypto_shash_setkey(tfm_michael, key, MIC_KEYLEN);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = crypto_shash_init(desc);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = crypto_shash_update(desc, hdr, sizeof(hdr));
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = crypto_shash_update(desc, data, data_len);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = crypto_shash_final(desc, mic);
|
||||
shash_desc_zero(desc);
|
||||
|
||||
ahash_request_set_tfm(req, tfm_michael);
|
||||
ahash_request_set_callback(req, 0, NULL, NULL);
|
||||
ahash_request_set_crypt(req, sg, mic, data_len + sizeof(hdr));
|
||||
err = crypto_ahash_digest(req);
|
||||
ahash_request_zero(req);
|
||||
return err;
|
||||
}
|
||||
|
@ -6,6 +6,7 @@
|
||||
#define _ORINOCO_MIC_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <crypto/hash.h>
|
||||
|
||||
#define MICHAEL_MIC_LEN 8
|
||||
|
||||
@ -15,7 +16,7 @@ struct crypto_ahash;
|
||||
|
||||
int orinoco_mic_init(struct orinoco_private *priv);
|
||||
void orinoco_mic_free(struct orinoco_private *priv);
|
||||
int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key,
|
||||
int orinoco_mic(struct crypto_shash *tfm_michael, u8 *key,
|
||||
u8 *da, u8 *sa, u8 priority,
|
||||
u8 *data, size_t data_len, u8 *mic);
|
||||
|
||||
|
@ -152,8 +152,8 @@ struct orinoco_private {
|
||||
u8 *wpa_ie;
|
||||
int wpa_ie_len;
|
||||
|
||||
struct crypto_ahash *rx_tfm_mic;
|
||||
struct crypto_ahash *tx_tfm_mic;
|
||||
struct crypto_shash *rx_tfm_mic;
|
||||
struct crypto_shash *tx_tfm_mic;
|
||||
|
||||
unsigned int wpa_enabled:1;
|
||||
unsigned int tkip_cm_active:1;
|
||||
|
@ -2086,7 +2086,7 @@ static int lbs_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev,
|
||||
* Initialization
|
||||
*/
|
||||
|
||||
static struct cfg80211_ops lbs_cfg80211_ops = {
|
||||
static const struct cfg80211_ops lbs_cfg80211_ops = {
|
||||
.set_monitor_channel = lbs_cfg_set_monitor_channel,
|
||||
.libertas_set_mesh_channel = lbs_cfg_set_mesh_channel,
|
||||
.scan = lbs_cfg_scan,
|
||||
|
@ -434,14 +434,14 @@ enum mwifiex_channel_flags {
|
||||
#define HostCmd_ACT_BITWISE_SET 0x0002
|
||||
#define HostCmd_ACT_BITWISE_CLR 0x0003
|
||||
#define HostCmd_RESULT_OK 0x0000
|
||||
|
||||
#define HostCmd_ACT_MAC_RX_ON 0x0001
|
||||
#define HostCmd_ACT_MAC_TX_ON 0x0002
|
||||
#define HostCmd_ACT_MAC_WEP_ENABLE 0x0008
|
||||
#define HostCmd_ACT_MAC_ETHERNETII_ENABLE 0x0010
|
||||
#define HostCmd_ACT_MAC_PROMISCUOUS_ENABLE 0x0080
|
||||
#define HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE 0x0100
|
||||
#define HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON 0x2000
|
||||
#define HostCmd_ACT_MAC_RX_ON BIT(0)
|
||||
#define HostCmd_ACT_MAC_TX_ON BIT(1)
|
||||
#define HostCmd_ACT_MAC_WEP_ENABLE BIT(3)
|
||||
#define HostCmd_ACT_MAC_ETHERNETII_ENABLE BIT(4)
|
||||
#define HostCmd_ACT_MAC_PROMISCUOUS_ENABLE BIT(7)
|
||||
#define HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE BIT(8)
|
||||
#define HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON BIT(13)
|
||||
#define HostCmd_ACT_MAC_DYNAMIC_BW_ENABLE BIT(16)
|
||||
|
||||
#define HostCmd_BSS_MODE_IBSS 0x0002
|
||||
#define HostCmd_BSS_MODE_ANY 0x0003
|
||||
@ -1084,8 +1084,7 @@ struct host_cmd_ds_802_11_mac_address {
|
||||
};
|
||||
|
||||
struct host_cmd_ds_mac_control {
|
||||
__le16 action;
|
||||
__le16 reserved;
|
||||
__le32 action;
|
||||
};
|
||||
|
||||
struct host_cmd_ds_mac_multicast_adr {
|
||||
|
@ -92,7 +92,8 @@ int mwifiex_init_priv(struct mwifiex_private *priv)
|
||||
for (i = 0; i < ARRAY_SIZE(priv->wep_key); i++)
|
||||
memset(&priv->wep_key[i], 0, sizeof(struct mwifiex_wep_key));
|
||||
priv->wep_key_curr_index = 0;
|
||||
priv->curr_pkt_filter = HostCmd_ACT_MAC_RX_ON | HostCmd_ACT_MAC_TX_ON |
|
||||
priv->curr_pkt_filter = HostCmd_ACT_MAC_DYNAMIC_BW_ENABLE |
|
||||
HostCmd_ACT_MAC_RX_ON | HostCmd_ACT_MAC_TX_ON |
|
||||
HostCmd_ACT_MAC_ETHERNETII_ENABLE;
|
||||
|
||||
priv->beacon_period = 100; /* beacon interval */
|
||||
|
@ -530,7 +530,7 @@ struct mwifiex_private {
|
||||
u8 tx_timeout_cnt;
|
||||
struct net_device *netdev;
|
||||
struct net_device_stats stats;
|
||||
u16 curr_pkt_filter;
|
||||
u32 curr_pkt_filter;
|
||||
u32 bss_mode;
|
||||
u32 pkt_tx_ctrl;
|
||||
u16 tx_power_level;
|
||||
|
@ -2237,6 +2237,12 @@ static void mwifiex_recreate_adapter(struct sdio_mmc_card *card)
|
||||
mmc_hw_reset(func->card->host);
|
||||
sdio_release_host(func);
|
||||
|
||||
/* Previous save_adapter won't be valid after this. We will cancel
|
||||
* pending work requests.
|
||||
*/
|
||||
clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags);
|
||||
clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &iface_work_flags);
|
||||
|
||||
mwifiex_sdio_probe(func, device_id);
|
||||
}
|
||||
|
||||
|
@ -76,7 +76,7 @@ mwifiex_cmd_802_11_rssi_info(struct mwifiex_private *priv,
|
||||
*/
|
||||
static int mwifiex_cmd_mac_control(struct mwifiex_private *priv,
|
||||
struct host_cmd_ds_command *cmd,
|
||||
u16 cmd_action, u16 *action)
|
||||
u16 cmd_action, u32 *action)
|
||||
{
|
||||
struct host_cmd_ds_mac_control *mac_ctrl = &cmd->params.mac_ctrl;
|
||||
|
||||
@ -89,7 +89,7 @@ static int mwifiex_cmd_mac_control(struct mwifiex_private *priv,
|
||||
cmd->command = cpu_to_le16(HostCmd_CMD_MAC_CONTROL);
|
||||
cmd->size =
|
||||
cpu_to_le16(sizeof(struct host_cmd_ds_mac_control) + S_DS_GEN);
|
||||
mac_ctrl->action = cpu_to_le16(*action);
|
||||
mac_ctrl->action = cpu_to_le32(*action);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1935,8 +1935,8 @@ int mwifiex_sta_prepare_cmd(struct mwifiex_private *priv, uint16_t cmd_no,
|
||||
mwifiex_dbg(priv->adapter, ERROR,
|
||||
"0x%x command not supported by firmware\n",
|
||||
cmd_no);
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/* Prepare command */
|
||||
switch (cmd_no) {
|
||||
|
@ -2979,7 +2979,9 @@ struct rt2800_drv_data {
|
||||
u8 bbp26;
|
||||
u8 txmixer_gain_24g;
|
||||
u8 txmixer_gain_5g;
|
||||
u8 max_psdu;
|
||||
unsigned int tbtt_tick;
|
||||
unsigned int ampdu_factor_cnt[4];
|
||||
DECLARE_BITMAP(sta_ids, STA_IDS_SIZE);
|
||||
};
|
||||
|
||||
|
@ -1418,6 +1418,23 @@ int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2800_config_pairwise_key);
|
||||
|
||||
static void rt2800_set_max_psdu_len(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
u8 i, max_psdu;
|
||||
u32 reg;
|
||||
struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
if (drv_data->ampdu_factor_cnt[i] > 0)
|
||||
break;
|
||||
|
||||
max_psdu = min(drv_data->max_psdu, i);
|
||||
|
||||
rt2800_register_read(rt2x00dev, MAX_LEN_CFG, ®);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, max_psdu);
|
||||
rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
|
||||
}
|
||||
|
||||
int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
@ -1425,6 +1442,17 @@ int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif,
|
||||
struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta);
|
||||
struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
|
||||
|
||||
/*
|
||||
* Limit global maximum TX AMPDU length to smallest value of all
|
||||
* connected stations. In AP mode this can be suboptimal, but we
|
||||
* do not have a choice if some connected STA is not capable to
|
||||
* receive the same amount of data like the others.
|
||||
*/
|
||||
if (sta->ht_cap.ht_supported) {
|
||||
drv_data->ampdu_factor_cnt[sta->ht_cap.ampdu_factor & 3]++;
|
||||
rt2800_set_max_psdu_len(rt2x00dev);
|
||||
}
|
||||
|
||||
/*
|
||||
* Search for the first free WCID entry and return the corresponding
|
||||
* index.
|
||||
@ -1457,9 +1485,16 @@ int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif,
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2800_sta_add);
|
||||
|
||||
int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, int wcid)
|
||||
int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, struct ieee80211_sta *sta)
|
||||
{
|
||||
struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
|
||||
struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta);
|
||||
int wcid = sta_priv->wcid;
|
||||
|
||||
if (sta->ht_cap.ht_supported) {
|
||||
drv_data->ampdu_factor_cnt[sta->ht_cap.ampdu_factor & 3]--;
|
||||
rt2800_set_max_psdu_len(rt2x00dev);
|
||||
}
|
||||
|
||||
if (wcid > WCID_END)
|
||||
return 0;
|
||||
@ -1904,7 +1939,7 @@ static void rt2800_config_lna_gain(struct rt2x00_dev *rt2x00dev,
|
||||
|
||||
#define FREQ_OFFSET_BOUND 0x5f
|
||||
|
||||
static void rt2800_adjust_freq_offset(struct rt2x00_dev *rt2x00dev)
|
||||
static void rt2800_freq_cal_mode1(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
u8 freq_offset, prev_freq_offset;
|
||||
u8 rfcsr, prev_rfcsr;
|
||||
@ -2075,7 +2110,9 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev,
|
||||
rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
|
||||
rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
|
||||
rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
|
||||
msleep(1);
|
||||
|
||||
usleep_range(1000, 1500);
|
||||
|
||||
rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
|
||||
rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
|
||||
}
|
||||
@ -2380,7 +2417,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev,
|
||||
}
|
||||
rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
|
||||
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
if (conf_is_ht40(conf)) {
|
||||
txrx_agc_fc = rt2x00_get_field8(drv_data->calibration_bw40,
|
||||
@ -2570,7 +2607,7 @@ static void rt2800_config_channel_rf3290(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
|
||||
rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
|
||||
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
if (rf->channel <= 14) {
|
||||
if (rf->channel == 6)
|
||||
@ -2611,7 +2648,7 @@ static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev,
|
||||
else
|
||||
rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2);
|
||||
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
|
||||
rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
|
||||
@ -2676,7 +2713,7 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
|
||||
rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
|
||||
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
if (rf->channel <= 14) {
|
||||
int idx = rf->channel-1;
|
||||
@ -2971,7 +3008,7 @@ static void rt2800_config_channel_rf55xx(struct rt2x00_dev *rt2x00dev,
|
||||
}
|
||||
|
||||
/* TODO proper frequency adjustment */
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
/* TODO merge with others */
|
||||
rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
|
||||
@ -3407,7 +3444,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
|
||||
}
|
||||
}
|
||||
|
||||
msleep(1);
|
||||
usleep_range(1000, 1500);
|
||||
|
||||
/*
|
||||
* Clear channel statistic counters
|
||||
@ -4306,15 +4343,18 @@ void rt2800_vco_calibration(struct rt2x00_dev *rt2x00dev)
|
||||
case RF5372:
|
||||
case RF5390:
|
||||
case RF5392:
|
||||
case RF5592:
|
||||
rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
|
||||
rt2x00_set_field8(&rfcsr, RFCSR3_VCOCAL_EN, 1);
|
||||
rt2800_rfcsr_write(rt2x00dev, 3, rfcsr);
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "Not supported RF chipet %x for VCO recalibration",
|
||||
rt2x00dev->chip.rf);
|
||||
return;
|
||||
}
|
||||
|
||||
mdelay(1);
|
||||
usleep_range(1000, 1500);
|
||||
|
||||
rt2800_register_read(rt2x00dev, TX_PIN_CFG, &tx_pin);
|
||||
if (rt2x00dev->rf_channel <= 14) {
|
||||
@ -4536,6 +4576,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
|
||||
*/
|
||||
static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
|
||||
u32 reg;
|
||||
u16 eeprom;
|
||||
unsigned int i;
|
||||
@ -4704,12 +4745,15 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
|
||||
if (rt2x00_rt_rev_gte(rt2x00dev, RT2872, REV_RT2872E) ||
|
||||
rt2x00_rt(rt2x00dev, RT2883) ||
|
||||
rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070E))
|
||||
rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070E)) {
|
||||
drv_data->max_psdu = 2;
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 2);
|
||||
else
|
||||
} else {
|
||||
drv_data->max_psdu = 1;
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 1);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MIN_PSDU, 0);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MIN_MPDU, 0);
|
||||
}
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MIN_PSDU, 10);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MIN_MPDU, 10);
|
||||
rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
|
||||
|
||||
rt2800_register_read(rt2x00dev, LED_CFG, ®);
|
||||
@ -6415,7 +6459,7 @@ static void rt2800_init_rfcsr_3593(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);
|
||||
rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
|
||||
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
rt2800_rfcsr_read(rt2x00dev, 18, &rfcsr);
|
||||
rt2x00_set_field8(&rfcsr, RFCSR18_XO_TUNE_BYPASS, 1);
|
||||
@ -6641,7 +6685,7 @@ static void rt2800_init_rfcsr_5592(struct rt2x00_dev *rt2x00dev)
|
||||
rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
|
||||
msleep(1);
|
||||
|
||||
rt2800_adjust_freq_offset(rt2x00dev);
|
||||
rt2800_freq_cal_mode1(rt2x00dev);
|
||||
|
||||
/* Enable DC filter */
|
||||
if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C))
|
||||
@ -7593,7 +7637,7 @@ static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
|
||||
|
||||
spec->ht.cap |= rx_chains << IEEE80211_HT_CAP_RX_STBC_SHIFT;
|
||||
|
||||
spec->ht.ampdu_factor = 3;
|
||||
spec->ht.ampdu_factor = (rx_chains > 1) ? 3 : 2;
|
||||
spec->ht.ampdu_density = 4;
|
||||
spec->ht.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
|
||||
if (tx_chains != rx_chains) {
|
||||
@ -7675,6 +7719,7 @@ static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
|
||||
case RF5372:
|
||||
case RF5390:
|
||||
case RF5392:
|
||||
case RF5592:
|
||||
__set_bit(CAPABILITY_VCO_RECALIBRATION, &rt2x00dev->cap_flags);
|
||||
break;
|
||||
}
|
||||
|
@ -183,7 +183,7 @@ int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
|
||||
struct ieee80211_key_conf *key);
|
||||
int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta);
|
||||
int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, int wcid);
|
||||
int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, struct ieee80211_sta *sta);
|
||||
void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int filter_flags);
|
||||
void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
|
||||
|
@ -627,7 +627,7 @@ struct rt2x00lib_ops {
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta);
|
||||
int (*sta_remove) (struct rt2x00_dev *rt2x00dev,
|
||||
int wcid);
|
||||
struct ieee80211_sta *sta);
|
||||
};
|
||||
|
||||
/*
|
||||
@ -833,6 +833,10 @@ struct rt2x00_dev {
|
||||
*/
|
||||
struct mutex csr_mutex;
|
||||
|
||||
/*
|
||||
* Mutex to synchronize config and link tuner.
|
||||
*/
|
||||
struct mutex conf_mutex;
|
||||
/*
|
||||
* Current packet filter configuration for the device.
|
||||
* This contains all currently active FIF_* flags send
|
||||
|
@ -87,9 +87,6 @@ int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev)
|
||||
*/
|
||||
rt2x00queue_start_queues(rt2x00dev);
|
||||
rt2x00link_start_tuner(rt2x00dev);
|
||||
rt2x00link_start_agc(rt2x00dev);
|
||||
if (rt2x00_has_cap_vco_recalibration(rt2x00dev))
|
||||
rt2x00link_start_vcocal(rt2x00dev);
|
||||
|
||||
/*
|
||||
* Start watchdog monitoring.
|
||||
@ -112,9 +109,6 @@ void rt2x00lib_disable_radio(struct rt2x00_dev *rt2x00dev)
|
||||
/*
|
||||
* Stop all queues
|
||||
*/
|
||||
rt2x00link_stop_agc(rt2x00dev);
|
||||
if (rt2x00_has_cap_vco_recalibration(rt2x00dev))
|
||||
rt2x00link_stop_vcocal(rt2x00dev);
|
||||
rt2x00link_stop_tuner(rt2x00dev);
|
||||
rt2x00queue_stop_queues(rt2x00dev);
|
||||
rt2x00queue_flush_queues(rt2x00dev, true);
|
||||
@ -1319,6 +1313,7 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
|
||||
|
||||
spin_lock_init(&rt2x00dev->irqmask_lock);
|
||||
mutex_init(&rt2x00dev->csr_mutex);
|
||||
mutex_init(&rt2x00dev->conf_mutex);
|
||||
INIT_LIST_HEAD(&rt2x00dev->bar_list);
|
||||
spin_lock_init(&rt2x00dev->bar_list_lock);
|
||||
|
||||
|
@ -29,9 +29,10 @@
|
||||
* Interval defines
|
||||
*/
|
||||
#define WATCHDOG_INTERVAL round_jiffies_relative(HZ)
|
||||
#define LINK_TUNE_INTERVAL round_jiffies_relative(HZ)
|
||||
#define AGC_INTERVAL round_jiffies_relative(4 * HZ)
|
||||
#define VCO_INTERVAL round_jiffies_relative(10 * HZ) /* 10 sec */
|
||||
#define LINK_TUNE_SECONDS 1
|
||||
#define LINK_TUNE_INTERVAL round_jiffies_relative(LINK_TUNE_SECONDS * HZ)
|
||||
#define AGC_SECONDS 4
|
||||
#define VCO_SECONDS 10
|
||||
|
||||
/*
|
||||
* rt2x00_rate: Per rate device information
|
||||
@ -270,30 +271,6 @@ void rt2x00link_start_watchdog(struct rt2x00_dev *rt2x00dev);
|
||||
*/
|
||||
void rt2x00link_stop_watchdog(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00link_start_agc - Start periodic gain calibration
|
||||
* @rt2x00dev: Pointer to &struct rt2x00_dev.
|
||||
*/
|
||||
void rt2x00link_start_agc(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00link_start_vcocal - Start periodic VCO calibration
|
||||
* @rt2x00dev: Pointer to &struct rt2x00_dev.
|
||||
*/
|
||||
void rt2x00link_start_vcocal(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00link_stop_agc - Stop periodic gain calibration
|
||||
* @rt2x00dev: Pointer to &struct rt2x00_dev.
|
||||
*/
|
||||
void rt2x00link_stop_agc(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00link_stop_vcocal - Stop periodic VCO calibration
|
||||
* @rt2x00dev: Pointer to &struct rt2x00_dev.
|
||||
*/
|
||||
void rt2x00link_stop_vcocal(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00link_register - Initialize link tuning & watchdog functionality
|
||||
* @rt2x00dev: Pointer to &struct rt2x00_dev.
|
||||
|
@ -233,15 +233,13 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev)
|
||||
struct link *link = &rt2x00dev->link;
|
||||
|
||||
/*
|
||||
* Link tuning should only be performed when
|
||||
* an active sta interface exists. AP interfaces
|
||||
* don't need link tuning and monitor mode interfaces
|
||||
* should never have to work with link tuners.
|
||||
* Single monitor mode interfaces should never have
|
||||
* work with link tuners.
|
||||
*/
|
||||
if (!rt2x00dev->intf_sta_count)
|
||||
if (!rt2x00dev->intf_ap_count && !rt2x00dev->intf_sta_count)
|
||||
return;
|
||||
|
||||
/**
|
||||
/*
|
||||
* While scanning, link tuning is disabled. By default
|
||||
* the most sensitive settings will be used to make sure
|
||||
* that all beacons and probe responses will be received
|
||||
@ -308,21 +306,10 @@ static void rt2x00link_reset_qual(struct rt2x00_dev *rt2x00dev)
|
||||
qual->tx_failed = 0;
|
||||
}
|
||||
|
||||
static void rt2x00link_tuner(struct work_struct *work)
|
||||
static void rt2x00link_tuner_sta(struct rt2x00_dev *rt2x00dev, struct link *link)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev =
|
||||
container_of(work, struct rt2x00_dev, link.work.work);
|
||||
struct link *link = &rt2x00dev->link;
|
||||
struct link_qual *qual = &rt2x00dev->link.qual;
|
||||
|
||||
/*
|
||||
* When the radio is shutting down we should
|
||||
* immediately cease all link tuning.
|
||||
*/
|
||||
if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags) ||
|
||||
test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Update statistics.
|
||||
*/
|
||||
@ -360,6 +347,38 @@ static void rt2x00link_tuner(struct work_struct *work)
|
||||
*/
|
||||
if (rt2x00lib_antenna_diversity(rt2x00dev))
|
||||
rt2x00link_reset_qual(rt2x00dev);
|
||||
}
|
||||
|
||||
static void rt2x00link_tuner(struct work_struct *work)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev =
|
||||
container_of(work, struct rt2x00_dev, link.work.work);
|
||||
struct link *link = &rt2x00dev->link;
|
||||
|
||||
/*
|
||||
* When the radio is shutting down we should
|
||||
* immediately cease all link tuning.
|
||||
*/
|
||||
if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags) ||
|
||||
test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
|
||||
return;
|
||||
|
||||
/* Do not race with rt2x00mac_config(). */
|
||||
mutex_lock(&rt2x00dev->conf_mutex);
|
||||
|
||||
if (rt2x00dev->intf_sta_count)
|
||||
rt2x00link_tuner_sta(rt2x00dev, link);
|
||||
|
||||
if (rt2x00dev->ops->lib->gain_calibration &&
|
||||
(link->count % (AGC_SECONDS / LINK_TUNE_SECONDS)) == 0)
|
||||
rt2x00dev->ops->lib->gain_calibration(rt2x00dev);
|
||||
|
||||
if (rt2x00dev->ops->lib->vco_calibration &&
|
||||
rt2x00_has_cap_vco_recalibration(rt2x00dev) &&
|
||||
(link->count % (VCO_SECONDS / LINK_TUNE_SECONDS)) == 0)
|
||||
rt2x00dev->ops->lib->vco_calibration(rt2x00dev);
|
||||
|
||||
mutex_unlock(&rt2x00dev->conf_mutex);
|
||||
|
||||
/*
|
||||
* Increase tuner counter, and reschedule the next link tuner run.
|
||||
@ -408,85 +427,8 @@ static void rt2x00link_watchdog(struct work_struct *work)
|
||||
WATCHDOG_INTERVAL);
|
||||
}
|
||||
|
||||
void rt2x00link_start_agc(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
struct link *link = &rt2x00dev->link;
|
||||
|
||||
if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) &&
|
||||
rt2x00dev->ops->lib->gain_calibration)
|
||||
ieee80211_queue_delayed_work(rt2x00dev->hw,
|
||||
&link->agc_work,
|
||||
AGC_INTERVAL);
|
||||
}
|
||||
|
||||
void rt2x00link_start_vcocal(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
struct link *link = &rt2x00dev->link;
|
||||
|
||||
if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) &&
|
||||
rt2x00dev->ops->lib->vco_calibration)
|
||||
ieee80211_queue_delayed_work(rt2x00dev->hw,
|
||||
&link->vco_work,
|
||||
VCO_INTERVAL);
|
||||
}
|
||||
|
||||
void rt2x00link_stop_agc(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
cancel_delayed_work_sync(&rt2x00dev->link.agc_work);
|
||||
}
|
||||
|
||||
void rt2x00link_stop_vcocal(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
cancel_delayed_work_sync(&rt2x00dev->link.vco_work);
|
||||
}
|
||||
|
||||
static void rt2x00link_agc(struct work_struct *work)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev =
|
||||
container_of(work, struct rt2x00_dev, link.agc_work.work);
|
||||
struct link *link = &rt2x00dev->link;
|
||||
|
||||
/*
|
||||
* When the radio is shutting down we should
|
||||
* immediately cease the watchdog monitoring.
|
||||
*/
|
||||
if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
|
||||
return;
|
||||
|
||||
rt2x00dev->ops->lib->gain_calibration(rt2x00dev);
|
||||
|
||||
if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
|
||||
ieee80211_queue_delayed_work(rt2x00dev->hw,
|
||||
&link->agc_work,
|
||||
AGC_INTERVAL);
|
||||
}
|
||||
|
||||
static void rt2x00link_vcocal(struct work_struct *work)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev =
|
||||
container_of(work, struct rt2x00_dev, link.vco_work.work);
|
||||
struct link *link = &rt2x00dev->link;
|
||||
|
||||
/*
|
||||
* When the radio is shutting down we should
|
||||
* immediately cease the VCO calibration.
|
||||
*/
|
||||
if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
|
||||
return;
|
||||
|
||||
rt2x00dev->ops->lib->vco_calibration(rt2x00dev);
|
||||
|
||||
if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
|
||||
ieee80211_queue_delayed_work(rt2x00dev->hw,
|
||||
&link->vco_work,
|
||||
VCO_INTERVAL);
|
||||
}
|
||||
|
||||
void rt2x00link_register(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
INIT_DELAYED_WORK(&rt2x00dev->link.agc_work, rt2x00link_agc);
|
||||
if (rt2x00_has_cap_vco_recalibration(rt2x00dev))
|
||||
INIT_DELAYED_WORK(&rt2x00dev->link.vco_work, rt2x00link_vcocal);
|
||||
INIT_DELAYED_WORK(&rt2x00dev->link.watchdog_work, rt2x00link_watchdog);
|
||||
INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00link_tuner);
|
||||
}
|
||||
|
@ -320,6 +320,9 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
|
||||
*/
|
||||
rt2x00queue_stop_queue(rt2x00dev->rx);
|
||||
|
||||
/* Do not race with with link tuner. */
|
||||
mutex_lock(&rt2x00dev->conf_mutex);
|
||||
|
||||
/*
|
||||
* When we've just turned on the radio, we want to reprogram
|
||||
* everything to ensure a consistent state
|
||||
@ -335,6 +338,8 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
|
||||
*/
|
||||
rt2x00lib_config_antenna(rt2x00dev, rt2x00dev->default_ant);
|
||||
|
||||
mutex_unlock(&rt2x00dev->conf_mutex);
|
||||
|
||||
/* Turn RX back on */
|
||||
rt2x00queue_start_queue(rt2x00dev->rx);
|
||||
|
||||
@ -539,9 +544,8 @@ int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||
struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta);
|
||||
|
||||
return rt2x00dev->ops->lib->sta_remove(rt2x00dev, sta_priv->wcid);
|
||||
return rt2x00dev->ops->lib->sta_remove(rt2x00dev, sta);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00mac_sta_remove);
|
||||
|
||||
|
@ -306,13 +306,12 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
|
||||
struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
|
||||
struct rt2x00_sta *sta_priv = NULL;
|
||||
u8 density = 0;
|
||||
|
||||
if (sta) {
|
||||
txdesc->u.ht.mpdu_density =
|
||||
sta->ht_cap.ampdu_density;
|
||||
|
||||
sta_priv = sta_to_rt2x00_sta(sta);
|
||||
txdesc->u.ht.wcid = sta_priv->wcid;
|
||||
density = sta->ht_cap.ampdu_density;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -345,8 +344,6 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
|
||||
return;
|
||||
}
|
||||
|
||||
txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
|
||||
|
||||
/*
|
||||
* Only one STBC stream is supported for now.
|
||||
*/
|
||||
@ -358,8 +355,11 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
|
||||
* frames that are intended to probe a specific tx rate.
|
||||
*/
|
||||
if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
|
||||
!(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
|
||||
!(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
|
||||
__set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
|
||||
txdesc->u.ht.mpdu_density = density;
|
||||
txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
|
||||
}
|
||||
|
||||
/*
|
||||
* Set 40Mhz mode if necessary (for legacy rates this will
|
||||
|
@ -207,8 +207,7 @@ static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
|
||||
*highest supported RX rate
|
||||
*/
|
||||
if (rtlpriv->dm.supp_phymode_switch) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Support phy mode switch\n");
|
||||
pr_info("Support phy mode switch\n");
|
||||
|
||||
ht_cap->mcs.rx_mask[0] = 0xFF;
|
||||
ht_cap->mcs.rx_mask[1] = 0xFF;
|
||||
@ -389,8 +388,8 @@ static void _rtl_init_mac80211(struct ieee80211_hw *hw)
|
||||
/* <4> set mac->sband to wiphy->sband */
|
||||
hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Err BAND %d\n",
|
||||
rtlhal->current_bandtype);
|
||||
pr_err("Err BAND %d\n",
|
||||
rtlhal->current_bandtype);
|
||||
}
|
||||
}
|
||||
/* <5> set hw caps */
|
||||
@ -544,7 +543,7 @@ int rtl_init_core(struct ieee80211_hw *hw)
|
||||
* mac80211 hw in _rtl_init_mac80211.
|
||||
*/
|
||||
if (rtl_regd_init(hw, rtl_reg_notifier)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "REGD init failed\n");
|
||||
pr_err("REGD init failed\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1694,8 +1693,7 @@ void rtl_watchdog_wq_callback(void *data)
|
||||
* we should reconnect this AP
|
||||
*/
|
||||
if (rtlpriv->link_info.roam_times >= 5) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"AP off, try to reconnect now\n");
|
||||
pr_err("AP off, try to reconnect now\n");
|
||||
rtlpriv->link_info.roam_times = 0;
|
||||
ieee80211_connection_loss(
|
||||
rtlpriv->mac80211.vif);
|
||||
@ -1886,8 +1884,7 @@ void rtl_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
|
||||
(u8 *)&iotype);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Unknown Scan Backup operation.\n");
|
||||
pr_err("Unknown Scan Backup operation.\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -285,8 +285,7 @@ u8 rtl_cam_get_free_entry(struct ieee80211_hw *hw, u8 *sta_addr)
|
||||
u8 i, *addr;
|
||||
|
||||
if (NULL == sta_addr) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG,
|
||||
"sta_addr is NULL.\n");
|
||||
pr_err("sta_addr is NULL.\n");
|
||||
return TOTAL_CAM_ENTRY;
|
||||
}
|
||||
/* Does STA already exist? */
|
||||
@ -298,9 +297,8 @@ u8 rtl_cam_get_free_entry(struct ieee80211_hw *hw, u8 *sta_addr)
|
||||
/* Get a free CAM entry. */
|
||||
for (entry_idx = 4; entry_idx < TOTAL_CAM_ENTRY; entry_idx++) {
|
||||
if ((bitmap & BIT(0)) == 0) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG,
|
||||
"-----hwsec_cam_bitmap: 0x%x entry_idx=%d\n",
|
||||
rtlpriv->sec.hwsec_cam_bitmap, entry_idx);
|
||||
pr_err("-----hwsec_cam_bitmap: 0x%x entry_idx=%d\n",
|
||||
rtlpriv->sec.hwsec_cam_bitmap, entry_idx);
|
||||
rtlpriv->sec.hwsec_cam_bitmap |= BIT(0) << entry_idx;
|
||||
memcpy(rtlpriv->sec.hwsec_cam_sta_addr[entry_idx],
|
||||
sta_addr, ETH_ALEN);
|
||||
@ -319,14 +317,12 @@ void rtl_cam_del_entry(struct ieee80211_hw *hw, u8 *sta_addr)
|
||||
u8 i, *addr;
|
||||
|
||||
if (NULL == sta_addr) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG,
|
||||
"sta_addr is NULL.\n");
|
||||
pr_err("sta_addr is NULL.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (is_zero_ether_addr(sta_addr)) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG,
|
||||
"sta_addr is %pM\n", sta_addr);
|
||||
pr_err("sta_addr is %pM\n", sta_addr);
|
||||
return;
|
||||
}
|
||||
/* Does STA already exist? */
|
||||
|
@ -117,8 +117,7 @@ static void rtl_fw_do_work(const struct firmware *firmware, void *context,
|
||||
}
|
||||
found_alt:
|
||||
if (firmware->size > rtlpriv->max_fw_size) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Firmware is too big!\n");
|
||||
pr_err("Firmware is too big!\n");
|
||||
release_firmware(firmware);
|
||||
return;
|
||||
}
|
||||
@ -303,8 +302,8 @@ static int rtl_op_add_interface(struct ieee80211_hw *hw,
|
||||
(u8 *)(&mac->basic_rates));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"operation mode %d is not support!\n", vif->type);
|
||||
pr_err("operation mode %d is not supported!\n",
|
||||
vif->type);
|
||||
err = -EOPNOTSUPP;
|
||||
goto out;
|
||||
}
|
||||
@ -764,9 +763,8 @@ static int rtl_op_config(struct ieee80211_hw *hw, u32 changed)
|
||||
default:
|
||||
mac->bw_40 = false;
|
||||
mac->bw_80 = false;
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
channel_type);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
channel_type);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1399,8 +1397,7 @@ static int rtl_op_ampdu_action(struct ieee80211_hw *hw,
|
||||
"IEEE80211_AMPDU_RX_STOP:TID:%d\n", tid);
|
||||
return rtl_rx_agg_stop(hw, sta, tid);
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"IEEE80211_AMPDU_ERR!!!!:\n");
|
||||
pr_err("IEEE80211_AMPDU_ERR!!!!:\n");
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
return 0;
|
||||
@ -1532,12 +1529,11 @@ static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
key_type = AESCMAC_ENCRYPTION;
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "alg:CMAC\n");
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
|
||||
"HW don't support CMAC encrypiton, use software CMAC encrypiton\n");
|
||||
"HW don't support CMAC encryption, use software CMAC encryption\n");
|
||||
err = -EOPNOTSUPP;
|
||||
goto out_unlock;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"alg_err:%x!!!!:\n", key->cipher);
|
||||
pr_err("alg_err:%x!!!!:\n", key->cipher);
|
||||
goto out_unlock;
|
||||
}
|
||||
if (key_type == WEP40_ENCRYPTION ||
|
||||
@ -1613,8 +1609,8 @@ static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
|
||||
"set pairwise key\n");
|
||||
if (!sta) {
|
||||
RT_ASSERT(false,
|
||||
"pairwise key without mac_addr\n");
|
||||
WARN_ONCE(true,
|
||||
"rtlwifi: pairwise key without mac_addr\n");
|
||||
|
||||
err = -EOPNOTSUPP;
|
||||
goto out_unlock;
|
||||
@ -1662,8 +1658,7 @@ static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
rtl_cam_delete_one_entry(hw, mac_addr, key_idx);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"cmd_err:%x!!!!:\n", cmd);
|
||||
pr_err("cmd_err:%x!!!!:\n", cmd);
|
||||
}
|
||||
out_unlock:
|
||||
mutex_unlock(&rtlpriv->locks.conf_mutex);
|
||||
@ -1804,8 +1799,8 @@ bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
|
||||
"rtl_hal_pwrseqcmdparsing(): PWR_CMD_END\n");
|
||||
return true;
|
||||
default:
|
||||
RT_ASSERT(false,
|
||||
"rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
|
||||
WARN_ONCE(true,
|
||||
"rtlwifi: rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -36,7 +36,7 @@
|
||||
*unexpected HW behavior, HW BUG
|
||||
*and so on.
|
||||
*/
|
||||
#define DBG_EMERG 0
|
||||
/*#define DBG_EMERG 0 */
|
||||
|
||||
/*
|
||||
*Abnormal, rare, or unexpeted cases.
|
||||
@ -166,15 +166,6 @@ enum dbgp_flag_e {
|
||||
|
||||
#ifdef CONFIG_RTLWIFI_DEBUG
|
||||
|
||||
#define RT_ASSERT(_exp, fmt, ...) \
|
||||
do { \
|
||||
if (!(_exp)) { \
|
||||
printk(KERN_DEBUG KBUILD_MODNAME ":%s(): " fmt, \
|
||||
__func__, ##__VA_ARGS__); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
||||
struct rtl_priv;
|
||||
|
||||
__printf(5, 6)
|
||||
@ -210,11 +201,6 @@ do { \
|
||||
|
||||
struct rtl_priv;
|
||||
|
||||
__printf(2, 3)
|
||||
static inline void RT_ASSERT(int exp, const char *fmt, ...)
|
||||
{
|
||||
}
|
||||
|
||||
__printf(4, 5)
|
||||
static inline void RT_TRACE(struct rtl_priv *rtlpriv,
|
||||
int comp, int level,
|
||||
|
@ -1259,8 +1259,7 @@ int rtl_get_hwinfo(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv,
|
||||
break;
|
||||
|
||||
case EEPROM_93C46:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"RTL8XXX did not boot from eeprom, check it !!\n");
|
||||
pr_err("RTL8XXX did not boot from eeprom, check it !!\n");
|
||||
return 1;
|
||||
|
||||
default:
|
||||
|
@ -174,9 +174,8 @@ static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
|
||||
}
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
rtlpci->const_support_pciaspm);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
rtlpci->const_support_pciaspm);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1247,9 +1246,8 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
|
||||
&buffer_desc_dma);
|
||||
|
||||
if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Cannot allocate TX ring (prio = %d)\n",
|
||||
prio);
|
||||
pr_err("Cannot allocate TX ring (prio = %d)\n",
|
||||
prio);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -1266,8 +1264,7 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
|
||||
sizeof(*desc) * entries, &desc_dma);
|
||||
|
||||
if (!desc || (unsigned long)desc & 0xFF) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Cannot allocate TX ring (prio = %d)\n", prio);
|
||||
pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -1314,8 +1311,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
|
||||
&rtlpci->rx_ring[rxring_idx].dma);
|
||||
if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
|
||||
(ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Cannot allocate RX ring\n");
|
||||
pr_err("Cannot allocate RX ring\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -1338,8 +1334,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
|
||||
&rtlpci->rx_ring[rxring_idx].dma);
|
||||
if (!rtlpci->rx_ring[rxring_idx].desc ||
|
||||
(unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Cannot allocate RX ring\n");
|
||||
pr_err("Cannot allocate RX ring\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -1799,15 +1794,13 @@ static void rtl_pci_deinit(struct ieee80211_hw *hw)
|
||||
|
||||
static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
int err;
|
||||
|
||||
_rtl_pci_init_struct(hw, pdev);
|
||||
|
||||
err = _rtl_pci_init_trx_ring(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"tx ring initialization failed\n");
|
||||
pr_err("tx ring initialization failed\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
@ -2174,15 +2167,15 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
|
||||
err = pci_enable_device(pdev);
|
||||
if (err) {
|
||||
RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
|
||||
WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
|
||||
pci_name(pdev));
|
||||
return err;
|
||||
}
|
||||
|
||||
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
|
||||
if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
|
||||
RT_ASSERT(false,
|
||||
"Unable to obtain 32bit DMA for consistent allocations\n");
|
||||
WARN_ONCE(true,
|
||||
"rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
|
||||
err = -ENOMEM;
|
||||
goto fail1;
|
||||
}
|
||||
@ -2193,7 +2186,7 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
|
||||
sizeof(struct rtl_priv), &rtl_ops);
|
||||
if (!hw) {
|
||||
RT_ASSERT(false,
|
||||
WARN_ONCE(true,
|
||||
"%s : ieee80211 alloc failed\n", pci_name(pdev));
|
||||
err = -ENOMEM;
|
||||
goto fail1;
|
||||
@ -2232,7 +2225,7 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
/* MEM map */
|
||||
err = pci_request_regions(pdev, KBUILD_MODNAME);
|
||||
if (err) {
|
||||
RT_ASSERT(false, "Can't obtain PCI resources\n");
|
||||
WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
@ -2245,7 +2238,7 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
(unsigned long)pci_iomap(pdev,
|
||||
rtlpriv->cfg->bar_id, pmem_len);
|
||||
if (rtlpriv->io.pci_mem_start == 0) {
|
||||
RT_ASSERT(false, "Can't map PCI mem\n");
|
||||
WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
|
||||
err = -ENOMEM;
|
||||
goto fail2;
|
||||
}
|
||||
@ -2275,7 +2268,7 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
rtlpriv->cfg->ops->read_eeprom_info(hw);
|
||||
|
||||
if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
|
||||
pr_err("Can't init_sw_vars\n");
|
||||
err = -ENODEV;
|
||||
goto fail3;
|
||||
}
|
||||
@ -2287,22 +2280,20 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
/* Init mac80211 sw */
|
||||
err = rtl_init_core(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't allocate sw for mac80211\n");
|
||||
pr_err("Can't allocate sw for mac80211\n");
|
||||
goto fail3;
|
||||
}
|
||||
|
||||
/* Init PCI sw */
|
||||
err = rtl_pci_init(hw, pdev);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
|
||||
pr_err("Failed to init PCI\n");
|
||||
goto fail3;
|
||||
}
|
||||
|
||||
err = ieee80211_register_hw(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't register mac80211 hw.\n");
|
||||
pr_err("Can't register mac80211 hw.\n");
|
||||
err = -ENODEV;
|
||||
goto fail3;
|
||||
}
|
||||
@ -2310,8 +2301,7 @@ int rtl_pci_probe(struct pci_dev *pdev,
|
||||
|
||||
err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"failed to create sysfs device attributes\n");
|
||||
pr_err("failed to create sysfs device attributes\n");
|
||||
goto fail3;
|
||||
}
|
||||
|
||||
|
@ -150,8 +150,7 @@ static bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
|
||||
break;
|
||||
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", state_toset);
|
||||
pr_err("switch case %#x not processed\n", state_toset);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -267,8 +267,7 @@ static void *rtl_rate_alloc_sta(void *ppriv,
|
||||
|
||||
rate_priv = kzalloc(sizeof(struct rtl_rate_priv), gfp);
|
||||
if (!rate_priv) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Unable to allocate private rc structure\n");
|
||||
pr_err("Unable to allocate private rc structure\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -440,7 +440,7 @@ int rtl_regd_init(struct ieee80211_hw *hw,
|
||||
|
||||
if (rtlpriv->regd.country_code >= COUNTRY_CODE_MAX) {
|
||||
RT_TRACE(rtlpriv, COMP_REGD, DBG_DMESG,
|
||||
"rtl: EEPROM indicates invalid contry code, world wide 13 should be used\n");
|
||||
"rtl: EEPROM indicates invalid country code, world wide 13 should be used\n");
|
||||
|
||||
rtlpriv->regd.country_code = COUNTRY_CODE_WORLD_WIDE_13;
|
||||
}
|
||||
|
@ -125,10 +125,8 @@ static void _rtl88e_write_fw(struct ieee80211_hw *hw,
|
||||
pagenums = size / FW_8192C_PAGE_SIZE;
|
||||
remainsize = size % FW_8192C_PAGE_SIZE;
|
||||
|
||||
if (pagenums > 8) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Page numbers should not greater then 8\n");
|
||||
}
|
||||
if (pagenums > 8)
|
||||
pr_err("Page numbers should not greater then 8\n");
|
||||
|
||||
for (page = 0; page < pagenums; page++) {
|
||||
offset = page * FW_8192C_PAGE_SIZE;
|
||||
@ -157,15 +155,10 @@ static int _rtl88e_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
(!(value32 & FWDL_CHKSUM_RPT)));
|
||||
|
||||
if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"chksum report faill ! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
pr_err("chksum report fail! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32);
|
||||
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
value32 |= MCUFWDL_RDY;
|
||||
value32 &= ~WINTINI_RDY;
|
||||
@ -176,20 +169,15 @@ static int _rtl88e_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
|
||||
do {
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
if (value32 & WINTINI_RDY) {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Polling FW ready success!! REG_MCUFWDL:0x%08x.\n",
|
||||
value32);
|
||||
err = 0;
|
||||
goto exit;
|
||||
}
|
||||
if (value32 & WINTINI_RDY)
|
||||
return 0;
|
||||
|
||||
udelay(FW_8192C_POLLING_DELAY);
|
||||
|
||||
} while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32);
|
||||
pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
|
||||
exit:
|
||||
return err;
|
||||
@ -234,13 +222,8 @@ int rtl88e_download_fw(struct ieee80211_hw *hw,
|
||||
_rtl88e_enable_fw_download(hw, false);
|
||||
|
||||
err = _rtl88e_fw_free_to_go(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Firmware is not ready to run!\n");
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD,
|
||||
"Firmware is ready to run!\n");
|
||||
}
|
||||
if (err)
|
||||
pr_err("Firmware is not ready to run!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -309,8 +292,7 @@ static void _rtl88e_fill_h2c_command(struct ieee80211_hw *hw,
|
||||
while (!write_sucess) {
|
||||
wait_writeh2c_limit--;
|
||||
if (wait_writeh2c_limit == 0) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Write H2C fail because no trigger for FW INT!\n");
|
||||
pr_err("Write H2C fail because no trigger for FW INT!\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -434,8 +416,8 @@ void rtl88e_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
u32 tmp_cmdbuf[2];
|
||||
|
||||
if (!rtlhal->fw_ready) {
|
||||
RT_ASSERT(false,
|
||||
"return H2C cmd because of Fw download fail!!!\n");
|
||||
WARN_ONCE(true,
|
||||
"rtl8188ee: error H2C cmd because of Fw download fail!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -358,8 +358,7 @@ void rtl88ee_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HAL_DEF_WOWLAN:
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -572,9 +571,8 @@ void rtl88ee_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
acm_ctrl &= (~ACMHW_VOQEN);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
e_aci);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
e_aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -737,8 +735,7 @@ void rtl88ee_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
2, array);
|
||||
break; }
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -759,9 +756,8 @@ static bool _rtl88ee_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
|
||||
break;
|
||||
|
||||
if (count > POLLING_LLT_THRESHOLD) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
pr_err("Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
status = false;
|
||||
break;
|
||||
}
|
||||
@ -1096,7 +1092,7 @@ int rtl88ee_hw_init(struct ieee80211_hw *hw)
|
||||
|
||||
rtstatus = _rtl88ee_init_mac(hw);
|
||||
if (rtstatus != true) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
pr_info("Init MAC failed\n");
|
||||
err = 1;
|
||||
goto exit;
|
||||
}
|
||||
@ -1252,8 +1248,7 @@ static int _rtl88ee_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to AP!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not support!\n", type);
|
||||
pr_err("Network type %d not support!\n", type);
|
||||
return 1;
|
||||
break;
|
||||
}
|
||||
@ -1352,7 +1347,7 @@ void rtl88ee_set_qos(struct ieee80211_hw *hw, int aci)
|
||||
rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "invalid aci: %d !\n", aci);
|
||||
WARN_ONCE(true, "rtl8188ee: invalid aci: %d !\n", aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1987,7 +1982,7 @@ void rtl88ee_read_eeprom_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->autoload_failflag = false;
|
||||
_rtl88ee_read_adapter_info(hw);
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
|
||||
pr_err("Autoload ERR!!\n");
|
||||
}
|
||||
_rtl88ee_hal_customized_behavior(hw);
|
||||
}
|
||||
@ -2354,8 +2349,8 @@ void rtl88ee_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
enc_algo = CAM_AES;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", enc_algo);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
enc_algo);
|
||||
enc_algo = CAM_TKIP;
|
||||
break;
|
||||
}
|
||||
@ -2373,9 +2368,7 @@ void rtl88ee_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
entry_id =
|
||||
rtl_cam_get_free_entry(hw, p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC,
|
||||
DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
@ -176,7 +176,7 @@ static u32 _rtl88e_phy_rf_serial_read(struct ieee80211_hw *hw,
|
||||
offset &= 0xff;
|
||||
newoffset = offset;
|
||||
if (RT_CANNOT_IO(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n");
|
||||
pr_err("return all one\n");
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
|
||||
@ -220,7 +220,7 @@ static void _rtl88e_phy_rf_serial_write(struct ieee80211_hw *hw,
|
||||
struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
|
||||
|
||||
if (RT_CANNOT_IO(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n");
|
||||
pr_err("stop\n");
|
||||
return;
|
||||
}
|
||||
offset &= 0xff;
|
||||
@ -373,7 +373,7 @@ static bool _rtl88e_phy_bb8188e_config_parafile(struct ieee80211_hw *hw)
|
||||
|
||||
rtstatus = phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_PHY_REG);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
|
||||
pr_err("Write BB Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -383,13 +383,13 @@ static bool _rtl88e_phy_bb8188e_config_parafile(struct ieee80211_hw *hw)
|
||||
phy_config_bb_with_pghdr(hw, BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
|
||||
pr_err("BB_PG Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
rtstatus =
|
||||
phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_AGC_TAB);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
|
||||
pr_err("AGC Table Fail\n");
|
||||
return false;
|
||||
}
|
||||
rtlphy->cck_high_power =
|
||||
@ -1095,8 +1095,7 @@ void rtl88e_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
|
||||
(u8 *)&iotype);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Unknown Scan Backup operation.\n");
|
||||
pr_err("Unknown Scan Backup operation.\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1137,8 +1136,8 @@ void rtl88e_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1162,8 +1161,8 @@ void rtl88e_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
rtl88e_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
|
||||
@ -1231,8 +1230,8 @@ u8 rtl88e_phy_sw_chnl(struct ieee80211_hw *hw)
|
||||
return 0;
|
||||
if (rtlphy->set_bwmode_inprogress)
|
||||
return 0;
|
||||
RT_ASSERT((rtlphy->current_channel <= 14),
|
||||
"WIRELESS_MODE_G but channel>14");
|
||||
WARN_ONCE((rtlphy->current_channel > 14),
|
||||
"rtl8188ee: WIRELESS_MODE_G but channel>14");
|
||||
rtlphy->sw_chnl_inprogress = true;
|
||||
rtlphy->sw_chnl_stage = 0;
|
||||
rtlphy->sw_chnl_step = 0;
|
||||
@ -1280,8 +1279,8 @@ static bool _rtl88e_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
|
||||
rfdependcmdcnt = 0;
|
||||
|
||||
RT_ASSERT((channel >= 1 && channel <= 14),
|
||||
"illegal channel for Zebra: %d\n", channel);
|
||||
WARN_ONCE((channel < 1 || channel > 14),
|
||||
"rtl8188ee: illegal channel for Zebra: %d\n", channel);
|
||||
|
||||
_rtl88e_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
|
||||
MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG,
|
||||
@ -1303,8 +1302,8 @@ static bool _rtl88e_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
currentcmd = &postcommoncmd[*step];
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Invalid 'stage' = %d, Check it!\n", *stage);
|
||||
pr_err("Invalid 'stage' = %d, Check it!\n",
|
||||
*stage);
|
||||
return true;
|
||||
}
|
||||
|
||||
@ -1367,7 +1366,7 @@ static bool _rtl88e_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
|
||||
struct swchnlcmd *pcmd;
|
||||
|
||||
if (cmdtable == NULL) {
|
||||
RT_ASSERT(false, "cmdtable cannot be NULL.\n");
|
||||
WARN_ONCE(true, "rtl8188ee: cmdtable cannot be NULL.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -51,8 +51,7 @@ void rtl88e_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
rtlphy->rfreg_chnlval[0]);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", bandwidth);
|
||||
pr_err("unknown bandwidth: %#X\n", bandwidth);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -165,8 +165,7 @@ int rtl88e_init_sw_vars(struct ieee80211_hw *hw)
|
||||
/* for firmware buf */
|
||||
rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
|
||||
if (!rtlpriv->rtlhal.pfirmware) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't alloc buffer for fw.\n");
|
||||
pr_info("Can't alloc buffer for fw.\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -177,8 +176,7 @@ int rtl88e_init_sw_vars(struct ieee80211_hw *hw)
|
||||
rtlpriv->io.dev, GFP_KERNEL, hw,
|
||||
rtl_fw_cb);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to request firmware!\n");
|
||||
pr_info("Failed to request firmware!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -278,7 +276,7 @@ static struct rtl_mod_params rtl88ee_mod_params = {
|
||||
.swctrl_lps = false,
|
||||
.fwctrl_lps = false,
|
||||
.msi_support = true,
|
||||
.debug = DBG_EMERG,
|
||||
.debug = 0,
|
||||
};
|
||||
|
||||
static const struct rtl_hal_cfg rtl88ee_hal_cfg = {
|
||||
|
@ -760,7 +760,7 @@ void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
|
||||
SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -779,7 +779,7 @@ void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
|
||||
SET_RX_DESC_EOR(pdesc, 1);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -799,7 +799,7 @@ u32 rtl88ee_get_desc(u8 *pdesc, bool istx, u8 desc_name)
|
||||
ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -815,7 +815,7 @@ u32 rtl88ee_get_desc(u8 *pdesc, bool istx, u8 desc_name)
|
||||
ret = GET_RX_DESC_BUFF_ADDR(pdesc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
|
@ -145,10 +145,8 @@ static void _rtl92c_write_fw(struct ieee80211_hw *hw,
|
||||
pageNums = size / FW_8192C_PAGE_SIZE;
|
||||
remainsize = size % FW_8192C_PAGE_SIZE;
|
||||
|
||||
if (pageNums > 4) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Page numbers should not greater then 4\n");
|
||||
}
|
||||
if (pageNums > 4)
|
||||
pr_err("Page numbers should not greater then 4\n");
|
||||
|
||||
for (page = 0; page < pageNums; page++) {
|
||||
offset = page * FW_8192C_PAGE_SIZE;
|
||||
@ -180,15 +178,10 @@ static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
(!(value32 & FWDL_ChkSum_rpt)));
|
||||
|
||||
if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"chksum report faill ! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
pr_err("chksum report fail! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32);
|
||||
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
value32 |= MCUFWDL_RDY;
|
||||
value32 &= ~WINTINI_RDY;
|
||||
@ -198,20 +191,15 @@ static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
|
||||
do {
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
if (value32 & WINTINI_RDY) {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Polling FW ready success!! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
err = 0;
|
||||
goto exit;
|
||||
}
|
||||
if (value32 & WINTINI_RDY)
|
||||
return 0;
|
||||
|
||||
mdelay(FW_8192C_POLLING_DELAY);
|
||||
|
||||
} while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32);
|
||||
pr_err("Polling FW ready fail! REG_MCUFWDL:0x%08x.\n",
|
||||
value32);
|
||||
|
||||
exit:
|
||||
return err;
|
||||
@ -250,13 +238,8 @@ int rtl92c_download_fw(struct ieee80211_hw *hw)
|
||||
_rtl92c_enable_fw_download(hw, false);
|
||||
|
||||
err = _rtl92c_fw_free_to_go(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Firmware is not ready to run!\n");
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Firmware is ready to run!\n");
|
||||
}
|
||||
if (err)
|
||||
pr_err("Firmware is not ready to run!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -327,8 +310,7 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
|
||||
while (!bwrite_sucess) {
|
||||
wait_writeh2c_limmit--;
|
||||
if (wait_writeh2c_limmit == 0) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Write H2C fail because no trigger for FW INT!\n");
|
||||
pr_err("Write H2C fail because no trigger for FW INT!\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -485,8 +467,8 @@ void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
u32 tmp_cmdbuf[2];
|
||||
|
||||
if (!rtlhal->fw_ready) {
|
||||
RT_ASSERT(false,
|
||||
"return H2C cmd because of Fw download fail!!!\n");
|
||||
WARN_ONCE(true,
|
||||
"rtl8192c-common: return H2C cmd because of Fw download fail!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
@ -510,7 +492,7 @@ void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
|
||||
while (u1b_tmp & BIT(2)) {
|
||||
delay--;
|
||||
if (delay == 0) {
|
||||
RT_ASSERT(false, "8051 reset fail.\n");
|
||||
WARN_ONCE(true, "rtl8192c-common: 8051 reset fail.\n");
|
||||
break;
|
||||
}
|
||||
udelay(50);
|
||||
|
@ -77,7 +77,7 @@ EXPORT_SYMBOL(rtl92c_phy_set_bb_reg);
|
||||
u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath, u32 offset)
|
||||
{
|
||||
RT_ASSERT(false, "deprecated!\n");
|
||||
WARN_ONCE(true, "rtl8192c-common: _rtl92c_phy_fw_rf_serial_read deprecated!\n");
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_read);
|
||||
@ -86,7 +86,7 @@ void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
|
||||
enum radio_path rfpath, u32 offset,
|
||||
u32 data)
|
||||
{
|
||||
RT_ASSERT(false, "deprecated!\n");
|
||||
WARN_ONCE(true, "rtl8192c-common: _rtl92c_phy_fw_rf_serial_write deprecated!\n");
|
||||
}
|
||||
EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_write);
|
||||
|
||||
@ -104,7 +104,7 @@ u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
|
||||
offset &= 0x3f;
|
||||
newoffset = offset;
|
||||
if (RT_CANNOT_IO(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n");
|
||||
pr_err("return all one\n");
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
|
||||
@ -152,7 +152,7 @@ void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
|
||||
struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
|
||||
|
||||
if (RT_CANNOT_IO(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n");
|
||||
pr_err("stop\n");
|
||||
return;
|
||||
}
|
||||
offset &= 0x3f;
|
||||
@ -209,7 +209,7 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
|
||||
rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
|
||||
pr_err("Write BB Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
if (rtlphy->rf_type == RF_1T2R) {
|
||||
@ -222,13 +222,13 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
|
||||
pr_err("BB_PG Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_AGC_TAB);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
|
||||
pr_err("AGC Table Fail\n");
|
||||
return false;
|
||||
}
|
||||
rtlphy->cck_high_power =
|
||||
@ -745,8 +745,8 @@ u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw)
|
||||
return 0;
|
||||
if (rtlphy->set_bwmode_inprogress)
|
||||
return 0;
|
||||
RT_ASSERT((rtlphy->current_channel <= 14),
|
||||
"WIRELESS_MODE_G but channel>14");
|
||||
WARN_ONCE((rtlphy->current_channel > 14),
|
||||
"rtl8192c-common: WIRELESS_MODE_G but channel>14");
|
||||
rtlphy->sw_chnl_inprogress = true;
|
||||
rtlphy->sw_chnl_stage = 0;
|
||||
rtlphy->sw_chnl_step = 0;
|
||||
@ -792,7 +792,7 @@ static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
|
||||
struct swchnlcmd *pcmd;
|
||||
|
||||
if (cmdtable == NULL) {
|
||||
RT_ASSERT(false, "cmdtable cannot be NULL.\n");
|
||||
WARN_ONCE(true, "rtl8192c-common: cmdtable cannot be NULL.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -837,8 +837,8 @@ bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
|
||||
rfdependcmdcnt = 0;
|
||||
|
||||
RT_ASSERT((channel >= 1 && channel <= 14),
|
||||
"illegal channel for Zebra: %d\n", channel);
|
||||
WARN_ONCE((channel < 1 || channel > 14),
|
||||
"rtl8192c-common: illegal channel for Zebra: %d\n", channel);
|
||||
|
||||
_rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
|
||||
MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG,
|
||||
@ -860,8 +860,8 @@ bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
currentcmd = &postcommoncmd[*step];
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Invalid 'stage' = %d, Check it!\n", *stage);
|
||||
pr_err("Invalid 'stage' = %d, Check it!\n",
|
||||
*stage);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -140,8 +140,7 @@ void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HAL_DEF_WOWLAN:
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -364,9 +363,8 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
acm_ctrl &= (~AcmHw_VoqEn);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
e_aci);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
e_aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -551,8 +549,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
rtl92c_fill_h2c_cmd(hw, H2C_92C_KEEP_ALIVE_CTRL, 2, array);
|
||||
break; }
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %d not processed\n", variable);
|
||||
pr_err("switch case %d not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -573,9 +570,8 @@ static bool _rtl92ce_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
|
||||
break;
|
||||
|
||||
if (count > POLLING_LLT_THRESHOLD) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
pr_err("Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
status = false;
|
||||
break;
|
||||
}
|
||||
@ -963,7 +959,7 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw)
|
||||
rtlpriv->intf_ops->disable_aspm(hw);
|
||||
rtstatus = _rtl92ce_init_mac(hw);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
pr_err("Init MAC failed\n");
|
||||
err = 1;
|
||||
goto exit;
|
||||
}
|
||||
@ -1128,8 +1124,7 @@ static enum version_8192c _rtl92ce_read_chip_version(struct ieee80211_hw *hw)
|
||||
break;
|
||||
}
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Chip Version ID: %s\n", versionid);
|
||||
pr_info("Chip Version ID: %s\n", versionid);
|
||||
|
||||
switch (version & 0x3) {
|
||||
case CHIP_88C:
|
||||
@ -1143,8 +1138,7 @@ static enum version_8192c _rtl92ce_read_chip_version(struct ieee80211_hw *hw)
|
||||
break;
|
||||
default:
|
||||
rtlphy->rf_type = RF_1T1R;
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"ERROR RF_Type is set!!\n");
|
||||
pr_err("ERROR RF_Type is set!!\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1193,8 +1187,7 @@ static int _rtl92ce_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to Mesh Point!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not supported!\n", type);
|
||||
pr_err("Network type %d not supported!\n", type);
|
||||
return 1;
|
||||
|
||||
}
|
||||
@ -1292,7 +1285,7 @@ void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci)
|
||||
rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "invalid aci: %d !\n", aci);
|
||||
WARN_ONCE(true, "rtl8192ce: invalid aci: %d !\n", aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1780,7 +1773,7 @@ void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->autoload_failflag = false;
|
||||
_rtl92ce_read_adapter_info(hw);
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
|
||||
pr_err("Autoload ERR!!\n");
|
||||
}
|
||||
_rtl92ce_hal_customized_behavior(hw);
|
||||
}
|
||||
@ -2152,8 +2145,8 @@ void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
enc_algo = CAM_AES;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", enc_algo);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
enc_algo);
|
||||
enc_algo = CAM_TKIP;
|
||||
break;
|
||||
}
|
||||
@ -2171,9 +2164,7 @@ void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
entry_id = rtl_cam_get_free_entry(hw,
|
||||
p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC,
|
||||
DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
@ -57,8 +57,8 @@ void rtl92ce_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = true;
|
||||
@ -92,8 +92,7 @@ void rtl92ce_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3)));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_info("switch case %#x not processed\n", pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = false;
|
||||
|
@ -297,10 +297,10 @@ bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
|
||||
break;
|
||||
case RF90_PATH_C:
|
||||
case RF90_PATH_D:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpath);
|
||||
pr_info("Incorrect rfpath %#x\n", rfpath);
|
||||
break;
|
||||
default:
|
||||
pr_info("switch case %#x not processed\n", rfpath);
|
||||
break;
|
||||
}
|
||||
return true;
|
||||
@ -340,8 +340,7 @@ void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_info("unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -365,8 +364,8 @@ void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
rtl92ce_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
|
||||
@ -546,8 +545,8 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
break;
|
||||
}
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpwr_state);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
rfpwr_state);
|
||||
bresult = false;
|
||||
break;
|
||||
}
|
||||
|
@ -51,8 +51,7 @@ void rtl92ce_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
rtlphy->rfreg_chnlval[0]);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", bandwidth);
|
||||
pr_err("unknown bandwidth: %#X\n", bandwidth);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -158,8 +158,7 @@ int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
|
||||
/* for firmware buf */
|
||||
rtlpriv->rtlhal.pfirmware = vzalloc(0x4000);
|
||||
if (!rtlpriv->rtlhal.pfirmware) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't alloc buffer for fw\n");
|
||||
pr_err("Can't alloc buffer for fw\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -173,8 +172,7 @@ int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
|
||||
rtlpriv->io.dev, GFP_KERNEL, hw,
|
||||
rtl_fw_cb);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to request firmware!\n");
|
||||
pr_err("Failed to request firmware!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -249,7 +247,7 @@ static struct rtl_mod_params rtl92ce_mod_params = {
|
||||
.inactiveps = true,
|
||||
.swctrl_lps = false,
|
||||
.fwctrl_lps = true,
|
||||
.debug = DBG_EMERG,
|
||||
.debug = 0,
|
||||
};
|
||||
|
||||
static const struct rtl_hal_cfg rtl92ce_hal_cfg = {
|
||||
|
@ -670,7 +670,7 @@ void rtl92ce_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -690,7 +690,7 @@ void rtl92ce_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_RX_DESC_EOR(pdesc, 1);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -710,7 +710,7 @@ u32 rtl92ce_get_desc(u8 *p_desc, bool istx, u8 desc_name)
|
||||
ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -726,7 +726,7 @@ u32 rtl92ce_get_desc(u8 *p_desc, bool istx, u8 desc_name)
|
||||
ret = GET_RX_DESC_BUFF_ADDR(p_desc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
|
@ -452,8 +452,7 @@ static int _rtl92cu_init_power_on(struct ieee80211_hw *hw)
|
||||
break;
|
||||
}
|
||||
if (pollingCount++ > 100) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n");
|
||||
pr_err("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
} while (true);
|
||||
@ -486,8 +485,7 @@ static int _rtl92cu_init_power_on(struct ieee80211_hw *hw)
|
||||
break;
|
||||
}
|
||||
if (pollingCount++ > 1000) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n");
|
||||
pr_err("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
} while (true);
|
||||
@ -687,7 +685,6 @@ static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw,
|
||||
u8 queue_sel)
|
||||
{
|
||||
u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
|
||||
if (!wmm_enable) { /* typical setting */
|
||||
beQ = QUEUE_LOW;
|
||||
@ -705,8 +702,7 @@ static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw,
|
||||
hiQ = QUEUE_HIGH;
|
||||
}
|
||||
_rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n",
|
||||
queue_sel);
|
||||
pr_info("Tx queue select :0x%02x..\n", queue_sel);
|
||||
}
|
||||
|
||||
static void _rtl92cu_init_chipN_queue_priority(struct ieee80211_hw *hw,
|
||||
@ -765,8 +761,7 @@ static void _rtl92cu_init_chipT_queue_priority(struct ieee80211_hw *hw,
|
||||
break;
|
||||
}
|
||||
rtl_write_byte(rtlpriv, (REG_TRXDMA_CTRL+1), hq_sele);
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n",
|
||||
hq_sele);
|
||||
pr_info("Tx queue select :0x%02x..\n", hq_sele);
|
||||
}
|
||||
|
||||
static void _rtl92cu_init_queue_priority(struct ieee80211_hw *hw,
|
||||
@ -848,8 +843,7 @@ static int _rtl92cu_init_mac(struct ieee80211_hw *hw)
|
||||
err = _rtl92cu_init_power_on(hw);
|
||||
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to init power on!\n");
|
||||
pr_err("Failed to init power on!\n");
|
||||
return err;
|
||||
}
|
||||
if (!wmm_enable) {
|
||||
@ -860,8 +854,7 @@ static int _rtl92cu_init_mac(struct ieee80211_hw *hw)
|
||||
: WMM_CHIP_A_TX_PAGE_BOUNDARY;
|
||||
}
|
||||
if (false == rtl92c_init_llt_table(hw, boundary)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to init LLT Table!\n");
|
||||
pr_err("Failed to init LLT Table!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
_rtl92cu_init_queue_reserved_page(hw, wmm_enable, out_ep_nums,
|
||||
@ -986,7 +979,7 @@ int rtl92cu_hw_init(struct ieee80211_hw *hw)
|
||||
rtlhal->hw_type = HARDWARE_TYPE_RTL8192CU;
|
||||
err = _rtl92cu_init_mac(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "init mac failed!\n");
|
||||
pr_err("init mac failed!\n");
|
||||
goto exit;
|
||||
}
|
||||
err = rtl92c_download_fw(hw);
|
||||
@ -1099,8 +1092,7 @@ static void _ResetDigitalProcedure1(struct ieee80211_hw *hw, bool bWithoutHWSM)
|
||||
udelay(50);
|
||||
}
|
||||
if (retry_cnts >= 100) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"#####=> 8051 reset failed!.........................\n");
|
||||
pr_err("8051 reset failed!.........................\n");
|
||||
/* if 8051 reset fail, reset MAC. */
|
||||
rtl_write_byte(rtlpriv,
|
||||
REG_SYS_FUNC_EN + 1,
|
||||
@ -1340,8 +1332,7 @@ static int _rtl92cu_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to AP!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not supported!\n", type);
|
||||
pr_err("Network type %d not supported!\n", type);
|
||||
goto error_out;
|
||||
}
|
||||
rtl_write_byte(rtlpriv, MSR, bt_msr);
|
||||
@ -1555,8 +1546,7 @@ void rtl92cu_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HAL_DEF_WOWLAN:
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1790,7 +1780,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
u4b_ac_param);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "invalid aci: %d !\n",
|
||||
WARN_ONCE(true, "rtl8192cu: invalid aci: %d !\n",
|
||||
e_aci);
|
||||
break;
|
||||
}
|
||||
@ -1926,8 +1916,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -57,8 +57,8 @@ void rtl92cu_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = true;
|
||||
@ -90,8 +90,8 @@ void rtl92cu_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3)));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = false;
|
||||
|
@ -157,9 +157,8 @@ bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
|
||||
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
|
||||
break;
|
||||
if (count > POLLING_LLT_THRESHOLD) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
|
||||
address, _LLT_OP_VALUE(value));
|
||||
pr_err("Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
|
||||
address, _LLT_OP_VALUE(value));
|
||||
status = false;
|
||||
break;
|
||||
}
|
||||
@ -262,8 +261,7 @@ void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
enc_algo = CAM_AES;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"illegal switch case\n");
|
||||
pr_err("illegal switch case\n");
|
||||
enc_algo = CAM_TKIP;
|
||||
break;
|
||||
}
|
||||
@ -280,9 +278,7 @@ void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
entry_id = rtl_cam_get_free_entry(hw,
|
||||
p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC,
|
||||
DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
@ -274,8 +274,7 @@ bool rtl92cu_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
|
||||
break;
|
||||
case RF90_PATH_C:
|
||||
case RF90_PATH_D:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpath);
|
||||
pr_err("switch case %#x not processed\n", rfpath);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@ -314,8 +313,8 @@ void rtl92cu_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
switch (rtlphy->current_chan_bw) {
|
||||
@ -336,8 +335,8 @@ void rtl92cu_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
rtl92cu_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
|
||||
@ -509,8 +508,8 @@ static bool _rtl92cu_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
_rtl92c_phy_set_rf_sleep(hw);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpwr_state);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
rfpwr_state);
|
||||
bresult = false;
|
||||
break;
|
||||
}
|
||||
|
@ -51,8 +51,7 @@ void rtl92cu_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
rtlphy->rfreg_chnlval[0]);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", bandwidth);
|
||||
pr_err("unknown bandwidth: %#X\n", bandwidth);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -68,8 +68,7 @@ static int rtl92cu_init_sw_vars(struct ieee80211_hw *hw)
|
||||
/* for firmware buf */
|
||||
rtlpriv->rtlhal.pfirmware = vzalloc(0x4000);
|
||||
if (!rtlpriv->rtlhal.pfirmware) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't alloc buffer for fw\n");
|
||||
pr_err("Can't alloc buffer for fw\n");
|
||||
return 1;
|
||||
}
|
||||
if (IS_VENDOR_UMC_A_CUT(rtlpriv->rtlhal.version) &&
|
||||
@ -158,7 +157,7 @@ static struct rtl_hal_ops rtl8192cu_hal_ops = {
|
||||
|
||||
static struct rtl_mod_params rtl92cu_mod_params = {
|
||||
.sw_crypto = 0,
|
||||
.debug = DBG_EMERG,
|
||||
.debug = 0,
|
||||
};
|
||||
|
||||
module_param_named(swenc, rtl92cu_mod_params.sw_crypto, bool, 0444);
|
||||
|
@ -241,7 +241,7 @@ u16 rtl8192cu_mq_to_hwq(__le16 fc, u16 mac80211_queue_index)
|
||||
break;
|
||||
default:
|
||||
hw_queue_index = RTL_TXQ_BE;
|
||||
RT_ASSERT(false, "QSLT_BE queue, skb_queue:%d\n",
|
||||
WARN_ONCE(true, "rtl8192cu: QSLT_BE queue, skb_queue:%d\n",
|
||||
mac80211_queue_index);
|
||||
break;
|
||||
}
|
||||
|
@ -125,10 +125,8 @@ static void _rtl92d_write_fw(struct ieee80211_hw *hw,
|
||||
_rtl92d_fill_dummy(bufferPtr, &size);
|
||||
pagenums = size / FW_8192D_PAGE_SIZE;
|
||||
remainSize = size % FW_8192D_PAGE_SIZE;
|
||||
if (pagenums > 8) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Page numbers should not greater then 8\n");
|
||||
}
|
||||
if (pagenums > 8)
|
||||
pr_err("Page numbers should not greater then 8\n");
|
||||
for (page = 0; page < pagenums; page++) {
|
||||
offset = page * FW_8192D_PAGE_SIZE;
|
||||
_rtl92d_fw_page_write(hw, page, (bufferPtr + offset),
|
||||
@ -153,13 +151,10 @@ static int _rtl92d_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
} while ((counter++ < FW_8192D_POLLING_TIMEOUT_COUNT) &&
|
||||
(!(value32 & FWDL_ChkSum_rpt)));
|
||||
if (counter >= FW_8192D_POLLING_TIMEOUT_COUNT) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"chksum report faill ! REG_MCUFWDL:0x%08x\n",
|
||||
value32);
|
||||
pr_err("chksum report fail! REG_MCUFWDL:0x%08x\n",
|
||||
value32);
|
||||
return -EIO;
|
||||
}
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Checksum report OK ! REG_MCUFWDL:0x%08x\n", value32);
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
value32 |= MCUFWDL_RDY;
|
||||
rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
|
||||
@ -182,7 +177,7 @@ void rtl92d_firmware_selfreset(struct ieee80211_hw *hw)
|
||||
udelay(50);
|
||||
u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
|
||||
}
|
||||
RT_ASSERT((delay > 0), "8051 reset failed!\n");
|
||||
WARN_ONCE((delay <= 0), "rtl8192de: 8051 reset failed!\n");
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
|
||||
"=====> 8051 reset success (%d)\n", delay);
|
||||
}
|
||||
@ -326,13 +321,9 @@ int rtl92d_download_fw(struct ieee80211_hw *hw)
|
||||
value &= (~BIT(5));
|
||||
rtl_write_byte(rtlpriv, 0x1f, value);
|
||||
spin_unlock_irqrestore(&globalmutex_for_fwdownload, flags);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"fw is not ready to run!\n");
|
||||
if (err)
|
||||
pr_err("fw is not ready to run!\n");
|
||||
goto exit;
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, "fw is ready to run!\n");
|
||||
}
|
||||
exit:
|
||||
err = _rtl92d_fw_init(hw);
|
||||
return err;
|
||||
@ -407,8 +398,7 @@ static void _rtl92d_fill_h2c_command(struct ieee80211_hw *hw,
|
||||
while (!bwrite_success) {
|
||||
wait_writeh2c_limmit--;
|
||||
if (wait_writeh2c_limmit == 0) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Write H2C fail because no trigger for FW INT!\n");
|
||||
pr_err("Write H2C fail because no trigger for FW INT!\n");
|
||||
break;
|
||||
}
|
||||
boxnum = rtlhal->last_hmeboxnum;
|
||||
@ -430,8 +420,8 @@ static void _rtl92d_fill_h2c_command(struct ieee80211_hw *hw,
|
||||
box_extreg = REG_HMEBOX_EXT_3;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", boxnum);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
boxnum);
|
||||
break;
|
||||
}
|
||||
isfw_read = _rtl92d_check_fw_read_last_h2c(hw, boxnum);
|
||||
@ -507,8 +497,8 @@ static void _rtl92d_fill_h2c_command(struct ieee80211_hw *hw,
|
||||
boxcontent[idx]);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", cmd_len);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
cmd_len);
|
||||
break;
|
||||
}
|
||||
bwrite_success = true;
|
||||
|
@ -163,8 +163,7 @@ void rtl92de_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HAL_DEF_WOWLAN:
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -358,9 +357,8 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
acm_ctrl &= (~ACMHW_VOQEN);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
e_aci);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
e_aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -500,8 +498,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -520,9 +517,8 @@ static bool _rtl92de_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
|
||||
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
|
||||
break;
|
||||
if (count > POLLING_LLT_THRESHOLD) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
pr_err("Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
status = false;
|
||||
break;
|
||||
}
|
||||
@ -920,7 +916,7 @@ int rtl92de_hw_init(struct ieee80211_hw *hw)
|
||||
/* rtlpriv->intf_ops->disable_aspm(hw); */
|
||||
rtstatus = _rtl92de_init_mac(hw);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
pr_err("Init MAC failed\n");
|
||||
err = 1;
|
||||
spin_unlock_irqrestore(&globalmutex_for_power_and_efuse, flags);
|
||||
return err;
|
||||
@ -1119,11 +1115,8 @@ static int _rtl92de_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to AP!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not supported!\n", type);
|
||||
pr_err("Network type %d not supported!\n", type);
|
||||
return 1;
|
||||
break;
|
||||
|
||||
}
|
||||
rtl_write_byte(rtlpriv, MSR, bt_msr);
|
||||
rtlpriv->cfg->ops->led_control(hw, ledaction);
|
||||
@ -1732,7 +1725,7 @@ static void _rtl92de_efuse_update_chip_version(struct ieee80211_hw *hw)
|
||||
break;
|
||||
default:
|
||||
chipver |= CHIP_92D_D_CUT;
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unknown CUT!\n");
|
||||
pr_err("Unknown CUT!\n");
|
||||
break;
|
||||
}
|
||||
rtlpriv->rtlhal.version = chipver;
|
||||
@ -1816,7 +1809,7 @@ void rtl92de_read_eeprom_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->autoload_failflag = false;
|
||||
_rtl92de_read_adapter_info(hw);
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
|
||||
pr_err("Autoload ERR!!\n");
|
||||
}
|
||||
return;
|
||||
}
|
||||
@ -2169,8 +2162,8 @@ void rtl92de_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
enc_algo = CAM_AES;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", enc_algo);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
enc_algo);
|
||||
enc_algo = CAM_TKIP;
|
||||
break;
|
||||
}
|
||||
@ -2186,9 +2179,7 @@ void rtl92de_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
entry_id = rtl_cam_get_free_entry(hw,
|
||||
p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC,
|
||||
DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
@ -66,8 +66,8 @@ void rtl92de_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = true;
|
||||
@ -101,8 +101,8 @@ void rtl92de_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3)));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = false;
|
||||
|
@ -716,7 +716,7 @@ static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw)
|
||||
rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
|
||||
pr_err("Write BB Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -731,13 +731,13 @@ static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw)
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
|
||||
pr_err("BB_PG Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_AGC_TAB);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
|
||||
pr_err("AGC Table Fail\n");
|
||||
return false;
|
||||
}
|
||||
rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw,
|
||||
@ -833,8 +833,7 @@ bool rtl92d_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
|
||||
break;
|
||||
case RF90_PATH_C:
|
||||
case RF90_PATH_D:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpath);
|
||||
pr_err("switch case %#x not processed\n", rfpath);
|
||||
break;
|
||||
}
|
||||
return true;
|
||||
@ -987,8 +986,8 @@ void rtl92d_phy_set_bw_mode(struct ieee80211_hw *hw,
|
||||
rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
switch (rtlphy->current_chan_bw) {
|
||||
@ -1019,8 +1018,8 @@ void rtl92d_phy_set_bw_mode(struct ieee80211_hw *hw,
|
||||
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
|
||||
}
|
||||
@ -2700,7 +2699,7 @@ static bool _rtl92d_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
|
||||
struct swchnlcmd *pcmd;
|
||||
|
||||
if (cmdtable == NULL) {
|
||||
RT_ASSERT(false, "cmdtable cannot be NULL\n");
|
||||
WARN_ONCE(true, "rtl8192de: cmdtable cannot be NULL\n");
|
||||
return false;
|
||||
}
|
||||
if (cmdtableidx >= cmdtablesz)
|
||||
@ -2842,9 +2841,8 @@ static bool _rtl92d_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
rtl92d_phy_reload_iqk_setting(hw, channel);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
currentcmd->cmdid);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
currentcmd->cmdid);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@ -2893,17 +2891,17 @@ u8 rtl92d_phy_sw_chnl(struct ieee80211_hw *hw)
|
||||
* 5G and 2.4G band. */
|
||||
if (channel <= 14)
|
||||
return 0;
|
||||
RT_ASSERT((channel > 14), "5G but channel<=14\n");
|
||||
WARN_ONCE((channel <= 14), "rtl8192de: 5G but channel<=14\n");
|
||||
break;
|
||||
case BAND_ON_2_4G:
|
||||
/* Get first channel error when change between
|
||||
* 5G and 2.4G band. */
|
||||
if (channel > 14)
|
||||
return 0;
|
||||
RT_ASSERT((channel <= 14), "2G but channel>14\n");
|
||||
WARN_ONCE((channel > 14), "rtl8192de: 2G but channel>14\n");
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "Invalid WirelessMode(%#x)!!\n",
|
||||
WARN_ONCE(true, "rtl8192de: Invalid WirelessMode(%#x)!!\n",
|
||||
rtlpriv->mac80211.mode);
|
||||
break;
|
||||
}
|
||||
@ -2956,9 +2954,8 @@ static void rtl92d_phy_set_io(struct ieee80211_hw *hw)
|
||||
rtl92d_dm_write_dig(hw);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
rtlphy->current_io_type);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
rtlphy->current_io_type);
|
||||
break;
|
||||
}
|
||||
rtlphy->set_io_inprogress = false;
|
||||
@ -2988,8 +2985,8 @@ bool rtl92d_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype)
|
||||
postprocessing = true;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", iotype);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
iotype);
|
||||
break;
|
||||
}
|
||||
} while (false);
|
||||
@ -3176,8 +3173,8 @@ bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
_rtl92d_phy_set_rfsleep(hw);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpwr_state);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
rfpwr_state);
|
||||
bresult = false;
|
||||
break;
|
||||
}
|
||||
@ -3336,7 +3333,7 @@ void rtl92d_phy_set_poweron(struct ieee80211_hw *hw)
|
||||
}
|
||||
}
|
||||
if (i == 200)
|
||||
RT_ASSERT(false, "Another mac power off over time\n");
|
||||
WARN_ONCE(true, "rtl8192de: Another mac power off over time\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -63,8 +63,7 @@ void rtl92d_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
}
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", bandwidth);
|
||||
pr_err("unknown bandwidth: %#X\n", bandwidth);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -171,8 +171,7 @@ static int rtl92d_init_sw_vars(struct ieee80211_hw *hw)
|
||||
/* for firmware buf */
|
||||
rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
|
||||
if (!rtlpriv->rtlhal.pfirmware) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't alloc buffer for fw\n");
|
||||
pr_err("Can't alloc buffer for fw\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -185,8 +184,7 @@ static int rtl92d_init_sw_vars(struct ieee80211_hw *hw)
|
||||
rtlpriv->io.dev, GFP_KERNEL, hw,
|
||||
rtl_fw_cb);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to request firmware!\n");
|
||||
pr_err("Failed to request firmware!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -256,7 +254,7 @@ static struct rtl_mod_params rtl92de_mod_params = {
|
||||
.inactiveps = true,
|
||||
.swctrl_lps = true,
|
||||
.fwctrl_lps = false,
|
||||
.debug = DBG_EMERG,
|
||||
.debug = 0,
|
||||
};
|
||||
|
||||
static const struct rtl_hal_cfg rtl92de_hal_cfg = {
|
||||
@ -402,7 +400,7 @@ static int __init rtl92de_module_init(void)
|
||||
|
||||
ret = pci_register_driver(&rtl92de_driver);
|
||||
if (ret)
|
||||
RT_ASSERT(false, "No device found\n");
|
||||
WARN_ONCE(true, "rtl8192de: No device found\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -794,7 +794,7 @@ void rtl92de_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192de: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -814,7 +814,7 @@ void rtl92de_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_RX_DESC_EOR(pdesc, 1);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192de: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -834,7 +834,7 @@ u32 rtl92de_get_desc(u8 *p_desc, bool istx, u8 desc_name)
|
||||
ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192de: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -848,7 +848,7 @@ u32 rtl92de_get_desc(u8 *p_desc, bool istx, u8 desc_name)
|
||||
ret = GET_RX_DESC_PKT_LEN(pdesc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192de: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
|
@ -122,10 +122,8 @@ static void _rtl92ee_write_fw(struct ieee80211_hw *hw,
|
||||
pagenums = size / FW_8192C_PAGE_SIZE;
|
||||
remainsize = size % FW_8192C_PAGE_SIZE;
|
||||
|
||||
if (pagenums > 8) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Page numbers should not greater then 8\n");
|
||||
}
|
||||
if (pagenums > 8)
|
||||
pr_err("Page numbers should not greater then 8\n");
|
||||
|
||||
for (page = 0; page < pagenums; page++) {
|
||||
offset = page * FW_8192C_PAGE_SIZE;
|
||||
@ -155,15 +153,10 @@ static int _rtl92ee_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
(!(value32 & FWDL_CHKSUM_RPT)));
|
||||
|
||||
if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"chksum report faill ! REG_MCUFWDL:0x%08x .\n",
|
||||
value32);
|
||||
pr_err("chksum report fail! REG_MCUFWDL:0x%08x\n",
|
||||
value32);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
|
||||
"Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32);
|
||||
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
value32 |= MCUFWDL_RDY;
|
||||
value32 &= ~WINTINI_RDY;
|
||||
@ -174,21 +167,15 @@ static int _rtl92ee_fw_free_to_go(struct ieee80211_hw *hw)
|
||||
|
||||
do {
|
||||
value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
|
||||
if (value32 & WINTINI_RDY) {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD ,
|
||||
"Polling FW ready success!! REG_MCUFWDL:0x%08x. count = %d\n",
|
||||
value32, counter);
|
||||
err = 0;
|
||||
goto exit;
|
||||
}
|
||||
if (value32 & WINTINI_RDY)
|
||||
return 0;
|
||||
|
||||
udelay(FW_8192C_POLLING_DELAY*10);
|
||||
|
||||
} while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Polling FW ready fail!! REG_MCUFWDL:0x%08x. count = %d\n",
|
||||
value32, counter);
|
||||
pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x. count = %d\n",
|
||||
value32, counter);
|
||||
|
||||
exit:
|
||||
return err;
|
||||
@ -240,13 +227,6 @@ int rtl92ee_download_fw(struct ieee80211_hw *hw, bool buse_wake_on_wlan_fw)
|
||||
_rtl92ee_enable_fw_download(hw, false);
|
||||
|
||||
err = _rtl92ee_fw_free_to_go(hw);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Firmware is not ready to run!\n");
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD ,
|
||||
"Firmware is ready to run!\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -462,8 +442,8 @@ void rtl92ee_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
u32 tmp_cmdbuf[2];
|
||||
|
||||
if (!rtlhal->fw_ready) {
|
||||
RT_ASSERT(false,
|
||||
"return H2C cmd because of Fw download fail!!!\n");
|
||||
WARN_ONCE(true,
|
||||
"rtl8192ee: error H2C cmd because of Fw download fail!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1006,7 +1006,7 @@ static void _rtl92ee_hw_configure(struct ieee80211_hw *hw)
|
||||
rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x100a);
|
||||
|
||||
/* Note Data sheet don't define */
|
||||
rtl_write_word(rtlpriv, 0x4C7, 0x80);
|
||||
rtl_write_byte(rtlpriv, 0x4C7, 0x80);
|
||||
|
||||
rtl_write_byte(rtlpriv, REG_RX_PKT_LIMIT, 0x20);
|
||||
|
||||
@ -1320,7 +1320,7 @@ int rtl92ee_hw_init(struct ieee80211_hw *hw)
|
||||
rtl_write_byte(rtlpriv, 0x65, 1);
|
||||
}
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
pr_err("Init MAC failed\n");
|
||||
err = 1;
|
||||
return err;
|
||||
}
|
||||
@ -1485,8 +1485,7 @@ static int _rtl92ee_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to AP!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not support!\n", type);
|
||||
pr_err("Network type %d not support!\n", type);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1582,7 +1581,7 @@ void rtl92ee_set_qos(struct ieee80211_hw *hw, int aci)
|
||||
rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "invalid aci: %d !\n", aci);
|
||||
WARN_ONCE(true, "rtl8192ee: invalid aci: %d !\n", aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -2206,7 +2205,7 @@ void rtl92ee_read_eeprom_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->autoload_failflag = false;
|
||||
_rtl92ee_read_adapter_info(hw);
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
|
||||
pr_err("Autoload ERR!!\n");
|
||||
}
|
||||
_rtl92ee_hal_customized_behavior(hw);
|
||||
|
||||
@ -2484,9 +2483,7 @@ void rtl92ee_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
entry_id = rtl_cam_get_free_entry(hw,
|
||||
p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC,
|
||||
DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
@ -170,7 +170,7 @@ static u32 _rtl92ee_phy_rf_serial_read(struct ieee80211_hw *hw,
|
||||
offset &= 0xff;
|
||||
newoffset = offset;
|
||||
if (RT_CANNOT_IO(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n");
|
||||
pr_err("return all one\n");
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
|
||||
@ -214,7 +214,7 @@ static void _rtl92ee_phy_rf_serial_write(struct ieee80211_hw *hw,
|
||||
struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
|
||||
|
||||
if (RT_CANNOT_IO(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n");
|
||||
pr_err("stop\n");
|
||||
return;
|
||||
}
|
||||
offset &= 0xff;
|
||||
@ -650,7 +650,7 @@ static bool _rtl92ee_phy_bb8192ee_config_parafile(struct ieee80211_hw *hw)
|
||||
|
||||
rtstatus = phy_config_bb_with_hdr_file(hw, BASEBAND_CONFIG_PHY_REG);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
|
||||
pr_err("Write BB Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -662,12 +662,12 @@ static bool _rtl92ee_phy_bb8192ee_config_parafile(struct ieee80211_hw *hw)
|
||||
}
|
||||
_rtl92ee_phy_txpower_by_rate_configuration(hw);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
|
||||
pr_err("BB_PG Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
rtstatus = phy_config_bb_with_hdr_file(hw, BASEBAND_CONFIG_AGC_TAB);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
|
||||
pr_err("AGC Table Fail\n");
|
||||
return false;
|
||||
}
|
||||
rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw,
|
||||
@ -1176,7 +1176,7 @@ static u8 _rtl92ee_phy_get_ratesection_intxpower_byrate(enum radio_path path,
|
||||
rate_section = 7;
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(true, "Rate_Section is Illegal\n");
|
||||
WARN_ONCE(true, "rtl8192ee: Rate_Section is Illegal\n");
|
||||
break;
|
||||
}
|
||||
return rate_section;
|
||||
@ -1239,7 +1239,7 @@ static u8 _rtl92ee_get_txpower_by_rate(struct ieee80211_hw *hw,
|
||||
shift = 24;
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(true, "Rate_Section is Illegal\n");
|
||||
WARN_ONCE(true, "rtl8192ee: Rate_Section is Illegal\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1675,8 +1675,7 @@ void rtl92ee_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
|
||||
(u8 *)&iotype);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Unknown Scan Backup operation.\n");
|
||||
pr_err("Unknown Scan Backup operation.\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1717,8 +1716,8 @@ void rtl92ee_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1742,8 +1741,8 @@ void rtl92ee_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
|
||||
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
rtl92ee_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
|
||||
@ -1811,8 +1810,8 @@ u8 rtl92ee_phy_sw_chnl(struct ieee80211_hw *hw)
|
||||
return 0;
|
||||
if (rtlphy->set_bwmode_inprogress)
|
||||
return 0;
|
||||
RT_ASSERT((rtlphy->current_channel <= 14),
|
||||
"WIRELESS_MODE_G but channel>14");
|
||||
WARN_ONCE((rtlphy->current_channel > 14),
|
||||
"rtl8192ee: WIRELESS_MODE_G but channel>14");
|
||||
rtlphy->sw_chnl_inprogress = true;
|
||||
rtlphy->sw_chnl_stage = 0;
|
||||
rtlphy->sw_chnl_step = 0;
|
||||
@ -1860,8 +1859,8 @@ static bool _rtl92ee_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
|
||||
rfdependcmdcnt = 0;
|
||||
|
||||
RT_ASSERT((channel >= 1 && channel <= 14),
|
||||
"illegal channel for Zebra: %d\n", channel);
|
||||
WARN_ONCE((channel < 1 || channel > 14),
|
||||
"rtl8192ee: illegal channel for Zebra: %d\n", channel);
|
||||
|
||||
_rtl92ee_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
|
||||
MAX_RFDEPENDCMD_CNT,
|
||||
@ -1884,8 +1883,8 @@ static bool _rtl92ee_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
currentcmd = &postcommoncmd[*step];
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Invalid 'stage' = %d, Check it!\n" , *stage);
|
||||
pr_err("Invalid 'stage' = %d, Check it!\n",
|
||||
*stage);
|
||||
return true;
|
||||
}
|
||||
|
||||
@ -1948,7 +1947,7 @@ static bool _rtl92ee_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
|
||||
struct swchnlcmd *pcmd;
|
||||
|
||||
if (cmdtable == NULL) {
|
||||
RT_ASSERT(false, "cmdtable cannot be NULL.\n");
|
||||
WARN_ONCE(true, "rtl8192ee: cmdtable cannot be NULL.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -55,8 +55,7 @@ void rtl92ee_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
rtlphy->rfreg_chnlval[0]);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", bandwidth);
|
||||
pr_err("unknown bandwidth: %#X\n", bandwidth);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -165,8 +165,7 @@ int rtl92ee_init_sw_vars(struct ieee80211_hw *hw)
|
||||
/* for firmware buf */
|
||||
rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
|
||||
if (!rtlpriv->rtlhal.pfirmware) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Can't alloc buffer for fw\n");
|
||||
pr_err("Can't alloc buffer for fw\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -179,8 +178,7 @@ int rtl92ee_init_sw_vars(struct ieee80211_hw *hw)
|
||||
rtlpriv->io.dev, GFP_KERNEL, hw,
|
||||
rtl_fw_cb);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to request firmware!\n");
|
||||
pr_err("Failed to request firmware!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -260,7 +258,7 @@ static struct rtl_mod_params rtl92ee_mod_params = {
|
||||
.swctrl_lps = false,
|
||||
.fwctrl_lps = true,
|
||||
.msi_support = true,
|
||||
.debug = DBG_EMERG,
|
||||
.debug = 0,
|
||||
};
|
||||
|
||||
static const struct rtl_hal_cfg rtl92ee_hal_cfg = {
|
||||
|
@ -991,8 +991,9 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_RX_DESC_EOR(pdesc, 1);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false,
|
||||
"ERR rxdesc :%d not process\n", desc_name);
|
||||
WARN_ONCE(true,
|
||||
"rtl8192ee: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1011,8 +1012,9 @@ u32 rtl92ee_get_desc(u8 *pdesc, bool istx, u8 desc_name)
|
||||
ret = GET_TXBUFFER_DESC_ADDR_LOW(pdesc, 1);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false,
|
||||
"ERR txdesc :%d not process\n", desc_name);
|
||||
WARN_ONCE(true,
|
||||
"rtl8192ee: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
@ -1027,8 +1029,9 @@ u32 rtl92ee_get_desc(u8 *pdesc, bool istx, u8 desc_name)
|
||||
ret = GET_RX_DESC_BUFF_ADDR(pdesc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false,
|
||||
"ERR rxdesc :%d not process\n", desc_name);
|
||||
WARN_ONCE(true,
|
||||
"rtl8192ee: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -113,8 +113,7 @@ static u8 _rtl92s_firmware_header_map_rftype(struct ieee80211_hw *hw)
|
||||
case RF_2T2R:
|
||||
return 0x22;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unknown RF type(%x)\n",
|
||||
rtlphy->rf_type);
|
||||
pr_err("Unknown RF type(%x)\n", rtlphy->rf_type);
|
||||
break;
|
||||
}
|
||||
return 0x22;
|
||||
@ -168,9 +167,7 @@ static bool _rtl92s_firmware_downloadcode(struct ieee80211_hw *hw,
|
||||
_rtl92s_fw_set_rqpn(hw);
|
||||
|
||||
if (buffer_len >= MAX_FIRMWARE_CODE_SIZE) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Size over FIRMWARE_CODE_SIZE!\n");
|
||||
|
||||
pr_err("Size over FIRMWARE_CODE_SIZE!\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -239,9 +236,8 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
|
||||
} while (pollingcnt--);
|
||||
|
||||
if (!(cpustatus & IMEM_CHK_RPT) || (pollingcnt <= 0)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\n",
|
||||
cpustatus);
|
||||
pr_err("FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\n",
|
||||
cpustatus);
|
||||
goto status_check_fail;
|
||||
}
|
||||
break;
|
||||
@ -257,17 +253,15 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
|
||||
} while (pollingcnt--);
|
||||
|
||||
if (!(cpustatus & EMEM_CHK_RPT) || (pollingcnt <= 0)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\n",
|
||||
cpustatus);
|
||||
pr_err("FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\n",
|
||||
cpustatus);
|
||||
goto status_check_fail;
|
||||
}
|
||||
|
||||
/* Turn On CPU */
|
||||
rtstatus = _rtl92s_firmware_enable_cpu(hw);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Enable CPU fail!\n");
|
||||
pr_err("Enable CPU fail!\n");
|
||||
goto status_check_fail;
|
||||
}
|
||||
break;
|
||||
@ -282,9 +276,8 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
|
||||
} while (pollingcnt--);
|
||||
|
||||
if (!(cpustatus & DMEM_CODE_DONE) || (pollingcnt <= 0)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Polling DMEM code done fail ! cpustatus(%#x)\n",
|
||||
cpustatus);
|
||||
pr_err("Polling DMEM code done fail ! cpustatus(%#x)\n",
|
||||
cpustatus);
|
||||
goto status_check_fail;
|
||||
}
|
||||
|
||||
@ -308,9 +301,8 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
|
||||
|
||||
if (((cpustatus & LOAD_FW_READY) != LOAD_FW_READY) ||
|
||||
(pollingcnt <= 0)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Polling Load Firmware ready fail ! cpustatus(%x)\n",
|
||||
cpustatus);
|
||||
pr_err("Polling Load Firmware ready fail ! cpustatus(%x)\n",
|
||||
cpustatus);
|
||||
goto status_check_fail;
|
||||
}
|
||||
|
||||
@ -331,8 +323,7 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
|
||||
break;
|
||||
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Unknown status check!\n");
|
||||
pr_err("Unknown status check!\n");
|
||||
rtstatus = false;
|
||||
break;
|
||||
}
|
||||
@ -380,8 +371,7 @@ int rtl92s_download_fw(struct ieee80211_hw *hw)
|
||||
/* 2. Retrieve IMEM image. */
|
||||
if ((pfwheader->img_imem_size == 0) || (pfwheader->img_imem_size >
|
||||
sizeof(firmware->fw_imem))) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"memory for data image is less than IMEM required\n");
|
||||
pr_err("memory for data image is less than IMEM required\n");
|
||||
goto fail;
|
||||
} else {
|
||||
puc_mappedfile += fwhdr_size;
|
||||
@ -393,8 +383,7 @@ int rtl92s_download_fw(struct ieee80211_hw *hw)
|
||||
|
||||
/* 3. Retriecve EMEM image. */
|
||||
if (pfwheader->img_sram_size > sizeof(firmware->fw_emem)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"memory for data image is less than EMEM required\n");
|
||||
pr_err("memory for data image is less than EMEM required\n");
|
||||
goto fail;
|
||||
} else {
|
||||
puc_mappedfile += firmware->fw_imem_len;
|
||||
@ -428,8 +417,7 @@ int rtl92s_download_fw(struct ieee80211_hw *hw)
|
||||
RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Unexpected Download step!!\n");
|
||||
pr_err("Unexpected Download step!!\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
@ -438,14 +426,14 @@ int rtl92s_download_fw(struct ieee80211_hw *hw)
|
||||
ul_filelength);
|
||||
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n");
|
||||
pr_err("fail!\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
/* <3> Check whether load FW process is ready */
|
||||
rtstatus = _rtl92s_firmware_checkready(hw, fwstatus);
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n");
|
||||
pr_err("rtl8192se: firmware fail!\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
|
@ -75,11 +75,9 @@ void rtl92se_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
}
|
||||
case HAL_DEF_WOWLAN:
|
||||
break;
|
||||
default: {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -294,9 +292,8 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
acm_ctrl &= (~AcmHw_VoqEn);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
e_aci);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
e_aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -431,8 +428,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
}
|
||||
break; }
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", variable);
|
||||
pr_err("switch case %#x not processed\n", variable);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -745,9 +741,8 @@ static void _rtl92se_macconfig_before_fwdownload(struct ieee80211_hw *hw)
|
||||
} while (pollingcnt--);
|
||||
|
||||
if (pollingcnt <= 0) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n",
|
||||
tmpu1b);
|
||||
pr_err("Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n",
|
||||
tmpu1b);
|
||||
tmpu1b = rtl_read_byte(rtlpriv, CMDR);
|
||||
rtl_write_byte(rtlpriv, CMDR, tmpu1b & (~TXDMA_EN));
|
||||
udelay(2);
|
||||
@ -1004,7 +999,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
|
||||
|
||||
/* 3. Initialize MAC/PHY Config by MACPHY_reg.txt */
|
||||
if (!rtl92s_phy_mac_config(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "MAC Config failed\n");
|
||||
pr_err("MAC Config failed\n");
|
||||
err = rtstatus;
|
||||
goto exit;
|
||||
}
|
||||
@ -1024,7 +1019,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
|
||||
|
||||
/* 4. Initialize BB After MAC Config PHY_reg.txt, AGC_Tab.txt */
|
||||
if (!rtl92s_phy_bb_config(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "BB Config failed\n");
|
||||
pr_err("BB Config failed\n");
|
||||
err = rtstatus;
|
||||
goto exit;
|
||||
}
|
||||
@ -1194,8 +1189,7 @@ static int _rtl92se_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to AP!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not supported!\n", type);
|
||||
pr_err("Network type %d not supported!\n", type);
|
||||
return 1;
|
||||
|
||||
}
|
||||
@ -1251,7 +1245,7 @@ void rtl92se_set_qos(struct ieee80211_hw *hw, int aci)
|
||||
rtl_write_dword(rtlpriv, EDCAPARA_VO, 0x2f3222);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "invalid aci: %d !\n", aci);
|
||||
WARN_ONCE(true, "rtl8192se: invalid aci: %d !\n", aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1685,8 +1679,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
break;
|
||||
|
||||
case EEPROM_93C46:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"RTL819X Not boot from eeprom, check it !!\n");
|
||||
pr_err("RTL819X Not boot from eeprom, check it !!\n");
|
||||
return;
|
||||
|
||||
default:
|
||||
@ -2030,7 +2023,7 @@ void rtl92se_read_eeprom_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->autoload_failflag = false;
|
||||
_rtl92se_read_adapter_info(hw);
|
||||
} else {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
|
||||
pr_err("Autoload ERR!!\n");
|
||||
rtlefuse->autoload_failflag = true;
|
||||
}
|
||||
}
|
||||
@ -2463,8 +2456,8 @@ void rtl92se_set_key(struct ieee80211_hw *hw, u32 key_index, u8 *p_macaddr,
|
||||
enc_algo = CAM_AES;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", enc_algo);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
enc_algo);
|
||||
enc_algo = CAM_TKIP;
|
||||
break;
|
||||
}
|
||||
@ -2481,9 +2474,7 @@ void rtl92se_set_key(struct ieee80211_hw *hw, u32 key_index, u8 *p_macaddr,
|
||||
entry_id = rtl_cam_get_free_entry(hw,
|
||||
p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv,
|
||||
COMP_SEC, DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
@ -63,8 +63,8 @@ void rtl92se_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, LEDCFG, ledcfg & 0x0f);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = true;
|
||||
@ -99,8 +99,8 @@ void rtl92se_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
|
||||
rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(3)));
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", pled->ledpin);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
pled->ledpin);
|
||||
break;
|
||||
}
|
||||
pled->ledon = false;
|
||||
|
@ -235,7 +235,6 @@ void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
|
||||
void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw,
|
||||
u8 operation)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
|
||||
|
||||
if (!is_hal_stop(rtlhal)) {
|
||||
@ -247,8 +246,7 @@ void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw,
|
||||
rtl92s_phy_set_fw_cmd(hw, FW_CMD_RESUME_DM_BY_SCAN);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Unknown operation\n");
|
||||
pr_err("Unknown operation\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -288,8 +286,8 @@ void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
|
||||
rtl_write_byte(rtlpriv, BW_OPMODE, reg_bw_opmode);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -313,8 +311,8 @@ void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
|
||||
rtl_write_byte(rtlpriv, RFPGA0_ANALOGPARAMETER2, 0x18);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
|
||||
pr_err("unknown bandwidth: %#X\n",
|
||||
rtlphy->current_chan_bw);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -330,7 +328,7 @@ static bool _rtl92s_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
|
||||
struct swchnlcmd *pcmd;
|
||||
|
||||
if (cmdtable == NULL) {
|
||||
RT_ASSERT(false, "cmdtable cannot be NULL\n");
|
||||
WARN_ONCE(true, "rtl8192se: cmdtable cannot be NULL\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -374,8 +372,8 @@ static bool _rtl92s_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
|
||||
rfdependcmdcnt = 0;
|
||||
|
||||
RT_ASSERT((channel >= 1 && channel <= 14),
|
||||
"invalid channel for Zebra: %d\n", channel);
|
||||
WARN_ONCE((channel < 1 || channel > 14),
|
||||
"rtl8192se: invalid channel for Zebra: %d\n", channel);
|
||||
|
||||
_rtl92s_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
|
||||
MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG,
|
||||
@ -437,9 +435,8 @@ static bool _rtl92s_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
||||
}
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n",
|
||||
currentcmd->cmdid);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
currentcmd->cmdid);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -644,8 +641,8 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
_rtl92se_phy_set_rf_sleep(hw);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", rfpwr_state);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
rfpwr_state);
|
||||
bresult = false;
|
||||
break;
|
||||
}
|
||||
@ -937,8 +934,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
|
||||
}
|
||||
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Write BB Reg Fail!!\n");
|
||||
pr_err("Write BB Reg Fail!!\n");
|
||||
goto phy_BB8190_Config_ParaFile_Fail;
|
||||
}
|
||||
|
||||
@ -951,8 +947,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n");
|
||||
pr_err("_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n");
|
||||
goto phy_BB8190_Config_ParaFile_Fail;
|
||||
}
|
||||
|
||||
@ -1077,12 +1072,10 @@ bool rtl92s_phy_bb_config(struct ieee80211_hw *hw)
|
||||
(rtlphy->rf_type == RF_1T2R && rf_num != 2) ||
|
||||
(rtlphy->rf_type == RF_2T2R && rf_num != 2) ||
|
||||
(rtlphy->rf_type == RF_2T2R_GREEN && rf_num != 2)) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"RF_Type(%x) does not match RF_Num(%x)!!\n",
|
||||
rtlphy->rf_type, rf_num);
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"path1 0x%x, path2 0x%x, pathmap 0x%x\n",
|
||||
path1, path2, pathmap);
|
||||
pr_err("RF_Type(%x) does not match RF_Num(%x)!!\n",
|
||||
rtlphy->rf_type, rf_num);
|
||||
pr_err("path1 0x%x, path2 0x%x, pathmap 0x%x\n",
|
||||
path1, path2, pathmap);
|
||||
}
|
||||
|
||||
return rtstatus;
|
||||
@ -1221,7 +1214,7 @@ void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw)
|
||||
} while (--pollingcnt);
|
||||
|
||||
if (pollingcnt == 0)
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Set FW Cmd fail!!\n");
|
||||
pr_err("Set FW Cmd fail!!\n");
|
||||
}
|
||||
|
||||
|
||||
|
@ -523,8 +523,7 @@ void rtl92s_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
|
||||
rtlphy->rfreg_chnlval[0]);
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"unknown bandwidth: %#X\n", bandwidth);
|
||||
pr_err("unknown bandwidth: %#X\n", bandwidth);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -96,8 +96,7 @@ static void rtl92se_fw_cb(const struct firmware *firmware, void *context)
|
||||
return;
|
||||
}
|
||||
if (firmware->size > rtlpriv->max_fw_size) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Firmware is too big!\n");
|
||||
pr_err("Firmware is too big!\n");
|
||||
rtlpriv->max_fw_size = 0;
|
||||
release_firmware(firmware);
|
||||
return;
|
||||
@ -218,8 +217,7 @@ static int rtl92s_init_sw_vars(struct ieee80211_hw *hw)
|
||||
rtlpriv->io.dev, GFP_KERNEL, hw,
|
||||
rtl92se_fw_cb);
|
||||
if (err) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to request firmware!\n");
|
||||
pr_err("Failed to request firmware!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -299,7 +297,7 @@ static struct rtl_mod_params rtl92se_mod_params = {
|
||||
.inactiveps = true,
|
||||
.swctrl_lps = true,
|
||||
.fwctrl_lps = false,
|
||||
.debug = DBG_EMERG,
|
||||
.debug = 0,
|
||||
};
|
||||
|
||||
/* Because memory R/W bursting will cause system hang/crash
|
||||
|
@ -583,7 +583,7 @@ void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192se: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -603,7 +603,7 @@ void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
SET_RX_STATUS_DESC_EOR(pdesc, 1);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192se: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -623,7 +623,7 @@ u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
|
||||
ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR txdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192se: ERR txdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
@ -639,7 +639,7 @@ u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
|
||||
ret = GET_RX_STATUS_DESC_BUFF_ADDR(desc);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "ERR rxdesc :%d not process\n",
|
||||
WARN_ONCE(true, "rtl8192se: ERR rxdesc :%d not processed\n",
|
||||
desc_name);
|
||||
break;
|
||||
}
|
||||
|
@ -99,8 +99,7 @@ static void _rtl8723e_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
|
||||
while (!bwrite_sucess) {
|
||||
wait_writeh2c_limmit--;
|
||||
if (wait_writeh2c_limmit == 0) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Write H2C fail because no trigger for FW INT!\n");
|
||||
pr_err("Write H2C fail because no trigger for FW INT!\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -123,8 +122,8 @@ static void _rtl8723e_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
|
||||
box_extreg = REG_HMEBOX_EXT_3;
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", boxnum);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
boxnum);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -229,8 +228,8 @@ static void _rtl8723e_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
|
||||
}
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"switch case %#x not processed\n", cmd_len);
|
||||
pr_err("switch case %#x not processed\n",
|
||||
cmd_len);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -259,8 +258,8 @@ void rtl8723e_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
u32 tmp_cmdbuf[2];
|
||||
|
||||
if (!rtlhal->fw_ready) {
|
||||
RT_ASSERT(false,
|
||||
"return H2C cmd because of Fw download fail!!!\n");
|
||||
WARN_ONCE(true,
|
||||
"rtl8723ae: error H2C cmd because of Fw download fail!!!\n");
|
||||
return;
|
||||
}
|
||||
memset(tmp_cmdbuf, 0, 8);
|
||||
|
@ -570,9 +570,8 @@ static bool _rtl8723e_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
|
||||
break;
|
||||
|
||||
if (count > POLLING_LLT_THRESHOLD) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
pr_err("Failed to polling write LLT done at address %d!\n",
|
||||
address);
|
||||
status = false;
|
||||
break;
|
||||
}
|
||||
@ -961,7 +960,7 @@ int rtl8723e_hw_init(struct ieee80211_hw *hw)
|
||||
rtlpriv->intf_ops->disable_aspm(hw);
|
||||
rtstatus = _rtl8712e_init_mac(hw);
|
||||
if (rtstatus != true) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
pr_err("Init MAC failed\n");
|
||||
err = 1;
|
||||
goto exit;
|
||||
}
|
||||
@ -1107,8 +1106,7 @@ static enum version_8723e _rtl8723e_read_chip_version(struct ieee80211_hw *hw)
|
||||
"Chip Version ID: VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT.\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Chip Version ID: Unknown. Bug?\n");
|
||||
pr_err("Chip Version ID: Unknown. Bug?\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1157,8 +1155,7 @@ static int _rtl8723e_set_media_status(struct ieee80211_hw *hw,
|
||||
"Set Network type to AP!\n");
|
||||
break;
|
||||
default:
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Network type %d not support!\n", type);
|
||||
pr_err("Network type %d not support!\n", type);
|
||||
return 1;
|
||||
break;
|
||||
}
|
||||
@ -1256,7 +1253,7 @@ void rtl8723e_set_qos(struct ieee80211_hw *hw, int aci)
|
||||
rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222);
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(false, "invalid aci: %d !\n", aci);
|
||||
WARN_ONCE(true, "rtl8723ae: invalid aci: %d !\n", aci);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1852,7 +1849,7 @@ void rtl8723e_read_eeprom_info(struct ieee80211_hw *hw)
|
||||
} else {
|
||||
rtlefuse->autoload_failflag = true;
|
||||
_rtl8723e_read_adapter_info(hw, false);
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
|
||||
pr_err("Autoload ERR!!\n");
|
||||
}
|
||||
_rtl8723e_hal_customized_behavior(hw);
|
||||
}
|
||||
@ -2245,9 +2242,7 @@ void rtl8723e_set_key(struct ieee80211_hw *hw, u32 key_index,
|
||||
entry_id =
|
||||
rtl_cam_get_free_entry(hw, p_macaddr);
|
||||
if (entry_id >= TOTAL_CAM_ENTRY) {
|
||||
RT_TRACE(rtlpriv, COMP_SEC,
|
||||
DBG_EMERG,
|
||||
"Can not find free hw security cam entry\n");
|
||||
pr_err("Can not find free hw security cam entry\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user