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ARC: [plat-eznps] Use dedicated identity auxiliary register.
With generic "identity" num of CPUs is limited to 256 (8 bit). We use our alternative AUX register GLOBAL_ID (12 bit). Now we can support up to 4096 CPUs. Signed-off-by: Noam Camus <noamc@ezchip.com>
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@ -36,6 +36,10 @@
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#include <asm/irqflags-compact.h>
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#include <asm/thread_info.h> /* For THREAD_SIZE */
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#ifdef CONFIG_ARC_PLAT_EZNPS
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#include <plat/ctop.h>
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#endif
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/*--------------------------------------------------------------
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* Switch to Kernel Mode stack if SP points to User Mode stack
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*
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@ -296,11 +300,13 @@
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bic \reg, sp, (THREAD_SIZE - 1)
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.endm
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#ifndef CONFIG_ARC_PLAT_EZNPS
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/* Get CPU-ID of this core */
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.macro GET_CPU_ID reg
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lr \reg, [identity]
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lsr \reg, \reg, 8
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bmsk \reg, \reg, 7
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.endm
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#endif
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#endif /* __ASM_ARC_ENTRY_COMPACT_H */
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@ -16,6 +16,9 @@
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#include <asm/asm-offsets.h>
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#include <linux/sched.h>
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#ifdef CONFIG_ARC_PLAT_EZNPS
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#include <plat/ctop.h>
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#endif
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#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4)
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@ -66,10 +69,17 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task)
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*/
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#ifndef CONFIG_SMP
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"st %2, [@_current_task] \n\t"
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#else
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#ifdef CONFIG_ARC_PLAT_EZNPS
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"lr r24, [%4] \n\t"
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#ifndef CONFIG_EZNPS_MTM_EXT
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"lsr r24, r24, 4 \n\t"
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#endif
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#else
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"lr r24, [identity] \n\t"
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"lsr r24, r24, 8 \n\t"
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"bmsk r24, r24, 7 \n\t"
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#endif
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"add2 r24, @_current_task, r24 \n\t"
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"st %2, [r24] \n\t"
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#endif
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@ -107,6 +117,9 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task)
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: "=r"(tmp)
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: "n"(KSP_WORD_OFF), "r"(next), "r"(prev)
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#ifdef CONFIG_ARC_PLAT_EZNPS
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, "i"(CTOP_AUX_LOGIC_GLOBAL_ID)
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#endif
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: "blink"
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);
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@ -195,6 +195,15 @@ struct nps_host_reg_aux_lpc {
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#define REG_GIM_P_INT_DST_25 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x149)
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#define REG_GIM_P_INT_DST_26 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x14A)
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#else
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.macro GET_CPU_ID reg
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lr \reg, [CTOP_AUX_LOGIC_GLOBAL_ID]
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#ifndef CONFIG_EZNPS_MTM_EXT
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lsr \reg, \reg, 4
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#endif
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* _PLAT_EZNPS_CTOP_H */
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