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x86, cacheinfo: Add cache index disable sysfs attrs only to L3 caches
The cache_disable_[01] attribute in /sys/devices/system/cpu/cpu?/cache/index[0-3]/ is enabled on all cache levels although only L3 supports it. Add it only to the cache level that actually supports it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <1264172467-25155-5-git-send-email-bp@amd64.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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@ -814,16 +814,24 @@ static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
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static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
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show_cache_disable_1, store_cache_disable_1);
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#define DEFAULT_SYSFS_CACHE_ATTRS \
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&type.attr, \
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&level.attr, \
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&coherency_line_size.attr, \
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&physical_line_partition.attr, \
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&ways_of_associativity.attr, \
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&number_of_sets.attr, \
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&size.attr, \
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&shared_cpu_map.attr, \
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&shared_cpu_list.attr
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static struct attribute *default_attrs[] = {
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&type.attr,
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&level.attr,
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&coherency_line_size.attr,
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&physical_line_partition.attr,
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&ways_of_associativity.attr,
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&number_of_sets.attr,
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&size.attr,
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&shared_cpu_map.attr,
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&shared_cpu_list.attr,
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DEFAULT_SYSFS_CACHE_ATTRS,
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NULL
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};
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static struct attribute *default_l3_attrs[] = {
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DEFAULT_SYSFS_CACHE_ATTRS,
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&cache_disable_0.attr,
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&cache_disable_1.attr,
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NULL
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@ -916,6 +924,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
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unsigned int cpu = sys_dev->id;
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unsigned long i, j;
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struct _index_kobject *this_object;
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struct _cpuid4_info *this_leaf;
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int retval;
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retval = cpuid4_cache_sysfs_init(cpu);
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@ -934,6 +943,14 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
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this_object = INDEX_KOBJECT_PTR(cpu, i);
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this_object->cpu = cpu;
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this_object->index = i;
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this_leaf = CPUID4_INFO_IDX(cpu, i);
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if (this_leaf->can_disable)
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ktype_cache.default_attrs = default_l3_attrs;
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else
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ktype_cache.default_attrs = default_attrs;
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retval = kobject_init_and_add(&(this_object->kobj),
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&ktype_cache,
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per_cpu(ici_cache_kobject, cpu),
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