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PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc()
Export dw_pcie_readl_rc() and dw_pcie_writel_rc(). Many other drivers can use these instead of implementing their own versions. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -141,7 +141,7 @@ int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val)
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return PCIBIOS_SUCCESSFUL;
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}
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static inline u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg)
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u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg)
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{
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if (pp->ops->readl_rc)
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return pp->ops->readl_rc(pp, reg);
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@ -149,7 +149,7 @@ static inline u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg)
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return readl(pp->dbi_base + reg);
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}
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static inline void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val)
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void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val)
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{
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if (pp->ops->writel_rc)
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pp->ops->writel_rc(pp, reg, val);
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@ -72,6 +72,8 @@ struct pcie_host_ops {
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int (*msi_host_init)(struct pcie_port *pp, struct msi_controller *chip);
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};
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u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg);
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void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val);
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int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val);
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int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val);
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irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);
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