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ARM: at91/dt: introduce atmel,<chip>-dbgu

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The DBGU is not a simple UART and we need to be able to distinguish it from the
other UARTs, in particular to get its address and check the chip id.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Alexandre Belloni 2015-03-12 15:54:26 +01:00 committed by Nicolas Ferre
parent b7e9def923
commit 8c07f664a6
11 changed files with 12 additions and 11 deletions
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3
Documentation/devicetree/bindings/serial/atmel-usart.txt
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@ -1,9 +1,10 @@
* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
Required properties:
- compatible: Should be "atmel,<chip>-usart"
- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
The compatible <chip> indicated will be the first SoC to support an
additional mode or an USART new feature.
For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.

2
arch/arm/boot/dts/at91rm9200.dtsi
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@ -830,7 +830,7 @@
};
dbgu: serial@fffff200 {
compatible = "atmel,at91rm9200-usart";
compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9260.dtsi
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@ -753,7 +753,7 @@
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9261.dtsi
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@ -276,7 +276,7 @@
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9263.dtsi
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@ -762,7 +762,7 @@
};
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9g45.dtsi
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@ -893,7 +893,7 @@
};
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9n12.dtsi
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@ -757,7 +757,7 @@
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9rl.dtsi
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@ -377,7 +377,7 @@
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/at91sam9x5.dtsi
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@ -860,7 +860,7 @@
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";

2
arch/arm/boot/dts/sama5d3.dtsi
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@ -439,7 +439,7 @@
};
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,

2
arch/arm/boot/dts/sama5d4.dtsi
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@ -1064,7 +1064,7 @@
};
dbgu: serial@fc069000 {
compatible = "atmel,at91sam9260-usart";
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfc069000 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";