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x86_64: make dump_error_regs a chip op
Provide seperate versions for Calgary and CalIOC2 Also print out the PCIe Root Complex Status on CalIOC2 errors Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -83,6 +83,7 @@ int use_calgary __read_mostly = 0;
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#define PHB_SAVIOR_L2 0x0DB0
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#define PHB_PAGE_MIG_CTRL 0x0DA8
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#define PHB_PAGE_MIG_DEBUG 0x0DA0
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#define PHB_ROOT_COMPLEX_STATUS 0x0CB0
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/* PHB_CONFIG_RW */
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#define PHB_TCE_ENABLE 0x20000000
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@ -165,17 +166,21 @@ struct calgary_bus_info {
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static void calgary_handle_quirks(struct iommu_table *tbl, struct pci_dev *dev);
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static void calgary_tce_cache_blast(struct iommu_table *tbl);
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static void calgary_dump_error_regs(struct iommu_table *tbl);
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static void calioc2_handle_quirks(struct iommu_table *tbl, struct pci_dev *dev);
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static void calioc2_tce_cache_blast(struct iommu_table *tbl);
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static void calioc2_dump_error_regs(struct iommu_table *tbl);
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static struct cal_chipset_ops calgary_chip_ops = {
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.handle_quirks = calgary_handle_quirks,
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.tce_cache_blast = calgary_tce_cache_blast
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.tce_cache_blast = calgary_tce_cache_blast,
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.dump_error_regs = calgary_dump_error_regs
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};
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static struct cal_chipset_ops calioc2_chip_ops = {
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.handle_quirks = calioc2_handle_quirks,
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.tce_cache_blast = calioc2_tce_cache_blast
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.tce_cache_blast = calioc2_tce_cache_blast,
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.dump_error_regs = calioc2_dump_error_regs
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};
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static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, };
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@ -895,7 +900,21 @@ static void __init calgary_free_bus(struct pci_dev *dev)
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static void calgary_dump_error_regs(struct iommu_table *tbl)
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{
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void __iomem *bbar = tbl->bbar;
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u32 csr, csmr, plssr, mck;
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u32 val32;
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void __iomem *target;
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target = calgary_reg(bbar, phb_offset(tbl->it_busno) | PHB_CSR_OFFSET);
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val32 = be32_to_cpu(readl(target));
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/* If no error, the agent ID in the CSR is not valid */
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printk(KERN_EMERG "Calgary: DMA error on Calgary PHB 0x%x, "
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"CSR = 0x%08x\n", tbl->it_busno, val32);
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}
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static void calioc2_dump_error_regs(struct iommu_table *tbl)
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{
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void __iomem *bbar = tbl->bbar;
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u32 csr, csmr, plssr, mck, rcstat;
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void __iomem *target;
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unsigned long phboff = phb_offset(tbl->it_busno);
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unsigned long erroff;
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@ -915,8 +934,11 @@ static void calgary_dump_error_regs(struct iommu_table *tbl)
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target = calgary_reg(bbar, phboff | 0x800);
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mck = be32_to_cpu(readl(target));
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printk(KERN_EMERG "Calgary: 0x%08x@CSR 0x%08x@PLSSR 0x%08x@CSMR "
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"0x%08x@MCK\n", csr, plssr, csmr, mck);
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printk(KERN_EMERG "Calgary: DMA error on CalIOC2 PHB 0x%x\n",
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tbl->it_busno);
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printk(KERN_EMERG "Calgary: 0x%08x@CSR 0x%08x@PLSSR 0x%08x@CSMR 0x%08x@MCK\n",
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csr, plssr, csmr, mck);
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/* dump rest of error regs */
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printk(KERN_EMERG "Calgary: ");
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@ -927,6 +949,12 @@ static void calgary_dump_error_regs(struct iommu_table *tbl)
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printk("0x%08x@0x%lx ", errregs[i], erroff);
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}
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printk("\n");
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/* root complex status */
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target = calgary_reg(bbar, phboff | PHB_ROOT_COMPLEX_STATUS);
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rcstat = be32_to_cpu(readl(target));
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printk(KERN_EMERG "Calgary: 0x%08x@0x%x\n", rcstat,
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PHB_ROOT_COMPLEX_STATUS);
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}
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static void calgary_watchdog(unsigned long data)
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@ -942,9 +970,7 @@ static void calgary_watchdog(unsigned long data)
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/* If no error, the agent ID in the CSR is not valid */
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if (val32 & CSR_AGENT_MASK) {
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printk(KERN_EMERG "Calgary: DMA error on PHB %#x\n",
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dev->bus->number);
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calgary_dump_error_regs(tbl);
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tbl->chip_ops->dump_error_regs(tbl);
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/* reset error */
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writel(0, target);
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@ -46,6 +46,7 @@ struct iommu_table {
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struct cal_chipset_ops {
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void (*handle_quirks)(struct iommu_table *tbl, struct pci_dev *dev);
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void (*tce_cache_blast)(struct iommu_table *tbl);
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void (*dump_error_regs)(struct iommu_table *tbl);
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};
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#define TCE_TABLE_SIZE_UNSPECIFIED ~0
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