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ath9k: Merge structures ath_atx, ath_node_aggr with ath_node
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Sujith
John W. Linville
parent
f6688cd8af
commit
8ee5afbc9d
@ -290,18 +290,9 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
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/* RX / TX */
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/***********/
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#define ATH_MAX_ANTENNA 3
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#define ATH_RXBUF 512
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#define WME_NUM_TID 16
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int ath_startrecv(struct ath_softc *sc);
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bool ath_stoprecv(struct ath_softc *sc);
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void ath_flushrecv(struct ath_softc *sc);
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u32 ath_calcrxfilter(struct ath_softc *sc);
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int ath_rx_init(struct ath_softc *sc, int nbufs);
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void ath_rx_cleanup(struct ath_softc *sc);
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int ath_rx_tasklet(struct ath_softc *sc, int flush);
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#define ATH_MAX_ANTENNA 3
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#define ATH_RXBUF 512
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#define WME_NUM_TID 16
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#define ATH_TXBUF 512
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#define ATH_TXMAXTRY 13
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#define ATH_11N_TXMAXTRY 10
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@ -309,19 +300,61 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush);
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#define WME_BA_BMP_SIZE 64
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#define WME_MAX_BA WME_BA_BMP_SIZE
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#define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
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#define TID_TO_WME_AC(_tid) \
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((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
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(((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
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(((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
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WME_AC_VO)
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#define WME_AC_BE 0
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#define WME_AC_BK 1
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#define WME_AC_VI 2
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#define WME_AC_VO 3
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#define WME_NUM_AC 4
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#define ADDBA_EXCHANGE_ATTEMPTS 10
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#define ATH_AGGR_DELIM_SZ 4
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#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
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/* number of delimiters for encryption padding */
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#define ATH_AGGR_ENCRYPTDELIM 10
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/* minimum h/w qdepth to be sustained to maximize aggregation */
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#define ATH_AGGR_MIN_QDEPTH 2
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#define ATH_AMPDU_SUBFRAME_DEFAULT 32
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#define IEEE80211_SEQ_SEQ_SHIFT 4
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#define IEEE80211_SEQ_MAX 4096
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#define IEEE80211_MIN_AMPDU_BUF 0x8
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#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
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/* return whether a bit at index _n in bitmap _bm is set
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* _sz is the size of the bitmap */
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#define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
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((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
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/* return block-ack bitmap index given sequence and starting sequence */
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#define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
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/* returns delimiter padding required given the packet length */
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#define ATH_AGGR_GET_NDELIM(_len) \
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(((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \
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(ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
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#define BAW_WITHIN(_start, _bawsz, _seqno) \
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((((_seqno) - (_start)) & 4095) < (_bawsz))
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#define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum)
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#define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low)
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#define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
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#define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
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enum ATH_AGGR_STATUS {
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ATH_AGGR_DONE,
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ATH_AGGR_BAW_CLOSED,
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ATH_AGGR_LIMITED,
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ATH_AGGR_SHORTPKT,
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ATH_AGGR_8K_LIMITED,
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};
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struct ath_txq {
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u32 axq_qnum; /* hardware q number */
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u32 *axq_link; /* link ptr in last TX desc */
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@ -331,7 +364,6 @@ struct ath_txq {
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u32 axq_depth; /* queue depth */
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u8 axq_aggr_depth; /* aggregates queued */
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u32 axq_totalqueued; /* total ever queued */
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bool stopped; /* Is mac80211 queue stopped ? */
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struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/
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@ -377,12 +409,6 @@ struct ath_atx_ac {
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struct list_head tid_q; /* queue of TIDs with buffers */
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};
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/* per dest tx state */
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struct ath_atx {
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struct ath_atx_tid tid[WME_NUM_TID];
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struct ath_atx_ac ac[WME_NUM_AC];
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};
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/* per-frame tx control block */
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struct ath_tx_control {
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struct ath_txq *txq;
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@ -408,13 +434,32 @@ struct ath_tx_stat {
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int rateKbps;
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int ratecode;
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int flags;
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/* if any of ctl,extn chain rssis are valid */
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#define ATH_TX_CHAIN_RSSI_VALID 0x01
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/* if extn chain rssis are valid */
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#define ATH_TX_RSSI_EXTN_VALID 0x02
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u32 airtime; /* time on air per final tx rate */
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};
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struct aggr_rifs_param {
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int param_max_frames;
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int param_max_len;
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int param_rl;
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int param_al;
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struct ath_rc_series *param_rcs;
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};
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struct ath_node {
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struct ath_softc *an_sc;
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struct ath_atx_tid tid[WME_NUM_TID];
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struct ath_atx_ac ac[WME_NUM_AC];
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u16 maxampdu;
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u8 mpdudensity;
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};
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int ath_startrecv(struct ath_softc *sc);
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bool ath_stoprecv(struct ath_softc *sc);
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void ath_flushrecv(struct ath_softc *sc);
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u32 ath_calcrxfilter(struct ath_softc *sc);
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int ath_rx_init(struct ath_softc *sc, int nbufs);
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void ath_rx_cleanup(struct ath_softc *sc);
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int ath_rx_tasklet(struct ath_softc *sc, int flush);
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struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
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void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
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int ath_tx_setup(struct ath_softc *sc, int haltype);
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@ -437,73 +482,6 @@ void ath_tx_tasklet(struct ath_softc *sc);
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u32 ath_txq_depth(struct ath_softc *sc, int qnum);
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u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum);
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void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb);
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/**********************/
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/* Node / Aggregation */
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/**********************/
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#define ADDBA_EXCHANGE_ATTEMPTS 10
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#define ATH_AGGR_DELIM_SZ 4
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#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
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/* number of delimiters for encryption padding */
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#define ATH_AGGR_ENCRYPTDELIM 10
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/* minimum h/w qdepth to be sustained to maximize aggregation */
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#define ATH_AGGR_MIN_QDEPTH 2
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#define ATH_AMPDU_SUBFRAME_DEFAULT 32
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#define IEEE80211_SEQ_SEQ_SHIFT 4
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#define IEEE80211_SEQ_MAX 4096
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#define IEEE80211_MIN_AMPDU_BUF 0x8
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#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
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/* return whether a bit at index _n in bitmap _bm is set
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* _sz is the size of the bitmap */
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#define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
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((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
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/* return block-ack bitmap index given sequence and starting sequence */
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#define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
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/* returns delimiter padding required given the packet length */
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#define ATH_AGGR_GET_NDELIM(_len) \
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(((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \
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(ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
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#define BAW_WITHIN(_start, _bawsz, _seqno) \
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((((_seqno) - (_start)) & 4095) < (_bawsz))
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#define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum)
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#define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low)
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#define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
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#define ATH_AN_2_TID(_an, _tidno) (&(_an)->an_aggr.tx.tid[(_tidno)])
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enum ATH_AGGR_STATUS {
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ATH_AGGR_DONE,
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ATH_AGGR_BAW_CLOSED,
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ATH_AGGR_LIMITED,
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ATH_AGGR_SHORTPKT,
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ATH_AGGR_8K_LIMITED,
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};
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struct aggr_rifs_param {
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int param_max_frames;
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int param_max_len;
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int param_rl;
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int param_al;
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struct ath_rc_series *param_rcs;
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};
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/* Per-node aggregation state */
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struct ath_node_aggr {
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struct ath_atx tx;
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};
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struct ath_node {
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struct ath_softc *an_sc;
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struct ath_node_aggr an_aggr;
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u16 maxampdu;
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u8 mpdudensity;
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};
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void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid);
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bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
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void ath_tx_aggr_teardown(struct ath_softc *sc, struct ath_node *an, u8 tidno);
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@ -2405,7 +2405,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
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/*
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* Init per tid tx state
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*/
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for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno];
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for (tidno = 0, tid = &an->tid[tidno];
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tidno < WME_NUM_TID;
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tidno++, tid++) {
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tid->an = an;
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@ -2419,7 +2419,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
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INIT_LIST_HEAD(&tid->buf_q);
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acno = TID_TO_WME_AC(tidno);
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tid->ac = &an->an_aggr.tx.ac[acno];
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tid->ac = &an->ac[acno];
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/* ADDBA state */
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tid->state &= ~AGGR_ADDBA_COMPLETE;
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@ -2430,7 +2430,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
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/*
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* Init per ac tx state
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*/
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for (acno = 0, ac = &an->an_aggr.tx.ac[acno];
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for (acno = 0, ac = &an->ac[acno];
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acno < WME_NUM_AC; acno++, ac++) {
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ac->sched = false;
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INIT_LIST_HEAD(&ac->tid_q);
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