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RDMA/cxgb3: sgl/pbl offset calculation needs 64 bits
The variable 'offset' in iwch_sgl2pbl_map() needs to be a u64. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -195,15 +195,12 @@ static int build_inv_stag(union t3_wr *wqe, struct ib_send_wr *wr,
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return 0;
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}
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/*
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* TBD: this is going to be moved to firmware. Missing pdid/qpid check for now.
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*/
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static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list,
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u32 num_sgle, u32 * pbl_addr, u8 * page_size)
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{
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int i;
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struct iwch_mr *mhp;
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u32 offset;
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u64 offset;
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for (i = 0; i < num_sgle; i++) {
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mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8);
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@ -235,8 +232,8 @@ static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list,
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return -EINVAL;
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}
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offset = sg_list[i].addr - mhp->attr.va_fbo;
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offset += ((u32) mhp->attr.va_fbo) %
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(1UL << (12 + mhp->attr.page_size));
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offset += mhp->attr.va_fbo &
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((1UL << (12 + mhp->attr.page_size)) - 1);
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pbl_addr[i] = ((mhp->attr.pbl_addr -
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rhp->rdev.rnic_info.pbl_base) >> 3) +
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(offset >> (12 + mhp->attr.page_size));
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