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mfd: Fix max8925 irq control bit incorrect setting

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In max8925_irq_sync_unlock(), irq control bit is set at the same time.
Zero means enabling irq, and one means disabling irq.

The original code is:
	irq_chg[0] &= irq_data->enable;

It should be changed to:
	irq_chg[0] &= ~irq_data->enable;

Otherwise, irq control bit is mess.

Signed-off-by: Kevin Liu <kliu5@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Kevin Liu 2010-09-08 09:44:36 -04:00 committed by Samuel Ortiz
parent c9d66d3515
commit 90182317a9
1 changed files with 7 additions and 6 deletions
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13
drivers/mfd/max8925-core.c
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@ -429,24 +429,25 @@ static void max8925_irq_sync_unlock(unsigned int irq)
irq_tsc = cache_tsc;
for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
irq_data = &max8925_irqs[i];
/* 1 -- disable, 0 -- enable */
switch (irq_data->mask_reg) {
case MAX8925_CHG_IRQ1_MASK:
irq_chg[0] &= irq_data->enable;
irq_chg[0] &= ~irq_data->enable;
break;
case MAX8925_CHG_IRQ2_MASK:
irq_chg[1] &= irq_data->enable;
irq_chg[1] &= ~irq_data->enable;
break;
case MAX8925_ON_OFF_IRQ1_MASK:
irq_on[0] &= irq_data->enable;
irq_on[0] &= ~irq_data->enable;
break;
case MAX8925_ON_OFF_IRQ2_MASK:
irq_on[1] &= irq_data->enable;
irq_on[1] &= ~irq_data->enable;
break;
case MAX8925_RTC_IRQ_MASK:
irq_rtc &= irq_data->enable;
irq_rtc &= ~irq_data->enable;
break;
case MAX8925_TSC_IRQ_MASK:
irq_tsc &= irq_data->enable;
irq_tsc &= ~irq_data->enable;
break;
default:
dev_err(chip->dev, "wrong IRQ\n");