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usb: PS3 EHCI HC reset work-around

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PS3 EHCI HC errata fix 316 - The PS3 EHCI HC will reset its
internal INSNREGXX setup regs back to the chip default values
on Host Controller Reset (CMD_RESET) or Light Host Controller
Reset (CMD_LRESET).  The work-around for this is for the HC
driver to re-initialise these regs when ever the HC is reset.

Adds a new helper routine ps3_ehci_setup_insnreg() which is
called from ps3_ehci_hc_reset().

Signed-off-by: Geoff Levand <geoff@infradead.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
This commit is contained in:
Geoff Levand 2011-11-22 18:33:45 -08:00
parent 876e0df902
commit 9187bef2fa
1 changed files with 30 additions and 0 deletions
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30
drivers/usb/host/ehci-ps3.c
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@ -21,6 +21,34 @@
#include <asm/firmware.h> #include <asm/firmware.h>
#include <asm/ps3.h> #include <asm/ps3.h>
static void ps3_ehci_setup_insnreg(struct ehci_hcd *ehci)
{
/* PS3 HC internal setup register offsets. */
enum ps3_ehci_hc_insnreg {
ps3_ehci_hc_insnreg01 = 0x084,
ps3_ehci_hc_insnreg02 = 0x088,
ps3_ehci_hc_insnreg03 = 0x08c,
};
/* PS3 EHCI HC errata fix 316 - The PS3 EHCI HC will reset its
* internal INSNREGXX setup regs back to the chip default values
* on Host Controller Reset (CMD_RESET) or Light Host Controller
* Reset (CMD_LRESET). The work-around for this is for the HC
* driver to re-initialise these regs when ever the HC is reset.
*/
/* Set burst transfer counts to 256 out, 32 in. */
writel_be(0x01000020, (void __iomem *)ehci->regs +
ps3_ehci_hc_insnreg01);
/* Enable burst transfer counts. */
writel_be(0x00000001, (void __iomem *)ehci->regs +
ps3_ehci_hc_insnreg03);
}
static int ps3_ehci_hc_reset(struct usb_hcd *hcd) static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
{ {
int result; int result;
@ -49,6 +77,8 @@ static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
ehci_reset(ehci); ehci_reset(ehci);
ps3_ehci_setup_insnreg(ehci);
return result; return result;
} }