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ASoC: Refresh WM8974 PLL configuration
Move away from a fixed table to runtime calculation. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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33d81af4d1
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@ -325,51 +325,84 @@ static int wm8974_add_widgets(struct snd_soc_codec *codec)
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}
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struct pll_ {
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unsigned int in_hz, out_hz;
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unsigned int pre:4; /* prescale - 1 */
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unsigned int pre_div:4; /* prescale - 1 */
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unsigned int n:4;
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unsigned int k;
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};
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static struct pll_ pll[] = {
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{ 12000000, 11289600, 0, 7, 0x86c220 },
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{ 12000000, 12288000, 0, 8, 0x3126e8 },
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{ 13000000, 11289600, 0, 6, 0xf28bd4 },
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{ 13000000, 12288000, 0, 7, 0x8fd525 },
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{ 12288000, 11289600, 0, 7, 0x59999a },
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{ 11289600, 12288000, 0, 8, 0x80dee9 },
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{ 25000000, 11289600, 1, 7, 0x39B024 },
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{ 25000000, 24576000, 1, 7, 0xdd4413 }
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};
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static struct pll_ pll_div;
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/* The size in bits of the pll divide multiplied by 10
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* to allow rounding later */
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#define FIXED_PLL_SIZE ((1 << 24) * 10)
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static void pll_factors(unsigned int target, unsigned int source)
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{
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unsigned long long Kpart;
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unsigned int K, Ndiv, Nmod;
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Ndiv = target / source;
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if (Ndiv < 6) {
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source >>= 1;
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pll_div.pre_div = 1;
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Ndiv = target / source;
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} else
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pll_div.pre_div = 0;
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if ((Ndiv < 6) || (Ndiv > 12))
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printk(KERN_WARNING
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"WM8974 N value %u outwith recommended range!d\n",
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Ndiv);
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pll_div.n = Ndiv;
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Nmod = target % source;
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Kpart = FIXED_PLL_SIZE * (long long)Nmod;
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do_div(Kpart, source);
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K = Kpart & 0xFFFFFFFF;
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/* Check if we need to round */
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if ((K % 10) >= 5)
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K += 5;
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/* Move down to proper range now rounding is done */
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K /= 10;
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pll_div.k = K;
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}
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static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai,
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int pll_id, unsigned int freq_in, unsigned int freq_out)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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int i;
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u16 reg;
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if (freq_in == 0 || freq_out == 0) {
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/* Clock CODEC directly from MCLK */
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reg = wm8974_read_reg_cache(codec, WM8974_CLOCK);
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wm8974_write(codec, WM8974_CLOCK, reg & 0x0ff);
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/* Turn off PLL */
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reg = wm8974_read_reg_cache(codec, WM8974_POWER1);
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wm8974_write(codec, WM8974_POWER1, reg & 0x1df);
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return 0;
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}
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for (i = 0; i < ARRAY_SIZE(pll); i++) {
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if (freq_in == pll[i].in_hz && freq_out == pll[i].out_hz) {
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wm8974_write(codec, WM8974_PLLN,
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(pll[i].pre << 4) | pll[i].n);
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wm8974_write(codec, WM8974_PLLK1, pll[i].k >> 18);
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wm8974_write(codec, WM8974_PLLK2,
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(pll[i].k >> 9) & 0x1ff);
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wm8974_write(codec, WM8974_PLLK3, pll[i].k & 0x1ff);
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reg = wm8974_read_reg_cache(codec, WM8974_POWER1);
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wm8974_write(codec, WM8974_POWER1, reg | 0x020);
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return 0;
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}
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}
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pll_factors(freq_out*4, freq_in);
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return -EINVAL;
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wm8974_write(codec, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
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wm8974_write(codec, WM8974_PLLK1, pll_div.k >> 18);
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wm8974_write(codec, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
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wm8974_write(codec, WM8974_PLLK3, pll_div.k & 0x1ff);
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reg = wm8974_read_reg_cache(codec, WM8974_POWER1);
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wm8974_write(codec, WM8974_POWER1, reg | 0x020);
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/* Run CODEC from PLL instead of MCLK */
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reg = wm8974_read_reg_cache(codec, WM8974_CLOCK);
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wm8974_write(codec, WM8974_CLOCK, reg | 0x100);
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return 0;
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}
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/*
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