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mmc: mmc: Add Command Queue definitions
Add definitions relating to Command Queuing. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -618,6 +618,24 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
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(ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) &&
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!(ext_csd[EXT_CSD_FW_CONFIG] & 0x1);
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}
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/* eMMC v5.1 or later */
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if (card->ext_csd.rev >= 8) {
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card->ext_csd.cmdq_support = ext_csd[EXT_CSD_CMDQ_SUPPORT] &
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EXT_CSD_CMDQ_SUPPORTED;
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card->ext_csd.cmdq_depth = (ext_csd[EXT_CSD_CMDQ_DEPTH] &
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EXT_CSD_CMDQ_DEPTH_MASK) + 1;
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/* Exclude inefficiently small queue depths */
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if (card->ext_csd.cmdq_depth <= 2) {
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card->ext_csd.cmdq_support = false;
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card->ext_csd.cmdq_depth = 0;
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}
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if (card->ext_csd.cmdq_support) {
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pr_debug("%s: Command Queue supported depth %u\n",
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mmc_hostname(card->host),
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card->ext_csd.cmdq_depth);
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}
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}
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out:
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return err;
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}
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@ -89,6 +89,8 @@ struct mmc_ext_csd {
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unsigned int boot_ro_lock; /* ro lock support */
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bool boot_ro_lockable;
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bool ffu_capable; /* Firmware upgrade support */
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bool cmdq_support; /* Command Queue supported */
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unsigned int cmdq_depth; /* Command Queue depth */
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#define MMC_FIRMWARE_LEN 8
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u8 fwrev[MMC_FIRMWARE_LEN]; /* FW version */
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u8 raw_exception_status; /* 54 */
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@ -84,6 +84,13 @@
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#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
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#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
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/* class 11 */
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#define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */
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#define MMC_QUE_TASK_ADDR 45 /* ac [31:0] data addr R1 */
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#define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */
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#define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */
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#define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */
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static inline bool mmc_op_multi(u32 opcode)
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{
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return opcode == MMC_WRITE_MULTIPLE_BLOCK ||
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@ -272,6 +279,7 @@ struct _mmc_csd {
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* EXT_CSD fields
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*/
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#define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */
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#define EXT_CSD_FLUSH_CACHE 32 /* W */
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#define EXT_CSD_CACHE_CTRL 33 /* R/W */
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#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
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@ -331,6 +339,8 @@ struct _mmc_csd {
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#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
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#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
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#define EXT_CSD_FIRMWARE_VERSION 254 /* RO, 8 bytes */
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#define EXT_CSD_CMDQ_DEPTH 307 /* RO */
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#define EXT_CSD_CMDQ_SUPPORT 308 /* RO */
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#define EXT_CSD_SUPPORTED_MODE 493 /* RO */
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#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
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#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
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@ -437,6 +447,13 @@ struct _mmc_csd {
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*/
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#define EXT_CSD_MANUAL_BKOPS_MASK 0x01
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/*
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* Command Queue
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*/
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#define EXT_CSD_CMDQ_MODE_ENABLED BIT(0)
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#define EXT_CSD_CMDQ_DEPTH_MASK GENMASK(4, 0)
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#define EXT_CSD_CMDQ_SUPPORTED BIT(0)
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/*
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* MMC_SWITCH access modes
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*/
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