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msm: timer: SMP timer support for msm
The msm provides timer hardware that is private to each core. Each timer has separate counter and match registers, so we create separate clock_event_devices for each core. For the global clocksource, use cpu 0's counter. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
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7b181446c6
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@ -60,7 +60,11 @@
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#define MSM_TMR_BASE IOMEM(0xF0200000)
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#define MSM_TMR_PHYS 0x02000000
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#define MSM_TMR_SIZE (SZ_1M)
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#define MSM_TMR_SIZE SZ_4K
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#define MSM_TMR0_BASE IOMEM(0xF0201000)
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#define MSM_TMR0_PHYS 0x02040000
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#define MSM_TMR0_SIZE SZ_4K
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#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
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#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
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@ -105,6 +105,7 @@ static struct map_desc msm8x60_io_desc[] __initdata = {
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MSM_DEVICE(QGIC_DIST),
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MSM_DEVICE(QGIC_CPU),
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MSM_DEVICE(TMR),
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MSM_DEVICE(TMR0),
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MSM_DEVICE(ACC),
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MSM_DEVICE(GCC),
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};
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@ -47,6 +47,19 @@ enum {
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#define GPT_HZ 32768
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enum timer_location {
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LOCAL_TIMER = 0,
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GLOBAL_TIMER = 1,
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};
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#ifdef MSM_TMR0_BASE
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#define MSM_TMR_GLOBAL (MSM_TMR0_BASE - MSM_TMR_BASE)
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#else
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#define MSM_TMR_GLOBAL 0
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#endif
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#define MSM_GLOBAL_TIMER MSM_CLOCK_DGT
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#if defined(CONFIG_ARCH_QSD8X50)
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#define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */
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#define MSM_DGT_SHIFT (0)
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@ -65,49 +78,67 @@ struct msm_clock {
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void __iomem *regbase;
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uint32_t freq;
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uint32_t shift;
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void __iomem *global_counter;
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void __iomem *local_counter;
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};
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enum {
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MSM_CLOCK_GPT,
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MSM_CLOCK_DGT,
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NR_TIMERS,
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};
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static struct msm_clock msm_clocks[];
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static struct clock_event_device *local_clock_event;
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static irqreturn_t msm_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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if (smp_processor_id() != 0)
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evt = local_clock_event;
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if (evt->event_handler == NULL)
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return IRQ_HANDLED;
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static cycle_t msm_gpt_read(struct clocksource *cs)
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static cycle_t msm_read_timer_count(struct clocksource *cs)
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{
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return readl(MSM_GPT_BASE + TIMER_COUNT_VAL);
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struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource);
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return readl(clk->global_counter);
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}
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static cycle_t msm_dgt_read(struct clocksource *cs)
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static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)
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{
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return readl(MSM_DGT_BASE + TIMER_COUNT_VAL) >> MSM_DGT_SHIFT;
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#ifdef CONFIG_SMP
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int i;
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for (i = 0; i < NR_TIMERS; i++)
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if (evt == &(msm_clocks[i].clockevent))
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return &msm_clocks[i];
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return &msm_clocks[MSM_GLOBAL_TIMER];
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#else
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return container_of(evt, struct msm_clock, clockevent);
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#endif
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}
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static int msm_timer_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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{
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struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent);
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uint32_t now = readl(clock->regbase + TIMER_COUNT_VAL);
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struct msm_clock *clock = clockevent_to_clock(evt);
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uint32_t now = readl(clock->local_counter);
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uint32_t alarm = now + (cycles << clock->shift);
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int late;
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writel(alarm, clock->regbase + TIMER_MATCH_VAL);
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now = readl(clock->regbase + TIMER_COUNT_VAL);
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late = now - alarm;
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if (late >= (-2 << clock->shift) && late < DGT_HZ*5) {
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printk(KERN_NOTICE "msm_timer_set_next_event(%lu) clock %s, "
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"alarm already expired, now %x, alarm %x, late %d\n",
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cycles, clock->clockevent.name, now, alarm, late);
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return -ETIME;
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}
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return 0;
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}
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static void msm_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent);
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struct msm_clock *clock = clockevent_to_clock(evt);
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switch (mode) {
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case CLOCK_EVT_MODE_RESUME:
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case CLOCK_EVT_MODE_PERIODIC:
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@ -123,7 +154,7 @@ static void msm_timer_set_mode(enum clock_event_mode mode,
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}
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static struct msm_clock msm_clocks[] = {
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{
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[MSM_CLOCK_GPT] = {
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.clockevent = {
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.name = "gp_timer",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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@ -135,7 +166,7 @@ static struct msm_clock msm_clocks[] = {
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.clocksource = {
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.name = "gp_timer",
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.rating = 200,
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.read = msm_gpt_read,
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.read = msm_read_timer_count,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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},
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@ -147,9 +178,12 @@ static struct msm_clock msm_clocks[] = {
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.irq = INT_GP_TIMER_EXP
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},
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.regbase = MSM_GPT_BASE,
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.freq = GPT_HZ
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.freq = GPT_HZ,
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.local_counter = MSM_GPT_BASE + TIMER_COUNT_VAL,
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.global_counter = MSM_GPT_BASE + TIMER_COUNT_VAL +
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MSM_TMR_GLOBAL,
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},
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{
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[MSM_CLOCK_DGT] = {
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.clockevent = {
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.name = "dg_timer",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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@ -161,7 +195,7 @@ static struct msm_clock msm_clocks[] = {
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.clocksource = {
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.name = "dg_timer",
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.rating = 300,
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.read = msm_dgt_read,
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.read = msm_read_timer_count,
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.mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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},
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@ -174,7 +208,10 @@ static struct msm_clock msm_clocks[] = {
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},
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.regbase = MSM_DGT_BASE,
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.freq = DGT_HZ >> MSM_DGT_SHIFT,
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.shift = MSM_DGT_SHIFT
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.shift = MSM_DGT_SHIFT,
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.local_counter = MSM_DGT_BASE + TIMER_COUNT_VAL,
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.global_counter = MSM_DGT_BASE + TIMER_COUNT_VAL +
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MSM_TMR_GLOBAL,
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}
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};
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@ -183,7 +220,7 @@ static void __init msm_timer_init(void)
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int i;
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int res;
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#ifdef CONFIG_ARCH_MSM8X60
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#ifdef CONFIG_ARCH_MSM_SCORPIONMP
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writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
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#endif
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@ -217,6 +254,48 @@ static void __init msm_timer_init(void)
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}
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}
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#ifdef CONFIG_SMP
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void __cpuinit local_timer_setup(struct clock_event_device *evt)
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{
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struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
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/* Use existing clock_event for cpu 0 */
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if (!smp_processor_id())
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return;
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writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
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if (!local_clock_event) {
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writel(0, clock->regbase + TIMER_ENABLE);
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writel(0, clock->regbase + TIMER_CLEAR);
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writel(~0, clock->regbase + TIMER_MATCH_VAL);
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}
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evt->irq = clock->irq.irq;
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evt->name = "local_timer";
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evt->features = CLOCK_EVT_FEAT_ONESHOT;
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evt->rating = clock->clockevent.rating;
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evt->set_mode = msm_timer_set_mode;
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evt->set_next_event = msm_timer_set_next_event;
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evt->shift = clock->clockevent.shift;
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evt->mult = div_sc(clock->freq, NSEC_PER_SEC, evt->shift);
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evt->max_delta_ns =
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clockevent_delta2ns(0xf0000000 >> clock->shift, evt);
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evt->min_delta_ns = clockevent_delta2ns(4, evt);
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local_clock_event = evt;
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gic_enable_ppi(clock->irq.irq);
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clockevents_register_device(evt);
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}
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inline int local_timer_ack(void)
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{
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return 1;
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}
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#endif
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struct sys_timer msm_timer = {
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.init = msm_timer_init
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};
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