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powerpc/4xx: DTS: Add Add'l SDRAM0 Compatible and Interrupt Info
Added additional information for type and compatibility strings and interrupt information to the SDRAM0 memory-controller device tree nodes for AMCC PowerPC 405EX[r]-based boards to facilitate binding with the new "ibm,sdram-4xx-ddr2" EDAC memory controller adapter driver. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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@ -89,8 +89,11 @@
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clock-frequency = <0>; /* Filled in by U-Boot */
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clock-frequency = <0>; /* Filled in by U-Boot */
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SDRAM0: memory-controller {
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SDRAM0: memory-controller {
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compatible = "ibm,sdram-405exr";
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compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
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dcr-reg = <0x010 0x002>;
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dcr-reg = <0x010 0x002>;
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interrupt-parent = <&UIC2>;
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interrupts = <0x5 0x4 /* ECC DED Error */
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0x6 0x4>; /* ECC SEC Error */
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};
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};
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MAL0: mcmal {
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MAL0: mcmal {
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@ -90,8 +90,11 @@
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clock-frequency = <0>; /* Filled in by U-Boot */
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clock-frequency = <0>; /* Filled in by U-Boot */
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SDRAM0: memory-controller {
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SDRAM0: memory-controller {
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compatible = "ibm,sdram-405ex";
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compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
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dcr-reg = <0x010 0x002>;
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dcr-reg = <0x010 0x002>;
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interrupt-parent = <&UIC2>;
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interrupts = <0x5 0x4 /* ECC DED Error */
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0x6 0x4>; /* ECC SEC Error */
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};
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};
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MAL0: mcmal {
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MAL0: mcmal {
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@ -90,8 +90,11 @@
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clock-frequency = <0>; /* Filled in by U-Boot */
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clock-frequency = <0>; /* Filled in by U-Boot */
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SDRAM0: memory-controller {
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SDRAM0: memory-controller {
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compatible = "ibm,sdram-405ex";
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compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
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dcr-reg = <0x010 0x002>;
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dcr-reg = <0x010 0x002>;
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interrupt-parent = <&UIC2>;
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interrupts = <0x5 0x4 /* ECC DED Error */
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0x6 0x4 /* ECC SEC Error */ >;
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};
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};
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MAL0: mcmal {
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MAL0: mcmal {
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