FEX-Emu/linux
1
0
Fork 0
mirror of https://github.com/FEX-Emu/linux.git synced 2025-02-11 22:37:04 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

ixgbe: fix sparse warning

Browse Source 
warning: symbol 'before' shadows an earlier one

Convert large macros to functions similar to e1000e.

Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Acked-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Emil Tantilov 2011-04-14 07:46:41 +00:00 committed by Jeff Kirsher
parent 2698b20842
commit 95a4601184
1 changed files with 61 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

106
drivers/net/ixgbe/ixgbe_ethtool.c
View File

@ -1236,46 +1236,62 @@ static const struct ixgbe_reg_test reg_test_82598[] = {
{ 0, 0, 0, 0 } { 0, 0, 0, 0 }
}; };
static const u32 register_test_patterns[] = { static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF u32 mask, u32 write)
}; {
u32 pat, val, before;
static const u32 test_pattern[] = {
0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
#define REG_PATTERN_TEST(R, M, W) \ for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
{ \ before = readl(adapter->hw.hw_addr + reg);
u32 pat, val, before; \ writel((test_pattern[pat] & write),
for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) { \ (adapter->hw.hw_addr + reg));
before = readl(adapter->hw.hw_addr + R); \ val = readl(adapter->hw.hw_addr + reg);
writel((register_test_patterns[pat] & W), \ if (val != (test_pattern[pat] & write & mask)) {
(adapter->hw.hw_addr + R)); \ e_err(drv, "pattern test reg %04X failed: got "
val = readl(adapter->hw.hw_addr + R); \ "0x%08X expected 0x%08X\n",
if (val != (register_test_patterns[pat] & W & M)) { \ reg, val, (test_pattern[pat] & write & mask));
e_err(drv, "pattern test reg %04X failed: got " \ *data = reg;
"0x%08X expected 0x%08X\n", \ writel(before, adapter->hw.hw_addr + reg);
R, val, (register_test_patterns[pat] & W & M)); \ return 1;
*data = R; \ }
writel(before, adapter->hw.hw_addr + R); \ writel(before, adapter->hw.hw_addr + reg);
return 1; \ }
} \ return 0;
writel(before, adapter->hw.hw_addr + R); \
} \
} }
#define REG_SET_AND_CHECK(R, M, W) \ static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
{ \ u32 mask, u32 write)
u32 val, before; \ {
before = readl(adapter->hw.hw_addr + R); \ u32 val, before;
writel((W & M), (adapter->hw.hw_addr + R)); \ before = readl(adapter->hw.hw_addr + reg);
val = readl(adapter->hw.hw_addr + R); \ writel((write & mask), (adapter->hw.hw_addr + reg));
if ((W & M) != (val & M)) { \ val = readl(adapter->hw.hw_addr + reg);
e_err(drv, "set/check reg %04X test failed: got 0x%08X " \ if ((write & mask) != (val & mask)) {
"expected 0x%08X\n", R, (val & M), (W & M)); \ e_err(drv, "set/check reg %04X test failed: got 0x%08X "
*data = R; \ "expected 0x%08X\n", reg, (val & mask), (write & mask));
writel(before, (adapter->hw.hw_addr + R)); \ *data = reg;
return 1; \ writel(before, (adapter->hw.hw_addr + reg));
} \ return 1;
writel(before, (adapter->hw.hw_addr + R)); \ }
writel(before, (adapter->hw.hw_addr + reg));
return 0;
} }
#define REG_PATTERN_TEST(reg, mask, write) \
do { \
if (reg_pattern_test(adapter, data, reg, mask, write)) \
return 1; \
} while (0) \
#define REG_SET_AND_CHECK(reg, mask, write) \
do { \
if (reg_set_and_check(adapter, data, reg, mask, write)) \
return 1; \
} while (0) \
static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
{ {
const struct ixgbe_reg_test *test; const struct ixgbe_reg_test *test;
@ -1326,13 +1342,13 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
switch (test->test_type) { switch (test->test_type) {
case PATTERN_TEST: case PATTERN_TEST:
REG_PATTERN_TEST(test->reg + (i * 0x40), REG_PATTERN_TEST(test->reg + (i * 0x40),
test->mask, test->mask,
test->write); test->write);
break; break;
case SET_READ_TEST: case SET_READ_TEST:
REG_SET_AND_CHECK(test->reg + (i * 0x40), REG_SET_AND_CHECK(test->reg + (i * 0x40),
test->mask, test->mask,
test->write); test->write);
break; break;
case WRITE_NO_TEST: case WRITE_NO_TEST:
writel(test->write, writel(test->write,
@ -1341,18 +1357,18 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
break; break;
case TABLE32_TEST: case TABLE32_TEST:
REG_PATTERN_TEST(test->reg + (i * 4), REG_PATTERN_TEST(test->reg + (i * 4),
test->mask, test->mask,
test->write); test->write);
break; break;
case TABLE64_TEST_LO: case TABLE64_TEST_LO:
REG_PATTERN_TEST(test->reg + (i * 8), REG_PATTERN_TEST(test->reg + (i * 8),
test->mask, test->mask,
test->write); test->write);
break; break;
case TABLE64_TEST_HI: case TABLE64_TEST_HI:
REG_PATTERN_TEST((test->reg + 4) + (i * 8), REG_PATTERN_TEST((test->reg + 4) + (i * 8),
test->mask, test->mask,
test->write); test->write);
break; break;
} }
} }