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ARM: tegra: Fix flow controller accesses
flowctrl_write_cpu_csr uses the cpu halt offsets and vice versa. This patch
fixes this bug.
Reported-by: Dan Willemsen <dwillemsen@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[swarren: This problem was introduced in v3.4-rc1, in commit 26fe681
"ARM:
tegra: functions to access the flowcontroller", when this file was first
added]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
parent
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@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)
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void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
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{
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return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
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return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
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}
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void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
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{
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return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
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return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
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}
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