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ath9k: merge reset related functions
reduces unnecessary code duplication. Also takes the sc_pcu_lock within ath_reset instead of callsites, which makes it possible to always cancel all queued work items before the reset, possibly fixing a few race conditions (work items vs reset) along with it. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau
John W. Linville
parent
236de5149b
commit
9adcf440dc
@ -212,6 +212,133 @@ static int ath_update_survey_stats(struct ath_softc *sc)
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return ret;
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}
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static void __ath_cancel_work(struct ath_softc *sc)
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{
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cancel_work_sync(&sc->paprd_work);
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cancel_work_sync(&sc->hw_check_work);
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cancel_delayed_work_sync(&sc->tx_complete_work);
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cancel_delayed_work_sync(&sc->hw_pll_work);
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}
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static void ath_cancel_work(struct ath_softc *sc)
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{
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__ath_cancel_work(sc);
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cancel_work_sync(&sc->hw_reset_work);
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}
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static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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bool ret;
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ieee80211_stop_queues(sc->hw);
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sc->hw_busy_count = 0;
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del_timer_sync(&common->ani.timer);
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ath9k_debug_samp_bb_mac(sc);
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ath9k_hw_disable_interrupts(ah);
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ret = ath_drain_all_txq(sc, retry_tx);
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if (!ath_stoprecv(sc))
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ret = false;
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if (!flush) {
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if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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ath_rx_tasklet(sc, 0, true);
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ath_rx_tasklet(sc, 0, false);
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} else {
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ath_flushrecv(sc);
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}
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return ret;
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}
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static bool ath_complete_reset(struct ath_softc *sc, bool start)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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if (ath_startrecv(sc) != 0) {
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ath_err(common, "Unable to restart recv logic\n");
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return false;
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}
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ath9k_cmn_update_txpow(ah, sc->curtxpow,
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sc->config.txpowlimit, &sc->curtxpow);
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ath9k_hw_set_interrupts(ah, ah->imask);
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ath9k_hw_enable_interrupts(ah);
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if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
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if (sc->sc_flags & SC_OP_BEACONS)
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ath_set_beacon(sc);
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ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
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ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
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if (!common->disable_ani)
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ath_start_ani(common);
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}
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ieee80211_wake_queues(sc->hw);
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return true;
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}
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static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
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bool retry_tx)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_hw_cal_data *caldata = NULL;
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bool fastcc = true;
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bool flush = false;
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int r;
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__ath_cancel_work(sc);
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spin_lock_bh(&sc->sc_pcu_lock);
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if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
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fastcc = false;
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caldata = &sc->caldata;
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}
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if (!hchan) {
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fastcc = false;
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flush = true;
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hchan = ah->curchan;
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}
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if (fastcc && !ath9k_hw_check_alive(ah))
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fastcc = false;
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if (!ath_prepare_reset(sc, retry_tx, flush))
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fastcc = false;
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ath_dbg(common, ATH_DBG_CONFIG,
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"Reset to %u MHz, HT40: %d fastcc: %d\n",
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hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
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CHANNEL_HT40PLUS)),
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fastcc);
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r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
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if (r) {
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ath_err(common,
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"Unable to reset channel, reset status %d\n", r);
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goto out;
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}
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if (!ath_complete_reset(sc, true))
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r = -EIO;
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out:
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spin_unlock_bh(&sc->sc_pcu_lock);
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return r;
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}
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/*
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* Set/change channels. If the channel is really being changed, it's done
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* by reseting the chip. To accomplish this we must first cleanup any pending
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@ -220,98 +347,17 @@ static int ath_update_survey_stats(struct ath_softc *sc)
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static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
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struct ath9k_channel *hchan)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_conf *conf = &common->hw->conf;
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bool fastcc = true, stopped;
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struct ieee80211_channel *channel = hw->conf.channel;
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struct ath9k_hw_cal_data *caldata = NULL;
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int r;
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if (sc->sc_flags & SC_OP_INVALID)
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return -EIO;
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sc->hw_busy_count = 0;
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del_timer_sync(&common->ani.timer);
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cancel_work_sync(&sc->paprd_work);
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cancel_work_sync(&sc->hw_check_work);
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cancel_work_sync(&sc->hw_reset_work);
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cancel_delayed_work_sync(&sc->tx_complete_work);
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cancel_delayed_work_sync(&sc->hw_pll_work);
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ath9k_ps_wakeup(sc);
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spin_lock_bh(&sc->sc_pcu_lock);
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/*
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* This is only performed if the channel settings have
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* actually changed.
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*
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* To switch channels clear any pending DMA operations;
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* wait long enough for the RX fifo to drain, reset the
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* hardware at the new frequency, and then re-enable
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* the relevant bits of the h/w.
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*/
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ath9k_hw_disable_interrupts(ah);
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stopped = ath_drain_all_txq(sc, false);
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if (!ath_stoprecv(sc))
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stopped = false;
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if (!ath9k_hw_check_alive(ah))
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stopped = false;
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/* XXX: do not flush receive queue here. We don't want
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* to flush data frames already in queue because of
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* changing channel. */
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if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
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fastcc = false;
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if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
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caldata = &sc->caldata;
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ath_dbg(common, ATH_DBG_CONFIG,
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"(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
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sc->sc_ah->curchan->channel,
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channel->center_freq, conf_is_ht40(conf),
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fastcc);
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r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
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if (r) {
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ath_err(common,
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"Unable to reset channel (%u MHz), reset status %d\n",
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channel->center_freq, r);
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goto ps_restore;
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}
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if (ath_startrecv(sc) != 0) {
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ath_err(common, "Unable to restart recv logic\n");
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r = -EIO;
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goto ps_restore;
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}
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ath9k_cmn_update_txpow(ah, sc->curtxpow,
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sc->config.txpowlimit, &sc->curtxpow);
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ath9k_hw_set_interrupts(ah, ah->imask);
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ath9k_hw_enable_interrupts(ah);
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if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
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if (sc->sc_flags & SC_OP_BEACONS)
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ath_set_beacon(sc);
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ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
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ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
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if (!common->disable_ani)
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ath_start_ani(common);
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}
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ps_restore:
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ieee80211_wake_queues(hw);
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spin_unlock_bh(&sc->sc_pcu_lock);
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r = ath_reset_internal(sc, hchan, false);
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ath9k_ps_restore(sc);
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return r;
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}
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@ -825,28 +871,13 @@ static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
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channel->center_freq, r);
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}
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ath9k_cmn_update_txpow(ah, sc->curtxpow,
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sc->config.txpowlimit, &sc->curtxpow);
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if (ath_startrecv(sc) != 0) {
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ath_err(common, "Unable to restart recv logic\n");
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goto out;
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}
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if (sc->sc_flags & SC_OP_BEACONS)
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ath_set_beacon(sc); /* restart beacons */
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/* Re-Enable interrupts */
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ath9k_hw_set_interrupts(ah, ah->imask);
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ath9k_hw_enable_interrupts(ah);
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ath_complete_reset(sc, true);
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/* Enable LED */
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ath9k_hw_cfg_output(ah, ah->led_pin,
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AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
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ath9k_hw_set_gpio(ah, ah->led_pin, 0);
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ieee80211_wake_queues(hw);
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ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
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out:
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spin_unlock_bh(&sc->sc_pcu_lock);
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ath9k_ps_restore(sc);
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@ -859,12 +890,11 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
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int r;
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ath9k_ps_wakeup(sc);
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cancel_delayed_work_sync(&sc->hw_pll_work);
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ath_cancel_work(sc);
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spin_lock_bh(&sc->sc_pcu_lock);
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ieee80211_stop_queues(hw);
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/*
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* Keep the LED on when the radio is disabled
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* during idle unassociated state.
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@ -874,13 +904,7 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
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ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
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}
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/* Disable interrupts */
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ath9k_hw_disable_interrupts(ah);
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ath_drain_all_txq(sc, false); /* clear pending tx frames */
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ath_stoprecv(sc); /* turn off frame recv */
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ath_flushrecv(sc); /* flush recv queue */
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ath_prepare_reset(sc, false, true);
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if (!ah->curchan)
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ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
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@ -902,49 +926,11 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
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static int ath_reset(struct ath_softc *sc, bool retry_tx)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_hw *hw = sc->hw;
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int r;
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sc->hw_busy_count = 0;
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ath9k_debug_samp_bb_mac(sc);
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/* Stop ANI */
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del_timer_sync(&common->ani.timer);
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ath9k_ps_wakeup(sc);
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ieee80211_stop_queues(hw);
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ath9k_hw_disable_interrupts(ah);
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ath_drain_all_txq(sc, retry_tx);
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ath_stoprecv(sc);
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ath_flushrecv(sc);
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r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
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if (r)
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ath_err(common,
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"Unable to reset hardware; reset status %d\n", r);
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if (ath_startrecv(sc) != 0)
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ath_err(common, "Unable to start recv logic\n");
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/*
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* We may be doing a reset in response to a request
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* that changes the channel so update any state that
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* might change as a result.
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*/
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ath9k_cmn_update_txpow(ah, sc->curtxpow,
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sc->config.txpowlimit, &sc->curtxpow);
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if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
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ath_set_beacon(sc); /* restart beacons */
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ath9k_hw_set_interrupts(ah, ah->imask);
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ath9k_hw_enable_interrupts(ah);
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r = ath_reset_internal(sc, NULL, retry_tx);
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if (retry_tx) {
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int i;
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@ -957,12 +943,6 @@ static int ath_reset(struct ath_softc *sc, bool retry_tx)
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}
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}
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ieee80211_wake_queues(hw);
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/* Start ANI */
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if (!common->disable_ani)
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ath_start_ani(common);
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ath9k_ps_restore(sc);
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return r;
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@ -972,9 +952,7 @@ void ath_reset_work(struct work_struct *work)
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{
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struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
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spin_lock_bh(&sc->sc_pcu_lock);
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ath_reset(sc, true);
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spin_unlock_bh(&sc->sc_pcu_lock);
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}
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void ath_hw_check(struct work_struct *work)
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@ -995,11 +973,8 @@ void ath_hw_check(struct work_struct *work)
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ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
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"busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
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if (busy >= 99) {
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if (++sc->hw_busy_count >= 3) {
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spin_lock_bh(&sc->sc_pcu_lock);
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ath_reset(sc, true);
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spin_unlock_bh(&sc->sc_pcu_lock);
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}
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if (++sc->hw_busy_count >= 3)
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ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
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} else if (busy >= 0)
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sc->hw_busy_count = 0;
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@ -1019,9 +994,7 @@ static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
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/* Rx is hung for more than 500ms. Reset it */
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ath_dbg(common, ATH_DBG_RESET,
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"Possible RX hang, resetting");
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spin_lock_bh(&sc->sc_pcu_lock);
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ath_reset(sc, true);
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spin_unlock_bh(&sc->sc_pcu_lock);
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ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
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count = 0;
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}
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} else
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@ -1092,28 +1065,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
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goto mutex_unlock;
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}
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/*
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* This is needed only to setup initial state
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* but it's best done after a reset.
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*/
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ath9k_cmn_update_txpow(ah, sc->curtxpow,
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sc->config.txpowlimit, &sc->curtxpow);
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/*
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* Setup the hardware after reset:
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* The receive engine is set going.
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* Frame transmit is handled entirely
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* in the frame output path; there's nothing to do
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* here except setup the interrupt mask.
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*/
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if (ath_startrecv(sc) != 0) {
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ath_err(common, "Unable to start recv logic\n");
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r = -EIO;
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spin_unlock_bh(&sc->sc_pcu_lock);
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goto mutex_unlock;
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}
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spin_unlock_bh(&sc->sc_pcu_lock);
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/* Setup our intr mask. */
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ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
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ATH9K_INT_RXORN | ATH9K_INT_FATAL |
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@ -1136,12 +1087,14 @@ static int ath9k_start(struct ieee80211_hw *hw)
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/* Disable BMISS interrupt when we're not associated */
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ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
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ath9k_hw_set_interrupts(ah, ah->imask);
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ath9k_hw_enable_interrupts(ah);
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ieee80211_wake_queues(hw);
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if (!ath_complete_reset(sc, false)) {
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r = -EIO;
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spin_unlock_bh(&sc->sc_pcu_lock);
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goto mutex_unlock;
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}
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ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
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spin_unlock_bh(&sc->sc_pcu_lock);
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if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
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!ah->btcoex_hw.enabled) {
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@ -1234,11 +1187,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
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mutex_lock(&sc->mutex);
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cancel_delayed_work_sync(&sc->tx_complete_work);
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cancel_delayed_work_sync(&sc->hw_pll_work);
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cancel_work_sync(&sc->paprd_work);
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cancel_work_sync(&sc->hw_check_work);
|
||||
cancel_work_sync(&sc->hw_reset_work);
|
||||
ath_cancel_work(sc);
|
||||
|
||||
if (sc->sc_flags & SC_OP_INVALID) {
|
||||
ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
|
||||
@ -2349,9 +2298,11 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
|
||||
ath9k_ps_wakeup(sc);
|
||||
spin_lock_bh(&sc->sc_pcu_lock);
|
||||
drain_txq = ath_drain_all_txq(sc, false);
|
||||
spin_unlock_bh(&sc->sc_pcu_lock);
|
||||
|
||||
if (!drain_txq)
|
||||
ath_reset(sc, false);
|
||||
spin_unlock_bh(&sc->sc_pcu_lock);
|
||||
|
||||
ath9k_ps_restore(sc);
|
||||
ieee80211_wake_queues(hw);
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user