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locking/atomic, arch/sh: Fix ATOMIC_FETCH_OP()

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We cannot use the "z" constraint twice, since its a single register
(r0). Change the one not used by movli.l/movco.l to "r".

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Tested-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rich Felker <dalias@libc.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Peter Zijlstra 2016-08-26 15:06:04 +02:00 committed by Ingo Molnar
parent 7d1e042314
commit 9bf6ffdabd
1 changed files with 1 additions and 1 deletions
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2
arch/sh/include/asm/atomic-llsc.h
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@ -60,7 +60,7 @@ static inline int atomic_fetch_##op(int i, atomic_t *v) \
" movco.l %0, @%3 \n" \ " movco.l %0, @%3 \n" \
" bf 1b \n" \ " bf 1b \n" \
" synco \n" \ " synco \n" \
: "=&z" (temp), "=&z" (res) \ : "=&z" (temp), "=&r" (res) \
: "r" (i), "r" (&v->counter) \ : "r" (i), "r" (&v->counter) \
: "t"); \ : "t"); \
\ \