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ath9k_hw: make various ar5416/ar91xx rf banks const
Banks 0-3,7 are neither modified at run time, nor SREV dependent. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -18,6 +18,7 @@
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#include "hw-ops.h"
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#include "../regd.h"
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#include "ar9002_phy.h"
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#include "ar5008_initvals.h"
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/* All code below is for AR5008, AR9001, AR9002 */
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@ -43,23 +44,16 @@ static const int m2ThreshLowExt_off = 127;
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static const int m1ThreshExt_off = 127;
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static const int m2ThreshExt_off = 127;
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static const struct ar5416IniArray bank0 = STATIC_INI_ARRAY(ar5416Bank0);
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static const struct ar5416IniArray bank1 = STATIC_INI_ARRAY(ar5416Bank1);
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static const struct ar5416IniArray bank2 = STATIC_INI_ARRAY(ar5416Bank2);
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static const struct ar5416IniArray bank3 = STATIC_INI_ARRAY(ar5416Bank3);
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static const struct ar5416IniArray bank7 = STATIC_INI_ARRAY(ar5416Bank7);
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static void ar5008_rf_bank_setup(u32 *bank, struct ar5416IniArray *array,
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int col)
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{
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int i;
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for (i = 0; i < array->ia_rows; i++)
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bank[i] = INI_RA(array, i, col);
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}
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#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) \
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ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
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static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array,
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u32 *data, unsigned int *writecnt)
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static void ar5008_write_bank6(struct ath_hw *ah, unsigned int *writecnt)
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{
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struct ar5416IniArray *array = &ah->iniBank6;
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u32 *data = ah->analogBank6Data;
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int r;
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ENABLE_REGWRITE_BUFFER(ah);
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@ -165,7 +159,7 @@ static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
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ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
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/* write Bank 6 with new params */
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REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
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ar5008_write_bank6(ah, ®_writes);
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}
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/**
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@ -469,29 +463,16 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
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*/
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static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
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{
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#define ATH_ALLOC_BANK(bank, size) do { \
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bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
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if (!bank) \
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goto error; \
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} while (0);
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struct ath_common *common = ath9k_hw_common(ah);
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int size = ah->iniBank6.ia_rows * sizeof(u32);
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if (AR_SREV_9280_20_OR_LATER(ah))
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return 0;
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ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
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ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
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ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
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ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
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ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
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ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
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ah->analogBank6Data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
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if (!ah->analogBank6Data)
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return -ENOMEM;
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return 0;
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#undef ATH_ALLOC_BANK
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error:
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ath_err(common, "Cannot allocate RF banks\n");
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return -ENOMEM;
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}
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@ -528,19 +509,6 @@ static bool ar5008_hw_set_rf_regs(struct ath_hw *ah,
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/* Setup rf parameters */
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eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
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/* Setup Bank 0 Write */
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ar5008_rf_bank_setup(ah->analogBank0Data, &ah->iniBank0, 1);
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/* Setup Bank 1 Write */
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ar5008_rf_bank_setup(ah->analogBank1Data, &ah->iniBank1, 1);
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/* Setup Bank 2 Write */
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ar5008_rf_bank_setup(ah->analogBank2Data, &ah->iniBank2, 1);
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/* Setup Bank 6 Write */
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ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
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modesIndex);
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for (i = 0; i < ah->iniBank6.ia_rows; i++)
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ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
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@ -563,16 +531,13 @@ static bool ar5008_hw_set_rf_regs(struct ath_hw *ah,
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}
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}
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/* Setup Bank 7 Setup */
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ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
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/* Write Analog registers */
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REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data, regWrites);
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REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data, regWrites);
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REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data, regWrites);
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REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data, regWrites);
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REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, regWrites);
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REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data, regWrites);
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REG_WRITE_ARRAY(&bank0, 1, regWrites);
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REG_WRITE_ARRAY(&bank1, 1, regWrites);
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REG_WRITE_ARRAY(&bank2, 1, regWrites);
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REG_WRITE_ARRAY(&bank3, modesIndex, regWrites);
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ar5008_write_bank6(ah, ®Writes);
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REG_WRITE_ARRAY(&bank7, 1, regWrites);
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return true;
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}
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@ -78,12 +78,6 @@ static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
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/* Common for AR5416, AR913x, AR9160 */
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INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
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INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
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INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
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INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
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INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
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INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
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/* Common for AR913x, AR9160 */
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if (!AR_SREV_5416(ah))
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INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC_9100);
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@ -33,6 +33,12 @@ struct ar5416IniArray {
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u32 ia_columns;
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};
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#define STATIC_INI_ARRAY(array) { \
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.ia_array = (u32 *)(array), \
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.ia_rows = ARRAY_SIZE(array), \
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.ia_columns = ARRAY_SIZE(array[0]), \
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}
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#define INIT_INI_ARRAY(iniarray, array) do { \
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(iniarray)->ia_array = (u32 *)(array); \
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(iniarray)->ia_rows = ARRAY_SIZE(array); \
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@ -847,12 +847,7 @@ struct ath_hw {
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struct ath_hw_ops ops;
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/* Used to program the radio on non single-chip devices */
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u32 *analogBank0Data;
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u32 *analogBank1Data;
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u32 *analogBank2Data;
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u32 *analogBank3Data;
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u32 *analogBank6Data;
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u32 *analogBank7Data;
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int coverage_class;
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u32 slottime;
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@ -883,13 +878,8 @@ struct ath_hw {
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struct ar5416IniArray iniModes;
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struct ar5416IniArray iniCommon;
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struct ar5416IniArray iniBank0;
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struct ar5416IniArray iniBB_RfGain;
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struct ar5416IniArray iniBank1;
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struct ar5416IniArray iniBank2;
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struct ar5416IniArray iniBank3;
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struct ar5416IniArray iniBank6;
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struct ar5416IniArray iniBank7;
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struct ar5416IniArray iniAddac;
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struct ar5416IniArray iniPcieSerdes;
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#ifdef CONFIG_PM_SLEEP
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