From a169f09b96306cc353ffe0e1bc4bc0e1e9492281 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 5 Nov 2010 09:40:00 +1000 Subject: [PATCH] drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nv50_graph.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c index 7a98d41c68a6..6785269f778a 100644 --- a/drivers/gpu/drm/nouveau/nv50_graph.c +++ b/drivers/gpu/drm/nouveau/nv50_graph.c @@ -451,11 +451,10 @@ nv50_graph_register(struct drm_device *dev) } /* compute */ - if (dev_priv->chipset <= 0xa0 || - dev_priv->chipset == 0xaa || - dev_priv->chipset == 0xac) - NVOBJ_CLASS(dev, 0x50c0, GR); - else + NVOBJ_CLASS(dev, 0x50c0, GR); + if (dev_priv->chipset > 0xa0 && + dev_priv->chipset != 0xaa && + dev_priv->chipset != 0xac) NVOBJ_CLASS(dev, 0x85c0, GR); dev_priv->engine.graph.registered = true;