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OMAP3: PM: GPMC context save/restore
This patch adds the context save and restore functions for GPMC to enable off-mode. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -62,6 +62,33 @@
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#define ENABLE_PREFETCH (0x1 << 7)
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#define ENABLE_PREFETCH (0x1 << 7)
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#define DMA_MPU_MODE 2
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#define DMA_MPU_MODE 2
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/* Structure to save gpmc cs context */
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struct gpmc_cs_config {
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u32 config1;
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u32 config2;
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u32 config3;
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u32 config4;
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u32 config5;
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u32 config6;
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u32 config7;
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int is_valid;
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};
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/*
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* Structure to save/restore gpmc context
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* to support core off on OMAP3
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*/
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struct omap3_gpmc_regs {
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u32 sysconfig;
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u32 irqenable;
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u32 timeout_ctrl;
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u32 config;
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u32 prefetch_config1;
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u32 prefetch_config2;
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u32 prefetch_control;
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struct gpmc_cs_config cs_context[GPMC_CS_NUM];
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};
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static struct resource gpmc_mem_root;
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static struct resource gpmc_mem_root;
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static struct resource gpmc_cs_mem[GPMC_CS_NUM];
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static struct resource gpmc_cs_mem[GPMC_CS_NUM];
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static DEFINE_SPINLOCK(gpmc_mem_lock);
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static DEFINE_SPINLOCK(gpmc_mem_lock);
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@ -261,7 +288,7 @@ static void gpmc_cs_enable_mem(int cs, u32 base, u32 size)
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l = (base >> GPMC_CHUNK_SHIFT) & 0x3f;
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l = (base >> GPMC_CHUNK_SHIFT) & 0x3f;
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l &= ~(0x0f << 8);
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l &= ~(0x0f << 8);
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l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8;
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l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8;
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l |= 1 << 6; /* CSVALID */
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l |= GPMC_CONFIG7_CSVALID;
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gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
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gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
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}
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}
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@ -270,7 +297,7 @@ static void gpmc_cs_disable_mem(int cs)
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u32 l;
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u32 l;
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l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
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l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
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l &= ~(1 << 6); /* CSVALID */
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l &= ~GPMC_CONFIG7_CSVALID;
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gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
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gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
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}
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}
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@ -290,7 +317,7 @@ static int gpmc_cs_mem_enabled(int cs)
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u32 l;
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u32 l;
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l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
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l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
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return l & (1 << 6);
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return l & GPMC_CONFIG7_CSVALID;
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}
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}
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int gpmc_cs_set_reserved(int cs, int reserved)
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int gpmc_cs_set_reserved(int cs, int reserved)
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@ -516,3 +543,68 @@ void __init gpmc_init(void)
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gpmc_write_reg(GPMC_SYSCONFIG, l);
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gpmc_write_reg(GPMC_SYSCONFIG, l);
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gpmc_mem_init();
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gpmc_mem_init();
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}
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}
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#ifdef CONFIG_ARCH_OMAP3
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static struct omap3_gpmc_regs gpmc_context;
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void omap3_gpmc_save_context()
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{
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int i;
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gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
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gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
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gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
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gpmc_context.config = gpmc_read_reg(GPMC_CONFIG);
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gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
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gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2);
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gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL);
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for (i = 0; i < GPMC_CS_NUM; i++) {
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gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i);
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if (gpmc_context.cs_context[i].is_valid) {
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gpmc_context.cs_context[i].config1 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG1);
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gpmc_context.cs_context[i].config2 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG2);
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gpmc_context.cs_context[i].config3 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG3);
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gpmc_context.cs_context[i].config4 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG4);
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gpmc_context.cs_context[i].config5 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG5);
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gpmc_context.cs_context[i].config6 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG6);
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gpmc_context.cs_context[i].config7 =
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gpmc_cs_read_reg(i, GPMC_CS_CONFIG7);
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}
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}
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}
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void omap3_gpmc_restore_context()
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{
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int i;
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gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig);
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gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable);
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gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl);
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gpmc_write_reg(GPMC_CONFIG, gpmc_context.config);
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gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1);
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gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2);
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gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control);
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for (i = 0; i < GPMC_CS_NUM; i++) {
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if (gpmc_context.cs_context[i].is_valid) {
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG1,
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gpmc_context.cs_context[i].config1);
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG2,
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gpmc_context.cs_context[i].config2);
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG3,
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gpmc_context.cs_context[i].config3);
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG4,
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gpmc_context.cs_context[i].config4);
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG5,
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gpmc_context.cs_context[i].config5);
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG6,
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gpmc_context.cs_context[i].config6);
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gpmc_cs_write_reg(i, GPMC_CS_CONFIG7,
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gpmc_context.cs_context[i].config7);
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}
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}
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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@ -52,6 +52,7 @@
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#define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1))
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#define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1))
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#define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2))
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#define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2))
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#define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3))
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#define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3))
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#define GPMC_CONFIG7_CSVALID (1 << 6)
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/*
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/*
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* Note that all values in this struct are in nanoseconds, while
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* Note that all values in this struct are in nanoseconds, while
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@ -107,6 +108,8 @@ extern int gpmc_prefetch_enable(int cs, int dma_mode,
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unsigned int u32_count, int is_write);
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unsigned int u32_count, int is_write);
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extern void gpmc_prefetch_reset(void);
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extern void gpmc_prefetch_reset(void);
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extern int gpmc_prefetch_status(void);
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extern int gpmc_prefetch_status(void);
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extern void omap3_gpmc_save_context(void);
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extern void omap3_gpmc_restore_context(void);
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extern void __init gpmc_init(void);
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extern void __init gpmc_init(void);
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#endif
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#endif
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