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Samsung 2nd DT updates for v3.20

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- for all of Samsung SoCs
   : use generic power domain bindings
   : add 'dr_mode' property for hsotg/dwc2 devices
 
 - exynos3250-rinato and exynos3250-monk
   : add regulator-haptic
 
 - exynos5422-odroidxu3
   : reduce total RAM by 22 MiB because last 22 MiB
     for secure monitor cannot be accessed by kernel
   : add on-board INA231 sensors and LDO26 of PMIC
     for the sensors
 
 Note that this is based on tags/samsung-dt
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Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Merge "Samsung 2nd DT updates for v3.20" from Kukjin Kim:

- for all of Samsung SoCs
  : use generic power domain bindings
  : add 'dr_mode' property for hsotg/dwc2 devices

- exynos3250-rinato and exynos3250-monk
  : add regulator-haptic

- exynos5422-odroidxu3
  : reduce total RAM by 22 MiB because last 22 MiB
    for secure monitor cannot be accessed by kernel
  : add on-board INA231 sensors and LDO26 of PMIC
    for the sensors

* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: reduce total RAM by 22 MiB for exynos5422-odroidxu3
  ARM: dts: add on-board INA231 sensors for exynos5422-odroidxu3
  ARM: dts: Add regulator-haptic node for exynos3250-monk
  ARM: dts: Add regulator-haptic node for exynos3250-rinato
  ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
  ARM: dts: convert to generic power domain bindings for exynos DT

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-01-29 13:54:26 -08:00
commit a35306d3ad
22 changed files with 123 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/arm/exynos/power_domain.txt
View File

@ -23,7 +23,7 @@ Optional Properties:
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
Node of a device using power domains must have a samsung,power-domain property
Node of a device using power domains must have a power-domains property
defined with a phandle to respective power domain.
Example:

6
Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt
View File

@ -45,7 +45,7 @@ Required properties:
Exynos4 SoCs, there needs no "master" clock.
Exynos5 SoCs, some System MMUs must have "master" clocks.
- clocks: Required if the System MMU is needed to gate its clock.
- samsung,power-domain: Required if the System MMU is needed to gate its power.
- power-domains: Required if the System MMU is needed to gate its power.
Please refer to the following document:
Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@ -54,7 +54,7 @@ Examples:
compatible = "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>;
samsung,power-domain = <&pd_gsc>;
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
};
@ -66,5 +66,5 @@ Examples:
interrupts = <2 0>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
samsung,power-domain = <&pd_gsc>;
power-domains = <&pd_gsc>;
};

4
Documentation/devicetree/bindings/media/s5p-mfc.txt
View File

@ -28,7 +28,7 @@ Required properties:
for DMA contiguous memory allocation and its size.
Optional properties:
- samsung,power-domain : power-domain property defined with a phandle
- power-domains : power-domain property defined with a phandle
to respective power domain.
Example:
@ -38,7 +38,7 @@ mfc: codec@13400000 {
compatible = "samsung,mfc-v5";
reg = <0x13400000 0x10000>;
interrupts = <0 94 0>;
samsung,power-domain = <&pd_mfc>;
power-domains = <&pd_mfc>;
clocks = <&clock 273>;
clock-names = "mfc";
};

4
Documentation/devicetree/bindings/video/exynos_dsim.txt
View File

@ -21,7 +21,7 @@ Required properties:
according to DSI host bindings (see MIPI DSI bindings [1])
Optional properties:
- samsung,power-domain: a phandle to DSIM power domain node
- power-domains: a phandle to DSIM power domain node
Child nodes:
Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
@ -53,7 +53,7 @@ Example:
phy-names = "dsim";
vddcore-supply = <&vusb_reg>;
vddio-supply = <&vmipi_reg>;
samsung,power-domain = <&pd_lcd0>;
power-domains = <&pd_lcd0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,pll-clock-frequency = <24000000>;

4
Documentation/devicetree/bindings/video/samsung-fimd.txt
View File

@ -38,7 +38,7 @@ Required properties:
property. Must contain "sclk_fimd" and "fimd".
Optional Properties:
- samsung,power-domain: a phandle to FIMD power domain node.
- power-domains: a phandle to FIMD power domain node.
- samsung,invert-vden: video enable signal is inverted
- samsung,invert-vclk: video clock signal is inverted
- display-timings: timing settings for FIMD, as described in document [1].
@ -97,7 +97,7 @@ SoC specific DT entry:
interrupts = <11 0>, <11 1>, <11 2>;
clocks = <&clock 140>, <&clock 283>;
clock-names = "sclk_fimd", "fimd";
samsung,power-domain = <&pd_lcd0>;
power-domains = <&pd_lcd0>;
status = "disabled";
};

8
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -108,6 +108,13 @@
};
};
};
haptics {
compatible = "regulator-haptic";
haptic-supply = <&motor_reg>;
min-microvolt = <1100000>;
max-microvolt = <2700000>;
};
};
&adc {
@ -140,6 +147,7 @@
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;
dr_mode = "peripheral";
status = "okay";
};

8
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -99,6 +99,13 @@
};
};
};
haptics {
compatible = "regulator-haptic";
haptic-supply = <&motor_reg>;
min-microvolt = <1100000>;
max-microvolt = <2700000>;
};
};
&adc {
@ -131,6 +138,7 @@
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;
dr_mode = "peripheral";
status = "okay";
};

11
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -141,26 +141,31 @@
pd_cam: cam-power-domain@10023C00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
};
pd_mfc: mfc-power-domain@10023C40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
};
pd_g3d: g3d-power-domain@10023C60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
};
pd_lcd0: lcd0-power-domain@10023C80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
};
pd_isp: isp-power-domain@10023CA0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
};
cmu: clock-controller@10030000 {
@ -235,7 +240,7 @@
interrupts = <0 84 0>, <0 85 0>, <0 86 0>;
clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
samsung,power-domain = <&pd_lcd0>;
power-domains = <&pd_lcd0>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
@ -245,7 +250,7 @@
reg = <0x11C80000 0x10000>;
interrupts = <0 83 0>;
samsung,phy-type = <0>;
samsung,power-domain = <&pd_lcd0>;
power-domains = <&pd_lcd0>;
phys = <&mipi_phy 1>;
phy-names = "dsim";
clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>;
@ -348,7 +353,7 @@
interrupts = <0 102 0>;
clock-names = "mfc", "sclk_mfc";
clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
samsung,power-domain = <&pd_mfc>;
power-domains = <&pd_mfc>;
status = "disabled";
};

25
arch/arm/boot/dts/exynos4.dtsi
View File

@ -81,36 +81,43 @@
pd_mfc: mfc-power-domain@10023C40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
};
pd_g3d: g3d-power-domain@10023C60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
};
pd_lcd0: lcd0-power-domain@10023C80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
};
pd_tv: tv-power-domain@10023C20 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>;
#power-domain-cells = <0>;
};
pd_cam: cam-power-domain@10023C00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
};
pd_gps: gps-power-domain@10023CE0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CE0 0x20>;
#power-domain-cells = <0>;
};
pd_gps_alive: gps-alive-power-domain@10023D00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023D00 0x20>;
#power-domain-cells = <0>;
};
gic: interrupt-controller@10490000 {
@ -147,7 +154,7 @@
compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <0 79 0>;
samsung,power-domain = <&pd_lcd0>;
power-domains = <&pd_lcd0>;
phys = <&mipi_phy 1>;
phy-names = "dsim";
clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
@ -172,7 +179,7 @@
interrupts = <0 84 0>;
clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
@ -183,7 +190,7 @@
interrupts = <0 85 0>;
clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
@ -194,7 +201,7 @@
interrupts = <0 86 0>;
clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
@ -205,7 +212,7 @@
interrupts = <0 87 0>;
clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
@ -217,7 +224,7 @@
clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
clock-names = "csis", "sclk_csis";
bus-width = <4>;
samsung,power-domain = <&pd_cam>;
power-domains = <&pd_cam>;
phys = <&mipi_phy 0>;
phy-names = "csis";
status = "disabled";
@ -232,7 +239,7 @@
clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
clock-names = "csis", "sclk_csis";
bus-width = <2>;
samsung,power-domain = <&pd_cam>;
power-domains = <&pd_cam>;
phys = <&mipi_phy 2>;
phy-names = "csis";
status = "disabled";
@ -391,7 +398,7 @@
compatible = "samsung,mfc-v5";
reg = <0x13400000 0x10000>;
interrupts = <0 94 0>;
samsung,power-domain = <&pd_mfc>;
power-domains = <&pd_mfc>;
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
clock-names = "mfc", "sclk_mfc";
status = "disabled";
@ -641,7 +648,7 @@
interrupts = <11 0>, <11 1>, <11 2>;
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
samsung,power-domain = <&pd_lcd0>;
power-domains = <&pd_lcd0>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};

1
arch/arm/boot/dts/exynos4210-trats.dts
View File

@ -91,6 +91,7 @@
hsotg@12480000 {
vusb_d-supply = <&vusb_reg>;
vusb_a-supply = <&vusbdac_reg>;
dr_mode = "peripheral";
status = "okay";
};

1
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -71,6 +71,7 @@
hsotg@12480000 {
vusb_d-supply = <&ldo3_reg>;
vusb_a-supply = <&ldo8_reg>;
dr_mode = "peripheral";
status = "okay";
};

1
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -79,6 +79,7 @@
pd_lcd1: lcd1-power-domain@10023CA0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
};
gic: interrupt-controller@10490000 {

1
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View File

@ -381,6 +381,7 @@
};
hsotg@12480000 {
dr_mode = "peripheral";
status = "okay";
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;

1
arch/arm/boot/dts/exynos4412-trats2.dts
View File

@ -845,6 +845,7 @@
hsotg@12480000 {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;
dr_mode = "peripheral";
status = "okay";
};

7
arch/arm/boot/dts/exynos4415.dtsi
View File

@ -131,36 +131,43 @@
pd_cam: cam-power-domain@10024000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024000 0x20>;
#power-domain-cells = <0>;
};
pd_tv: tv-power-domain@10024020 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024020 0x20>;
#power-domain-cells = <0>;
};
pd_mfc: mfc-power-domain@10024040 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024040 0x20>;
#power-domain-cells = <0>;
};
pd_g3d: g3d-power-domain@10024060 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024060 0x20>;
#power-domain-cells = <0>;
};
pd_lcd0: lcd0-power-domain@10024080 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024080 0x20>;
#power-domain-cells = <0>;
};
pd_isp0: isp0-power-domain@100240A0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100240A0 0x20>;
#power-domain-cells = <0>;
};
pd_isp1: isp1-power-domain@100240E0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100240E0 0x20>;
#power-domain-cells = <0>;
};
cmu: clock-controller@10030000 {

7
arch/arm/boot/dts/exynos4x12.dtsi
View File

@ -52,6 +52,7 @@
pd_isp: isp-power-domain@10023CA0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
};
clock: clock-controller@10030000 {
@ -195,7 +196,7 @@
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>;
interrupts = <0 105 0>;
samsung,power-domain = <&pd_isp>;
power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE0>;
clock-names = "flite";
status = "disabled";
@ -205,7 +206,7 @@
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>;
interrupts = <0 106 0>;
samsung,power-domain = <&pd_isp>;
power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE1>;
clock-names = "flite";
status = "disabled";
@ -215,7 +216,7 @@
compatible = "samsung,exynos4212-fimc-is", "simple-bus";
reg = <0x12000000 0x260000>;
interrupts = <0 90 0>, <0 95 0>;
samsung,power-domain = <&pd_isp>;
power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE0>,
<&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
<&clock CLK_PPMUISPMX>,

12
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -93,11 +93,13 @@
pd_gsc: gsc-power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
#power-domain-cells = <0>;
};
pd_mfc: mfc-power-domain@10044040 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044040 0x20>;
#power-domain-cells = <0>;
};
clock: clock-controller@10010000 {
@ -222,7 +224,7 @@
compatible = "samsung,mfc-v6";
reg = <0x11000000 0x10000>;
interrupts = <0 96 0>;
samsung,power-domain = <&pd_mfc>;
power-domains = <&pd_mfc>;
clocks = <&clock CLK_MFC>;
clock-names = "mfc";
};
@ -682,7 +684,7 @@
compatible = "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>;
samsung,power-domain = <&pd_gsc>;
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
};
@ -691,7 +693,7 @@
compatible = "samsung,exynos5-gsc";
reg = <0x13e10000 0x1000>;
interrupts = <0 86 0>;
samsung,power-domain = <&pd_gsc>;
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL1>;
clock-names = "gscl";
};
@ -700,7 +702,7 @@
compatible = "samsung,exynos5-gsc";
reg = <0x13e20000 0x1000>;
interrupts = <0 87 0>;
samsung,power-domain = <&pd_gsc>;
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL2>;
clock-names = "gscl";
};
@ -709,7 +711,7 @@
compatible = "samsung,exynos5-gsc";
reg = <0x13e30000 0x1000>;
interrupts = <0 88 0>;
samsung,power-domain = <&pd_gsc>;
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL3>;
clock-names = "gscl";
};

10
arch/arm/boot/dts/exynos5420.dtsi
View File

@ -178,7 +178,7 @@
interrupts = <0 96 0>;
clocks = <&clock CLK_MFC>;
clock-names = "mfc";
samsung,power-domain = <&mfc_pd>;
power-domains = <&mfc_pd>;
};
mmc_0: mmc@12200000 {
@ -250,11 +250,13 @@
gsc_pd: power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
#power-domain-cells = <0>;
};
isp_pd: power-domain@10044020 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044020 0x20>;
#power-domain-cells = <0>;
};
mfc_pd: power-domain@10044060 {
@ -263,11 +265,13 @@
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
<&clock CLK_MOUT_USER_ACLK333>;
clock-names = "oscclk", "pclk0", "clk0";
#power-domain-cells = <0>;
};
msc_pd: power-domain@10044120 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044120 0x20>;
#power-domain-cells = <0>;
};
pinctrl_0: pinctrl@13400000 {
@ -730,7 +734,7 @@
interrupts = <0 85 0>;
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
samsung,power-domain = <&gsc_pd>;
power-domains = <&gsc_pd>;
};
gsc_1: video-scaler@13e10000 {
@ -739,7 +743,7 @@
interrupts = <0 86 0>;
clocks = <&clock CLK_GSCL1>;
clock-names = "gscl";
samsung,power-domain = <&gsc_pd>;
power-domains = <&gsc_pd>;
};
pmu_system_controller: system-controller@10040000 {

41
arch/arm/boot/dts/exynos5422-odroidxu3.dts
View File

@ -18,7 +18,7 @@
compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
memory {
reg = <0x40000000 0x80000000>;
reg = <0x40000000 0x7EA00000>;
};
chosen {
@ -174,6 +174,13 @@
regulator-always-on;
};
ldo26_reg: LDO26 {
regulator-name = "vdd_ldo26";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-min-microvolt = <800000>;
@ -330,3 +337,35 @@
&usbdrd_dwc3_1 {
dr_mode = "otg";
};
&i2c_0 {
status = "okay";
/* A15 cluster: VDD_ARM */
ina231@40 {
compatible = "ti,ina231";
reg = <0x40>;
shunt-resistor = <10000>;
};
/* memory: VDD_MEM */
ina231@41 {
compatible = "ti,ina231";
reg = <0x41>;
shunt-resistor = <10000>;
};
/* GPU: VDD_G3D */
ina231@44 {
compatible = "ti,ina231";
reg = <0x44>;
shunt-resistor = <10000>;
};
/* A7 cluster: VDD_KFC */
ina231@45 {
compatible = "ti,ina231";
reg = <0x45>;
shunt-resistor = <10000>;
};
};

1
arch/arm/boot/dts/s5pv210-aquila.dts
View File

@ -355,6 +355,7 @@
&hsotg {
vusb_a-supply = <&ldo3_reg>;
vusb_d-supply = <&ldo8_reg>;
dr_mode = "peripheral";
status = "okay";
};

1
arch/arm/boot/dts/s5pv210-goni.dts
View File

@ -333,6 +333,7 @@
&hsotg {
vusb_a-supply = <&ldo3_reg>;
vusb_d-supply = <&ldo8_reg>;
dr_mode = "peripheral";
status = "okay";
};

1
arch/arm/boot/dts/s5pv210-smdkv210.dts
View File

@ -181,6 +181,7 @@
};
&hsotg {
dr_mode = "peripheral";
status = "okay";
};