FEX-Emu/linux
1
0
Fork 0
mirror of https://github.com/FEX-Emu/linux.git synced 2024-12-15 21:30:43 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Do the timer interrupt only once on CPU 0 ...

Browse Source 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2005-08-16 18:11:07 +00:00
parent 8b200ce4a6
commit a50b3e2763
1 changed files with 9 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
arch/mips/sibyte/sb1250/time.c
View File

@ -107,17 +107,18 @@ void sb1250_timer_interrupt(struct pt_regs *regs)
____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
/*
* CPU 0 handles the global timer interrupt job
*/
if (cpu == 0) {
/*
* CPU 0 handles the global timer interrupt job
*/
ll_timer_interrupt(irq, regs);
}
/*
* every CPU should do profiling and process accouting
*/
ll_local_timer_interrupt(irq, regs);
else {
/*
* other CPUs should just do profiling and process accounting
*/
ll_local_timer_interrupt(irq, regs);
}
}
/*