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spi: bcm2835: fallback to interrupt for polling timeouts exceeding 2 jiffies
The polling mode of the driver is designed for transfers that run less than 30us - it will only execute under those circumstances. So it should run comfortably without getting interrupted by the scheduler. But there are situations where the raspberry pi is so overloaded that it can take up to 80 jiffies until the polling thread gets rescheduled - this has been observed especially under heavy IO situations. In such a situation we now fall back to the interrupt handler and log the situation at debug level. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -69,7 +69,7 @@
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#define BCM2835_SPI_CS_CS_01 0x00000001
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#define BCM2835_SPI_POLLING_LIMIT_US 30
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#define BCM2835_SPI_TIMEOUT_MS 30000
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#define BCM2835_SPI_POLLING_JIFFIES 2
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#define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
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| SPI_NO_CS | SPI_3WIRE)
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@ -157,42 +157,6 @@ static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int bcm2835_spi_transfer_one_poll(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *tfr,
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u32 cs,
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unsigned long xfer_time_us)
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{
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struct bcm2835_spi *bs = spi_master_get_devdata(master);
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/* set timeout to 1 second of maximum polling */
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unsigned long timeout = jiffies + HZ;
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/* enable HW block without interrupts */
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bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);
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/* loop until finished the transfer */
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while (bs->rx_len) {
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/* read from fifo as much as possible */
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bcm2835_rd_fifo(bs);
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/* fill in tx fifo as much as possible */
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bcm2835_wr_fifo(bs);
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/* if we still expect some data after the read,
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* check for a possible timeout
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*/
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if (bs->rx_len && time_after(jiffies, timeout)) {
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/* Transfer complete - reset SPI HW */
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bcm2835_spi_reset_hw(master);
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/* and return timeout */
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return -ETIMEDOUT;
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}
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}
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/* Transfer complete - reset SPI HW */
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bcm2835_spi_reset_hw(master);
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/* and return without waiting for completion */
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return 0;
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}
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static int bcm2835_spi_transfer_one_irq(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *tfr,
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@ -229,6 +193,55 @@ static int bcm2835_spi_transfer_one_irq(struct spi_master *master,
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return 1;
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}
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static int bcm2835_spi_transfer_one_poll(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *tfr,
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u32 cs,
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unsigned long xfer_time_us)
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{
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struct bcm2835_spi *bs = spi_master_get_devdata(master);
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unsigned long timeout;
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/* enable HW block without interrupts */
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bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);
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/* fill in the fifo before timeout calculations
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* if we are interrupted here, then the data is
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* getting transferred by the HW while we are interrupted
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*/
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bcm2835_wr_fifo(bs);
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/* set the timeout */
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timeout = jiffies + BCM2835_SPI_POLLING_JIFFIES;
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/* loop until finished the transfer */
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while (bs->rx_len) {
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/* fill in tx fifo with remaining data */
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bcm2835_wr_fifo(bs);
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/* read from fifo as much as possible */
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bcm2835_rd_fifo(bs);
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/* if there is still data pending to read
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* then check the timeout
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*/
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if (bs->rx_len && time_after(jiffies, timeout)) {
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dev_dbg_ratelimited(&spi->dev,
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"timeout period reached: jiffies: %lu remaining tx/rx: %d/%d - falling back to interrupt mode\n",
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jiffies - timeout,
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bs->tx_len, bs->rx_len);
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/* fall back to interrupt mode */
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return bcm2835_spi_transfer_one_irq(master, spi,
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tfr, cs);
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}
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}
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/* Transfer complete - reset SPI HW */
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bcm2835_spi_reset_hw(master);
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/* and return without waiting for completion */
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return 0;
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}
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static int bcm2835_spi_transfer_one(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *tfr)
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