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clk: apn806: Add eMMC clock to system controller driver
Add fixed clock of 400MHz to system controller driver. This clock is used as SD/eMMC clock source. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Omri Itach <omrii@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> [fixed up conflicts, added error handling --rmk] Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -235,7 +235,8 @@
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#clock-cells = <1>;
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clock-output-names = "ap-cpu-cluster-0",
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"ap-cpu-cluster-1",
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"ap-fixed", "ap-mss";
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"ap-fixed", "ap-mss",
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"ap-emmc";
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reg = <0x6f4000 0x1000>;
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};
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};
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@ -23,7 +23,7 @@
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#define AP806_SAR_REG 0x400
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#define AP806_SAR_CLKFREQ_MODE_MASK 0x1f
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#define AP806_CLK_NUM 4
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#define AP806_CLK_NUM 5
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static struct clk *ap806_clks[AP806_CLK_NUM];
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@ -135,6 +135,17 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
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goto fail3;
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}
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/* eMMC Clock is fixed clock divided by 3 */
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of_property_read_string_index(np, "clock-output-names",
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4, &name);
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ap806_clks[4] = clk_register_fixed_factor(NULL, name, fixedclk_name,
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0, 1, 3);
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if (IS_ERR(ap806_clks[4])) {
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ret = PTR_ERR(ap806_clks[4]);
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goto fail4;
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}
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of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);
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ret = of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);
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if (ret)
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goto fail_clk_add;
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@ -142,6 +153,8 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
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return 0;
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fail_clk_add:
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clk_unregister_fixed_factor(ap806_clks[4]);
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fail4:
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clk_unregister_fixed_factor(ap806_clks[3]);
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fail3:
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clk_unregister_fixed_rate(ap806_clks[2]);
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