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pwm: lpc32xx: Fix the PWM polarity

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The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it
is stored modulo 256 in the register as it is only 8 bits wide.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
This commit is contained in:
Alban Bedel 2012-11-14 12:58:13 +01:00 committed by Thierry Reding
parent 983290b062
commit a9a18e0691
1 changed files with 16 additions and 1 deletions
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17
drivers/pwm/pwm-lpc32xx.c
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@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
c = 0; /* 0 set division by 256 */
period_cycles = c;
/* The duty-cycle value is as follows:
*
* DUTY-CYCLE HIGH LEVEL
* 1 99.9%
* 25 90.0%
* 128 50.0%
* 220 10.0%
* 255 0.1%
* 0 0.0%
*
* In other words, the register value is duty-cycle % 256 with
* duty-cycle in the range 1-256.
*/
c = 256 * duty_ns;
do_div(c, period_ns);
duty_cycles = c;
if (c > 255)
c = 255;
duty_cycles = 256 - c;
writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
lpc32xx->base + (pwm->hwpwm << 2));