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https://github.com/FEX-Emu/linux.git
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Merge branch 'sh/urgent' into sh-fixes-for-linus
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commit
a9fc749224
@ -283,31 +283,6 @@ static struct platform_device ceu1_device = {
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};
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/* FSI */
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/*
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* FSI-A use external clock which came from ak464x.
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* So, we should change parent of fsi
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*/
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#define FCLKACR 0xa4150008
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static void fsimck_init(struct clk *clk)
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{
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u32 status = __raw_readl(clk->enable_reg);
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/* use external clock */
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status &= ~0x000000ff;
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status |= 0x00000080;
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__raw_writel(status, clk->enable_reg);
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}
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static struct clk_ops fsimck_clk_ops = {
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.init = fsimck_init,
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};
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static struct clk fsimcka_clk = {
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.ops = &fsimck_clk_ops,
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.enable_reg = (void __iomem *)FCLKACR,
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.rate = 0, /* unknown */
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};
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/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
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static struct sh_fsi_platform_info fsi_info = {
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.porta_flags = SH_FSI_BRS_INV |
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@ -852,22 +827,14 @@ static int __init devices_setup(void)
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gpio_request(GPIO_FN_KEYOUT0, NULL);
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/* enable FSI */
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gpio_request(GPIO_FN_FSIMCKB, NULL);
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gpio_request(GPIO_FN_FSIMCKA, NULL);
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gpio_request(GPIO_FN_FSIIASD, NULL);
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gpio_request(GPIO_FN_FSIOASD, NULL);
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gpio_request(GPIO_FN_FSIIABCK, NULL);
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gpio_request(GPIO_FN_FSIIALRCK, NULL);
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gpio_request(GPIO_FN_FSIOABCK, NULL);
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gpio_request(GPIO_FN_FSIOALRCK, NULL);
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gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
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gpio_request(GPIO_FN_FSIIBSD, NULL);
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gpio_request(GPIO_FN_FSIOBSD, NULL);
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gpio_request(GPIO_FN_FSIIBBCK, NULL);
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gpio_request(GPIO_FN_FSIIBLRCK, NULL);
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gpio_request(GPIO_FN_FSIOBBCK, NULL);
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gpio_request(GPIO_FN_FSIOBLRCK, NULL);
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gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
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gpio_request(GPIO_FN_FSIIASD, NULL);
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/* set SPU2 clock to 83.4 MHz */
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clk = clk_get(NULL, "spu_clk");
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@ -879,10 +846,10 @@ static int __init devices_setup(void)
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/* change parent of FSI A */
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clk = clk_get(NULL, "fsia_clk");
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if (!IS_ERR(clk)) {
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clk_register(&fsimcka_clk);
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clk_set_parent(clk, &fsimcka_clk);
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clk_set_rate(clk, 11000);
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clk_set_rate(&fsimcka_clk, 11000);
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/* 48kHz dummy clock was used to make sure 1/1 divide */
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clk_set_rate(&sh7724_fsimcka_clk, 48000);
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clk_set_parent(clk, &sh7724_fsimcka_clk);
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clk_set_rate(clk, 48000);
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clk_put(clk);
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}
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