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ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi

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No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Lucas Stach 2013-01-22 22:46:07 +01:00 committed by Stephen Warren
parent c0967ce0a7
commit ab343e91aa
8 changed files with 5 additions and 8 deletions
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1
arch/arm/boot/dts/tegra20-harmony.dts
View File

@ -252,7 +252,6 @@
serial@70006300 {
status = "okay";
clock-frequency = <216000000>;
};
i2c@7000c000 {

2
arch/arm/boot/dts/tegra20-paz00.dts
View File

@ -244,12 +244,10 @@
serial@70006000 {
status = "okay";
clock-frequency = <216000000>;
};
serial@70006200 {
status = "okay";
clock-frequency = <216000000>;
};
i2c@7000c000 {

1
arch/arm/boot/dts/tegra20-seaboard.dts
View File

@ -303,7 +303,6 @@
serial@70006300 {
status = "okay";
clock-frequency = <216000000>;
};
i2c@7000c000 {

1
arch/arm/boot/dts/tegra20-tamonten.dtsi
View File

@ -276,7 +276,6 @@
};
serial@70006300 {
clock-frequency = <216000000>;
status = "okay";
};

1
arch/arm/boot/dts/tegra20-trimslice.dts
View File

@ -263,7 +263,6 @@
serial@70006000 {
status = "okay";
clock-frequency = <216000000>;
};
dvi_ddc: i2c@7000c000 {

1
arch/arm/boot/dts/tegra20-ventana.dts
View File

@ -300,7 +300,6 @@
serial@70006300 {
status = "okay";
clock-frequency = <216000000>;
};
i2c@7000c000 {

1
arch/arm/boot/dts/tegra20-whistler.dts
View File

@ -255,7 +255,6 @@
serial@70006000 {
status = "okay";
clock-frequency = <216000000>;
};
hdmi_ddc: i2c@7000c400 {

5
arch/arm/boot/dts/tegra20.dtsi
View File

@ -247,6 +247,7 @@
reg = <0x70006000 0x40>;
reg-shift = <2>;
interrupts = <0 36 0x04>;
clock-frequency = <216000000>;
nvidia,dma-request-selector = <&apbdma 8>;
clocks = <&tegra_car 6>;
status = "disabled";
@ -257,6 +258,7 @@
reg = <0x70006040 0x40>;
reg-shift = <2>;
interrupts = <0 37 0x04>;
clock-frequency = <216000000>;
nvidia,dma-request-selector = <&apbdma 9>;
clocks = <&tegra_car 96>;
status = "disabled";
@ -267,6 +269,7 @@
reg = <0x70006200 0x100>;
reg-shift = <2>;
interrupts = <0 46 0x04>;
clock-frequency = <216000000>;
nvidia,dma-request-selector = <&apbdma 10>;
clocks = <&tegra_car 55>;
status = "disabled";
@ -277,6 +280,7 @@
reg = <0x70006300 0x100>;
reg-shift = <2>;
interrupts = <0 90 0x04>;
clock-frequency = <216000000>;
nvidia,dma-request-selector = <&apbdma 19>;
clocks = <&tegra_car 65>;
status = "disabled";
@ -287,6 +291,7 @@
reg = <0x70006400 0x100>;
reg-shift = <2>;
interrupts = <0 91 0x04>;
clock-frequency = <216000000>;
nvidia,dma-request-selector = <&apbdma 20>;
clocks = <&tegra_car 66>;
status = "disabled";