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https://github.com/FEX-Emu/linux.git
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rt2800usb: add rt2800_register_[read,write]() wrappers
Part of preparations for later code unification. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
e9a6269d5b
commit
abbb505ddd
@ -46,7 +46,7 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
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/*
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* Register access.
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* All access to the CSR registers will go through the methods
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* rt2x00usb_register_read and rt2x00usb_register_write.
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* rt2800_register_read and rt2800_register_write.
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* BBP and RF register require indirect register access,
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* and use the CSR registers BBPCSR and RFCSR to achieve this.
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* These indirect registers work with busy bits,
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@ -85,7 +85,7 @@ static void rt2800usb_bbp_write(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1);
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rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0);
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rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
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rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
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}
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mutex_unlock(&rt2x00dev->csr_mutex);
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@ -112,7 +112,7 @@ static void rt2800usb_bbp_read(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1);
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rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1);
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rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
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rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
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WAIT_FOR_BBP(rt2x00dev, ®);
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}
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@ -140,7 +140,7 @@ static void rt2800usb_rfcsr_write(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 1);
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rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1);
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rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
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rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
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}
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mutex_unlock(&rt2x00dev->csr_mutex);
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@ -167,7 +167,7 @@ static void rt2800usb_rfcsr_read(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 0);
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rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1);
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rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
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rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
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WAIT_FOR_RFCSR(rt2x00dev, ®);
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}
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@ -195,7 +195,7 @@ static void rt2800usb_rf_write(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, RF_CSR_CFG0_SEL, 0);
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rt2x00_set_field32(®, RF_CSR_CFG0_BUSY, 1);
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rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
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rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
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rt2x00_rf_write(rt2x00dev, word, value);
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}
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@ -219,11 +219,11 @@ static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, H2M_MAILBOX_CSR_CMD_TOKEN, token);
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rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG0, arg0);
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rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG1, arg1);
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rt2x00usb_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
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rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
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reg = 0;
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rt2x00_set_field32(®, HOST_CMD_CSR_HOST_COMMAND, command);
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rt2x00usb_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
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rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
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}
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mutex_unlock(&rt2x00dev->csr_mutex);
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@ -233,8 +233,8 @@ static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
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static const struct rt2x00debug rt2800usb_rt2x00debug = {
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.owner = THIS_MODULE,
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.csr = {
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.read = rt2x00usb_register_read,
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.write = rt2x00usb_register_write,
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.read = rt2800_register_read,
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.write = rt2800_register_write,
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.flags = RT2X00DEBUGFS_OFFSET,
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.word_base = CSR_REG_BASE,
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.word_size = sizeof(u32),
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@ -268,7 +268,7 @@ static int rt2800usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
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{
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u32 reg;
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rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, ®);
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rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, ®);
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return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
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}
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@ -317,7 +317,7 @@ static int rt2800usb_blink_set(struct led_classdev *led_cdev,
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container_of(led_cdev, struct rt2x00_led, led_dev);
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u32 reg;
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rt2x00usb_register_read(led->rt2x00dev, LED_CFG, ®);
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rt2800_register_read(led->rt2x00dev, LED_CFG, ®);
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rt2x00_set_field32(®, LED_CFG_ON_PERIOD, *delay_on);
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rt2x00_set_field32(®, LED_CFG_OFF_PERIOD, *delay_off);
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rt2x00_set_field32(®, LED_CFG_SLOW_BLINK_PERIOD, 3);
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@ -325,7 +325,7 @@ static int rt2800usb_blink_set(struct led_classdev *led_cdev,
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rt2x00_set_field32(®, LED_CFG_G_LED_MODE, 12);
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rt2x00_set_field32(®, LED_CFG_Y_LED_MODE, 3);
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rt2x00_set_field32(®, LED_CFG_LED_POLAR, 1);
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rt2x00usb_register_write(led->rt2x00dev, LED_CFG, reg);
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rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
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return 0;
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}
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@ -356,7 +356,7 @@ static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
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offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
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rt2x00usb_register_read(rt2x00dev, offset, ®);
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rt2800_register_read(rt2x00dev, offset, ®);
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rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_KEYTAB,
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!!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
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rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_CIPHER,
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@ -364,7 +364,7 @@ static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_BSS_IDX,
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(crypto->cmd == SET_KEY) * crypto->bssidx);
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rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
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rt2x00usb_register_write(rt2x00dev, offset, reg);
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rt2800_register_write(rt2x00dev, offset, reg);
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offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
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@ -422,10 +422,10 @@ static int rt2800usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
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offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
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rt2x00usb_register_read(rt2x00dev, offset, ®);
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rt2800_register_read(rt2x00dev, offset, ®);
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rt2x00_set_field32(®, field,
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(crypto->cmd == SET_KEY) * crypto->cipher);
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rt2x00usb_register_write(rt2x00dev, offset, reg);
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rt2800_register_write(rt2x00dev, offset, reg);
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/*
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* Update WCID information
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@ -484,7 +484,7 @@ static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
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* and broadcast frames will always be accepted since
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* there is no filter for it at this time.
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*/
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rt2x00usb_register_read(rt2x00dev, RX_FILTER_CFG, ®);
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rt2800_register_read(rt2x00dev, RX_FILTER_CFG, ®);
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rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CRC_ERROR,
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!(filter_flags & FIF_FCSFAIL));
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rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PHY_ERROR,
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@ -513,7 +513,7 @@ static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0);
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rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL,
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!(filter_flags & FIF_CONTROL));
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rt2x00usb_register_write(rt2x00dev, RX_FILTER_CFG, reg);
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rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
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}
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static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
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@ -532,16 +532,16 @@ static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
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* bits which (when set to 0) will invalidate the entire beacon.
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*/
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beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
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rt2x00usb_register_write(rt2x00dev, beacon_base, 0);
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rt2800_register_write(rt2x00dev, beacon_base, 0);
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/*
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* Enable synchronisation.
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*/
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rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
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rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
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rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1);
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rt2x00_set_field32(®, BCN_TIME_CFG_TSF_SYNC, conf->sync);
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rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1);
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rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
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rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
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}
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if (flags & CONFIG_UPDATE_MAC) {
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@ -569,43 +569,43 @@ static void rt2800usb_config_erp(struct rt2x00_dev *rt2x00dev,
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{
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u32 reg;
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rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, ®);
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rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, ®);
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rt2x00_set_field32(®, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
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rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
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rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
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rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
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rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
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rt2x00_set_field32(®, AUTO_RSP_CFG_BAC_ACK_POLICY,
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!!erp->short_preamble);
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rt2x00_set_field32(®, AUTO_RSP_CFG_AR_PREAMBLE,
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!!erp->short_preamble);
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rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
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rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
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rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
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rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
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rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_CTRL,
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erp->cts_protection ? 2 : 0);
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rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
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rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
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rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE,
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rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE,
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erp->basic_rates);
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rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
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rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
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rt2x00usb_register_read(rt2x00dev, BKOFF_SLOT_CFG, ®);
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rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, ®);
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rt2x00_set_field32(®, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
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rt2x00_set_field32(®, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
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rt2x00usb_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
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rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
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rt2x00usb_register_read(rt2x00dev, XIFS_TIME_CFG, ®);
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rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, ®);
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rt2x00_set_field32(®, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
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rt2x00_set_field32(®, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
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rt2x00_set_field32(®, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
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rt2x00_set_field32(®, XIFS_TIME_CFG_EIFS, erp->eifs);
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rt2x00_set_field32(®, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
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rt2x00usb_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
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rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
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rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
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rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
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rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_INTERVAL,
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erp->beacon_int * 16);
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rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
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rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
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}
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static void rt2800usb_config_ant(struct rt2x00_dev *rt2x00dev,
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@ -813,11 +813,11 @@ static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
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rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
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}
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rt2x00usb_register_read(rt2x00dev, TX_BAND_CFG, ®);
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rt2800_register_read(rt2x00dev, TX_BAND_CFG, ®);
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rt2x00_set_field32(®, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
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rt2x00_set_field32(®, TX_BAND_CFG_A, rf->channel > 14);
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rt2x00_set_field32(®, TX_BAND_CFG_BG, rf->channel <= 14);
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rt2x00usb_register_write(rt2x00dev, TX_BAND_CFG, reg);
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rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg);
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tx_pin = 0;
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@ -840,7 +840,7 @@ static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
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rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
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rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
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rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
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rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
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rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
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@ -876,7 +876,7 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field8(®, BBP1_TX_POWER, 0);
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rt2800usb_bbp_write(rt2x00dev, 1, r1);
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rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_0, ®);
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rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, ®);
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rt2x00_set_field32(®, TX_PWR_CFG_0_1MBS, value);
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rt2x00_set_field32(®, TX_PWR_CFG_0_2MBS, value);
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rt2x00_set_field32(®, TX_PWR_CFG_0_55MBS, value);
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@ -885,9 +885,9 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, TX_PWR_CFG_0_9MBS, value);
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rt2x00_set_field32(®, TX_PWR_CFG_0_12MBS, value);
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rt2x00_set_field32(®, TX_PWR_CFG_0_18MBS, value);
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rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
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rt2800_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
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rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_1, ®);
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rt2800_register_read(rt2x00dev, TX_PWR_CFG_1, ®);
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rt2x00_set_field32(®, TX_PWR_CFG_1_24MBS, value);
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rt2x00_set_field32(®, TX_PWR_CFG_1_36MBS, value);
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rt2x00_set_field32(®, TX_PWR_CFG_1_48MBS, value);
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@ -896,9 +896,9 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, TX_PWR_CFG_1_MCS1, value);
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rt2x00_set_field32(®, TX_PWR_CFG_1_MCS2, value);
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rt2x00_set_field32(®, TX_PWR_CFG_1_MCS3, value);
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rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
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rt2800_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
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rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_2, ®);
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rt2800_register_read(rt2x00dev, TX_PWR_CFG_2, ®);
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rt2x00_set_field32(®, TX_PWR_CFG_2_MCS4, value);
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rt2x00_set_field32(®, TX_PWR_CFG_2_MCS5, value);
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rt2x00_set_field32(®, TX_PWR_CFG_2_MCS6, value);
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@ -907,9 +907,9 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, TX_PWR_CFG_2_MCS9, value);
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rt2x00_set_field32(®, TX_PWR_CFG_2_MCS10, value);
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rt2x00_set_field32(®, TX_PWR_CFG_2_MCS11, value);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_3, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_PWR_CFG_3, ®);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_3_MCS12, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_3_MCS13, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_3_MCS14, value);
|
||||
@ -918,14 +918,14 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_3_UKNOWN2, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_3_UKNOWN3, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_3_UKNOWN4, value);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_4, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_PWR_CFG_4, ®);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_4_UKNOWN5, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_4_UKNOWN6, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_4_UKNOWN7, value);
|
||||
rt2x00_set_field32(®, TX_PWR_CFG_4_UKNOWN8, value);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
|
||||
}
|
||||
|
||||
static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
|
||||
@ -933,7 +933,7 @@ static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_RTY_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_RTY_CFG, ®);
|
||||
rt2x00_set_field32(®, TX_RTY_CFG_SHORT_RTY_LIMIT,
|
||||
libconf->conf->short_frame_max_tx_count);
|
||||
rt2x00_set_field32(®, TX_RTY_CFG_LONG_RTY_LIMIT,
|
||||
@ -942,7 +942,7 @@ static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_set_field32(®, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
|
||||
rt2x00_set_field32(®, TX_RTY_CFG_AGG_RTY_MODE, 0);
|
||||
rt2x00_set_field32(®, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_RTY_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
|
||||
}
|
||||
|
||||
static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
|
||||
@ -954,24 +954,24 @@ static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
|
||||
u32 reg;
|
||||
|
||||
if (state == STATE_SLEEP) {
|
||||
rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
|
||||
rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, ®);
|
||||
rt2x00_set_field32(®, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
|
||||
rt2x00_set_field32(®, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
|
||||
libconf->conf->listen_interval - 1);
|
||||
rt2x00_set_field32(®, AUTOWAKEUP_CFG_AUTOWAKE, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
|
||||
|
||||
rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
|
||||
} else {
|
||||
rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, ®);
|
||||
rt2x00_set_field32(®, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
|
||||
rt2x00_set_field32(®, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
|
||||
rt2x00_set_field32(®, AUTOWAKEUP_CFG_AUTOWAKE, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1004,7 +1004,7 @@ static void rt2800usb_link_stats(struct rt2x00_dev *rt2x00dev,
|
||||
/*
|
||||
* Update FCS error count from register.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, ®);
|
||||
rt2800_register_read(rt2x00dev, RX_STA_CNT0, ®);
|
||||
qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
|
||||
}
|
||||
|
||||
@ -1162,7 +1162,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
|
||||
* Wait for stable hardware.
|
||||
*/
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
if (reg && reg != ~0)
|
||||
break;
|
||||
msleep(1);
|
||||
@ -1182,8 +1182,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
|
||||
data + offset, length,
|
||||
REGISTER_TIMEOUT32(length));
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
|
||||
rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
|
||||
rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
|
||||
|
||||
/*
|
||||
* Send firmware request to device to load firmware,
|
||||
@ -1198,7 +1198,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
|
||||
}
|
||||
|
||||
msleep(10);
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
|
||||
rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
|
||||
|
||||
/*
|
||||
* Send signal to firmware during boot time.
|
||||
@ -1217,7 +1217,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
|
||||
* Wait for device to stabilize.
|
||||
*/
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, ®);
|
||||
rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, ®);
|
||||
if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
|
||||
break;
|
||||
msleep(1);
|
||||
@ -1231,8 +1231,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
|
||||
/*
|
||||
* Initialize firmware.
|
||||
*/
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
|
||||
rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
|
||||
rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
|
||||
msleep(1);
|
||||
|
||||
return 0;
|
||||
@ -1250,7 +1250,7 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
* Wait untill BBP and RF are ready.
|
||||
*/
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
if (reg && reg != ~0)
|
||||
break;
|
||||
msleep(1);
|
||||
@ -1261,59 +1261,59 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, ®);
|
||||
rt2x00usb_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
|
||||
rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, ®);
|
||||
rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_CSR, 1);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
|
||||
|
||||
rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
|
||||
USB_MODE_RESET, REGISTER_TIMEOUT);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_OFFSET0, ®);
|
||||
rt2800_register_read(rt2x00dev, BCN_OFFSET0, ®);
|
||||
rt2x00_set_field32(®, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
|
||||
rt2x00_set_field32(®, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
|
||||
rt2x00_set_field32(®, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
|
||||
rt2x00_set_field32(®, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
|
||||
rt2x00usb_register_write(rt2x00dev, BCN_OFFSET0, reg);
|
||||
rt2800_register_write(rt2x00dev, BCN_OFFSET0, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_OFFSET1, ®);
|
||||
rt2800_register_read(rt2x00dev, BCN_OFFSET1, ®);
|
||||
rt2x00_set_field32(®, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
|
||||
rt2x00_set_field32(®, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
|
||||
rt2x00_set_field32(®, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
|
||||
rt2x00_set_field32(®, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
|
||||
rt2x00usb_register_write(rt2x00dev, BCN_OFFSET1, reg);
|
||||
rt2800_register_write(rt2x00dev, BCN_OFFSET1, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
|
||||
rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
|
||||
rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
|
||||
rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_INTERVAL, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TSF_SYNC, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
|
||||
|
||||
if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
|
||||
rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
|
||||
} else {
|
||||
rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
|
||||
}
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_LINK_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_LINK_CFG, ®);
|
||||
rt2x00_set_field32(®, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
|
||||
rt2x00_set_field32(®, TX_LINK_CFG_MFB_ENABLE, 0);
|
||||
rt2x00_set_field32(®, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
|
||||
@ -1322,14 +1322,14 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, TX_LINK_CFG_TX_CF_ACK_EN, 1);
|
||||
rt2x00_set_field32(®, TX_LINK_CFG_REMOTE_MFB, 0);
|
||||
rt2x00_set_field32(®, TX_LINK_CFG_REMOTE_MFS, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_LINK_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_LINK_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, ®);
|
||||
rt2x00_set_field32(®, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
|
||||
rt2x00_set_field32(®, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAX_LEN_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, MAX_LEN_CFG, ®);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
|
||||
if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
|
||||
rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
|
||||
@ -1338,19 +1338,19 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 1);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MIN_PSDU, 0);
|
||||
rt2x00_set_field32(®, MAX_LEN_CFG_MIN_MPDU, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, MAX_LEN_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
|
||||
rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
|
||||
rt2x00_set_field32(®, AUTO_RSP_CFG_AUTORESPONDER, 1);
|
||||
rt2x00_set_field32(®, AUTO_RSP_CFG_CTS_40_MMODE, 0);
|
||||
rt2x00_set_field32(®, AUTO_RSP_CFG_CTS_40_MREF, 0);
|
||||
rt2x00_set_field32(®, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
|
||||
rt2x00_set_field32(®, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_RATE, 8);
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_CTRL, 0);
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_NAV, 1);
|
||||
@ -1360,9 +1360,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_RATE, 8);
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_CTRL, 0);
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_NAV, 1);
|
||||
@ -1372,9 +1372,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_PROTECT_CTRL, 0);
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_PROTECT_NAV, 1);
|
||||
@ -1384,9 +1384,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_PROTECT_CTRL, 0);
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_PROTECT_NAV, 1);
|
||||
@ -1396,9 +1396,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_PROTECT_CTRL, 0);
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_PROTECT_NAV, 1);
|
||||
@ -1408,9 +1408,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_PROTECT_CTRL, 0);
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_PROTECT_NAV, 1);
|
||||
@ -1420,11 +1420,11 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, PBF_CFG, 0xf40006);
|
||||
rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
|
||||
@ -1434,26 +1434,26 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
|
||||
rt2x00usb_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
|
||||
rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
|
||||
rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
||||
rt2x00_set_field32(®, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
|
||||
rt2x00_set_field32(®, TX_RTS_CFG_RTS_THRES,
|
||||
IEEE80211_MAX_RTS_THRESHOLD);
|
||||
rt2x00_set_field32(®, TX_RTS_CFG_RTS_FBK_EN, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
|
||||
rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
|
||||
rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
|
||||
rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
|
||||
|
||||
/*
|
||||
* ASIC will keep garbage value after boot, clear encryption keys.
|
||||
*/
|
||||
for (i = 0; i < 4; i++)
|
||||
rt2x00usb_register_write(rt2x00dev,
|
||||
rt2800_register_write(rt2x00dev,
|
||||
SHARED_KEY_MODE_ENTRY(i), 0);
|
||||
|
||||
for (i = 0; i < 256; i++) {
|
||||
@ -1461,8 +1461,8 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00usb_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
|
||||
wcid, sizeof(wcid));
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
|
||||
rt2800_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
|
||||
rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1471,20 +1471,20 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
* the first byte since that byte contains the VALID and OWNER
|
||||
* bits which (when set to 0) will invalidate the entire beacon.
|
||||
*/
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
|
||||
rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, USB_CYC_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, USB_CYC_CFG, ®);
|
||||
rt2x00_set_field32(®, USB_CYC_CFG_CLOCK_CYCLE, 30);
|
||||
rt2x00usb_register_write(rt2x00dev, USB_CYC_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG0, ®);
|
||||
rt2800_register_read(rt2x00dev, HT_FBK_CFG0, ®);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG0_HTMCS0FBK, 0);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG0_HTMCS1FBK, 0);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG0_HTMCS2FBK, 1);
|
||||
@ -1493,9 +1493,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, HT_FBK_CFG0_HTMCS5FBK, 4);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG0_HTMCS6FBK, 5);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG0_HTMCS7FBK, 6);
|
||||
rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG0, reg);
|
||||
rt2800_register_write(rt2x00dev, HT_FBK_CFG0, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG1, ®);
|
||||
rt2800_register_read(rt2x00dev, HT_FBK_CFG1, ®);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG1_HTMCS8FBK, 8);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG1_HTMCS9FBK, 8);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG1_HTMCS10FBK, 9);
|
||||
@ -1504,9 +1504,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, HT_FBK_CFG1_HTMCS13FBK, 12);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG1_HTMCS14FBK, 13);
|
||||
rt2x00_set_field32(®, HT_FBK_CFG1_HTMCS15FBK, 14);
|
||||
rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG1, reg);
|
||||
rt2800_register_write(rt2x00dev, HT_FBK_CFG1, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG0, ®);
|
||||
rt2800_register_read(rt2x00dev, LG_FBK_CFG0, ®);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS0FBK, 8);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS1FBK, 8);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS2FBK, 9);
|
||||
@ -1515,26 +1515,26 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS5FBK, 12);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS6FBK, 13);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS7FBK, 14);
|
||||
rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG0, reg);
|
||||
rt2800_register_write(rt2x00dev, LG_FBK_CFG0, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG1, ®);
|
||||
rt2800_register_read(rt2x00dev, LG_FBK_CFG1, ®);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_CCKMCS0FBK, 0);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_CCKMCS1FBK, 0);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_CCKMCS2FBK, 1);
|
||||
rt2x00_set_field32(®, LG_FBK_CFG0_CCKMCS3FBK, 2);
|
||||
rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG1, reg);
|
||||
rt2800_register_write(rt2x00dev, LG_FBK_CFG1, reg);
|
||||
|
||||
/*
|
||||
* We must clear the error counters.
|
||||
* These registers are cleared on read,
|
||||
* so we may pass a useless variable to store the value.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, RX_STA_CNT1, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, RX_STA_CNT2, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, TX_STA_CNT0, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, TX_STA_CNT1, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, TX_STA_CNT2, ®);
|
||||
rt2800_register_read(rt2x00dev, RX_STA_CNT0, ®);
|
||||
rt2800_register_read(rt2x00dev, RX_STA_CNT1, ®);
|
||||
rt2800_register_read(rt2x00dev, RX_STA_CNT2, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_STA_CNT0, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_STA_CNT1, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_STA_CNT2, ®);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1545,7 +1545,7 @@ static int rt2800usb_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
|
||||
u32 reg;
|
||||
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_STATUS_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_STATUS_CFG, ®);
|
||||
if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
|
||||
return 0;
|
||||
|
||||
@ -1565,8 +1565,8 @@ static int rt2800usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
|
||||
* BBP was enabled after firmware was loaded,
|
||||
* but we need to reactivate it now.
|
||||
*/
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
|
||||
rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
|
||||
rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
|
||||
msleep(1);
|
||||
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
@ -1768,11 +1768,11 @@ static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX,
|
||||
(state == STATE_RADIO_RX_ON) ||
|
||||
(state == STATE_RADIO_RX_ON_LINK));
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
}
|
||||
|
||||
static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
|
||||
@ -1781,7 +1781,7 @@ static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
|
||||
u32 reg;
|
||||
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
|
||||
!rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
|
||||
return 0;
|
||||
@ -1807,20 +1807,20 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
|
||||
rt2800usb_init_rfcsr(rt2x00dev)))
|
||||
return -EIO;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_TX, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
|
||||
udelay(50);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
|
||||
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, USB_DMA_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, USB_DMA_CFG, ®);
|
||||
rt2x00_set_field32(®, USB_DMA_CFG_PHY_CLEAR, 0);
|
||||
/* Don't use bulk in aggregation when working with USB 1.1 */
|
||||
rt2x00_set_field32(®, USB_DMA_CFG_RX_BULK_AGG_EN,
|
||||
@ -1834,12 +1834,12 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
|
||||
((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3);
|
||||
rt2x00_set_field32(®, USB_DMA_CFG_RX_BULK_EN, 1);
|
||||
rt2x00_set_field32(®, USB_DMA_CFG_TX_BULK_EN, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, USB_DMA_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_TX, 1);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
|
||||
/*
|
||||
* Initialize LED control
|
||||
@ -1863,14 +1863,14 @@ static void rt2800usb_disable_radio(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
|
||||
rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
|
||||
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, 0);
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
|
||||
rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
|
||||
rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
|
||||
|
||||
/* Wait for DMA, ignore error */
|
||||
rt2800usb_wait_wpdma_ready(rt2x00dev);
|
||||
@ -2038,9 +2038,9 @@ static void rt2800usb_write_beacon(struct queue_entry *entry)
|
||||
* Disable beaconing while we are reloading the beacon data,
|
||||
* otherwise we might be sending out invalid data.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
|
||||
|
||||
/*
|
||||
* Write entire beacon with descriptor to register.
|
||||
@ -2083,12 +2083,12 @@ static void rt2800usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
|
||||
return;
|
||||
}
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2316,7 +2316,7 @@ static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
||||
* Identify RF chipset.
|
||||
*/
|
||||
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
rt2800_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
rt2x00_set_chip(rt2x00dev, RT2870, value, reg);
|
||||
|
||||
/*
|
||||
@ -2659,33 +2659,33 @@ static int rt2800usb_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
|
||||
u32 reg;
|
||||
bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
||||
rt2x00_set_field32(®, TX_RTS_CFG_RTS_THRES, value);
|
||||
rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, CCK_PROT_CFG_RTS_TH_EN, enabled);
|
||||
rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, OFDM_PROT_CFG_RTS_TH_EN, enabled);
|
||||
rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, MM20_PROT_CFG_RTS_TH_EN, enabled);
|
||||
rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, MM40_PROT_CFG_RTS_TH_EN, enabled);
|
||||
rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, GF20_PROT_CFG_RTS_TH_EN, enabled);
|
||||
rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
||||
rt2x00_set_field32(®, GF40_PROT_CFG_RTS_TH_EN, enabled);
|
||||
rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -2724,35 +2724,35 @@ static int rt2800usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
|
||||
field.bit_offset = (queue_idx & 1) * 16;
|
||||
field.bit_mask = 0xffff << field.bit_offset;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, offset, ®);
|
||||
rt2800_register_read(rt2x00dev, offset, ®);
|
||||
rt2x00_set_field32(®, field, queue->txop);
|
||||
rt2x00usb_register_write(rt2x00dev, offset, reg);
|
||||
rt2800_register_write(rt2x00dev, offset, reg);
|
||||
|
||||
/* Update WMM registers */
|
||||
field.bit_offset = queue_idx * 4;
|
||||
field.bit_mask = 0xf << field.bit_offset;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, WMM_AIFSN_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, ®);
|
||||
rt2x00_set_field32(®, field, queue->aifs);
|
||||
rt2x00usb_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, WMM_CWMIN_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, ®);
|
||||
rt2x00_set_field32(®, field, queue->cw_min);
|
||||
rt2x00usb_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, WMM_CWMAX_CFG, ®);
|
||||
rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, ®);
|
||||
rt2x00_set_field32(®, field, queue->cw_max);
|
||||
rt2x00usb_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
|
||||
rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
|
||||
|
||||
/* Update EDCA registers */
|
||||
offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, offset, ®);
|
||||
rt2800_register_read(rt2x00dev, offset, ®);
|
||||
rt2x00_set_field32(®, EDCA_AC0_CFG_TX_OP, queue->txop);
|
||||
rt2x00_set_field32(®, EDCA_AC0_CFG_AIFSN, queue->aifs);
|
||||
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMIN, queue->cw_min);
|
||||
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMAX, queue->cw_max);
|
||||
rt2x00usb_register_write(rt2x00dev, offset, reg);
|
||||
rt2800_register_write(rt2x00dev, offset, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -2763,9 +2763,9 @@ static u64 rt2800usb_get_tsf(struct ieee80211_hw *hw)
|
||||
u64 tsf;
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW1, ®);
|
||||
rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, ®);
|
||||
tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
|
||||
rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW0, ®);
|
||||
rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, ®);
|
||||
tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
|
||||
|
||||
return tsf;
|
||||
|
@ -27,6 +27,27 @@
|
||||
#ifndef RT2800USB_H
|
||||
#define RT2800USB_H
|
||||
|
||||
static inline void rt2800_register_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 *value)
|
||||
{
|
||||
rt2x00usb_register_read(rt2x00dev, offset, value);
|
||||
}
|
||||
|
||||
static inline void rt2800_register_write(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 value)
|
||||
{
|
||||
rt2x00usb_register_write(rt2x00dev, offset, value);
|
||||
}
|
||||
|
||||
static inline void rt2800_register_write_lock(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 value)
|
||||
{
|
||||
rt2x00usb_register_write_lock(rt2x00dev, offset, value);
|
||||
}
|
||||
|
||||
/*
|
||||
* RF chip defines.
|
||||
*
|
||||
|
Loading…
Reference in New Issue
Block a user