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gma500: Add the base elements of CDV hotplug support
Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -462,13 +462,48 @@ static void cdv_get_core_freq(struct drm_device *dev)
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}
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}
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static void cdv_hotplug_work_func(struct work_struct *work)
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{
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struct drm_psb_private *dev_priv = container_of(work, struct drm_psb_private,
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hotplug_work);
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struct drm_device *dev = dev_priv->dev;
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/* Just fire off a uevent and let userspace tell us what to do */
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drm_helper_hpd_irq_event(dev);
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}
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/* The core driver has received a hotplug IRQ. We are in IRQ context
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so extract the needed information and kick off queued processing */
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static int cdv_hotplug_event(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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schedule_work(&dev_priv->hotplug_work);
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REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
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return 1;
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}
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static void cdv_hotplug_enable(struct drm_device *dev, bool on)
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{
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if (on) {
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u32 hotplug = REG_READ(PORT_HOTPLUG_EN);
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hotplug |= HDMIB_HOTPLUG_INT_EN | HDMIC_HOTPLUG_INT_EN |
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HDMID_HOTPLUG_INT_EN | CRT_HOTPLUG_INT_EN;
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REG_WRITE(PORT_HOTPLUG_EN, hotplug);
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} else {
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REG_WRITE(PORT_HOTPLUG_EN, 0);
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REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
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}
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}
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static int cdv_chip_setup(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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INIT_WORK(&dev_priv->hotplug_work, cdv_hotplug_work_func);
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cdv_get_core_freq(dev);
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gma_intel_opregion_init(dev);
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psb_intel_init_bios(dev);
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REG_WRITE(PORT_HOTPLUG_EN, 0);
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REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
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cdv_hotplug_enable(dev, false);
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return 0;
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}
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@ -489,6 +524,8 @@ const struct psb_ops cdv_chip_ops = {
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.crtc_funcs = &cdv_intel_crtc_funcs,
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.output_init = cdv_output_init,
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.hotplug = cdv_hotplug_event,
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.hotplug_enable = cdv_hotplug_enable,
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#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
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.backlight_init = cdv_backlight_init,
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@ -626,6 +626,11 @@ struct drm_psb_private {
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uint32_t msi_addr;
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uint32_t msi_data;
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/*
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* Hotplug handling
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*/
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struct work_struct hotplug_work;
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/*
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* LID-Switch
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@ -219,7 +219,7 @@
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#define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */
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#define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */
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#define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */
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#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
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#define DPLL_FPA0h1_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
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#define DPLL_LOCK (1 << 15) /* CDV */
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/*
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@ -346,6 +346,9 @@
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#define FP_M2_DIV_SHIFT 0
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#define PORT_HOTPLUG_EN 0x61110
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#define HDMIB_HOTPLUG_INT_EN (1 << 29)
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#define HDMIC_HOTPLUG_INT_EN (1 << 28)
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#define HDMID_HOTPLUG_INT_EN (1 << 27)
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#define SDVOB_HOTPLUG_INT_EN (1 << 26)
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#define SDVOC_HOTPLUG_INT_EN (1 << 25)
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#define TV_HOTPLUG_INT_EN (1 << 18)
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