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ASoC: rt5677: Support DSP function for VAD application
The ALC5677 has a programmable DSP, and there is a SPI that is dadicated for DSP firmware loading. Therefore, the patch includes a SPI driver for writing the DSP firmware. The VAD(Voice Activaty Detection) has be implemented and use the DSP to recognize the key phase. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Oder Chiou
Mark Brown
parent
40eb90a18e
commit
af48f1d08a
@ -79,7 +79,7 @@ snd-soc-rt5640-objs := rt5640.o
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snd-soc-rt5645-objs := rt5645.o
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snd-soc-rt5651-objs := rt5651.o
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snd-soc-rt5670-objs := rt5670.o
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snd-soc-rt5677-objs := rt5677.o
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snd-soc-rt5677-objs := rt5677.o rt5677-spi.o
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snd-soc-sgtl5000-objs := sgtl5000.o
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snd-soc-alc5623-objs := alc5623.o
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snd-soc-alc5632-objs := alc5632.o
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128
sound/soc/codecs/rt5677-spi.c
Normal file
128
sound/soc/codecs/rt5677-spi.c
Normal file
@ -0,0 +1,128 @@
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/*
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* rt5677-spi.c -- RT5677 ALSA SoC audio codec driver
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*
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* Copyright 2013 Realtek Semiconductor Corp.
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* Author: Oder Chiou <oder_chiou@realtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/input.h>
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#include <linux/spi/spi.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/slab.h>
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#include <linux/gpio.h>
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#include <linux/sched.h>
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#include <linux/kthread.h>
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#include <linux/uaccess.h>
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#include <linux/miscdevice.h>
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#include <linux/regulator/consumer.h>
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#include <linux/pm_qos.h>
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#include <linux/sysfs.h>
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#include <linux/clk.h>
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#include <linux/firmware.h>
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#include "rt5677-spi.h"
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static struct spi_device *g_spi;
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/**
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* rt5677_spi_write - Write data to SPI.
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* @txbuf: Data Buffer for writing.
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* @len: Data length.
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*
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*
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* Returns true for success.
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*/
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int rt5677_spi_write(u8 *txbuf, size_t len)
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{
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int status;
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status = spi_write(g_spi, txbuf, len);
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if (status)
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dev_err(&g_spi->dev, "rt5677_spi_write error %d\n", status);
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return status;
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}
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/**
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* rt5677_spi_burst_write - Write data to SPI by rt5677 dsp memory address.
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* @addr: Start address.
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* @txbuf: Data Buffer for writng.
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* @len: Data length, it must be a multiple of 8.
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*
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*
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* Returns true for success.
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*/
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int rt5677_spi_burst_write(u32 addr, const struct firmware *fw)
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{
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u8 spi_cmd = RT5677_SPI_CMD_BURST_WRITE;
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u8 *write_buf;
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unsigned int i, end, offset = 0;
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write_buf = kmalloc(RT5677_SPI_BUF_LEN + 6, GFP_KERNEL);
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if (write_buf == NULL)
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return -ENOMEM;
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while (offset < fw->size) {
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if (offset + RT5677_SPI_BUF_LEN <= fw->size)
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end = RT5677_SPI_BUF_LEN;
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else
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end = fw->size % RT5677_SPI_BUF_LEN;
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write_buf[0] = spi_cmd;
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write_buf[1] = ((addr + offset) & 0xff000000) >> 24;
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write_buf[2] = ((addr + offset) & 0x00ff0000) >> 16;
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write_buf[3] = ((addr + offset) & 0x0000ff00) >> 8;
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write_buf[4] = ((addr + offset) & 0x000000ff) >> 0;
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for (i = 0; i < end; i += 8) {
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write_buf[i + 12] = fw->data[offset + i + 0];
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write_buf[i + 11] = fw->data[offset + i + 1];
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write_buf[i + 10] = fw->data[offset + i + 2];
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write_buf[i + 9] = fw->data[offset + i + 3];
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write_buf[i + 8] = fw->data[offset + i + 4];
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write_buf[i + 7] = fw->data[offset + i + 5];
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write_buf[i + 6] = fw->data[offset + i + 6];
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write_buf[i + 5] = fw->data[offset + i + 7];
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}
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write_buf[end + 5] = spi_cmd;
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rt5677_spi_write(write_buf, end + 6);
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offset += RT5677_SPI_BUF_LEN;
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}
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kfree(write_buf);
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return 0;
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}
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static int rt5677_spi_probe(struct spi_device *spi)
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{
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g_spi = spi;
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return 0;
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}
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static struct spi_driver rt5677_spi_driver = {
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.driver = {
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.name = "rt5677",
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.owner = THIS_MODULE,
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},
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.probe = rt5677_spi_probe,
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};
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module_spi_driver(rt5677_spi_driver);
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MODULE_DESCRIPTION("ASoC RT5677 SPI driver");
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MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
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MODULE_LICENSE("GPL v2");
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21
sound/soc/codecs/rt5677-spi.h
Normal file
21
sound/soc/codecs/rt5677-spi.h
Normal file
@ -0,0 +1,21 @@
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/*
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* rt5677-spi.h -- RT5677 ALSA SoC audio codec driver
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*
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* Copyright 2013 Realtek Semiconductor Corp.
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* Author: Oder Chiou <oder_chiou@realtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __RT5671_SPI_H__
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#define __RT5671_SPI_H__
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#define RT5677_SPI_BUF_LEN 240
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#define RT5677_SPI_CMD_BURST_WRITE 0x05
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int rt5677_spi_write(u8 *txbuf, size_t len);
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int rt5677_spi_burst_write(u32 addr, const struct firmware *fw);
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#endif /* __RT5677_SPI_H__ */
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@ -20,6 +20,7 @@
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/firmware.h>
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#include <linux/gpio.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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@ -31,6 +32,7 @@
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#include "rl6231.h"
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#include "rt5677.h"
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#include "rt5677-spi.h"
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#define RT5677_DEVICE_ID 0x6327
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@ -537,6 +539,243 @@ static bool rt5677_readable_register(struct device *dev, unsigned int reg)
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}
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}
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/**
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* rt5677_dsp_mode_i2c_write_addr - Write value to address on DSP mode.
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* @codec: SoC audio codec device.
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* @addr: Address index.
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* @value: Address data.
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*
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*
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* Returns 0 for success or negative error code.
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*/
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static int rt5677_dsp_mode_i2c_write_addr(struct snd_soc_codec *codec,
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unsigned int addr, unsigned int value, unsigned int opcode)
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{
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struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
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int ret;
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mutex_lock(&rt5677->dsp_cmd_lock);
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_ADDR_MSB, addr >> 16);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set addr msb value: %d\n", ret);
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goto err;
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}
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_ADDR_LSB,
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addr & 0xffff);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set addr lsb value: %d\n", ret);
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goto err;
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}
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_DATA_MSB,
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value >> 16);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set data msb value: %d\n", ret);
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goto err;
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}
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_DATA_LSB,
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value & 0xffff);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set data lsb value: %d\n", ret);
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goto err;
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}
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_OP_CODE, opcode);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set op code value: %d\n", ret);
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goto err;
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}
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err:
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mutex_unlock(&rt5677->dsp_cmd_lock);
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return ret;
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}
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/**
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* rt5677_dsp_mode_i2c_read_addr - Read value from address on DSP mode.
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* @codec: SoC audio codec device.
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* @addr: Address index.
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* @value: Address data.
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*
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* Returns 0 for success or negative error code.
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*/
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static int rt5677_dsp_mode_i2c_read_addr(
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struct snd_soc_codec *codec, unsigned int addr, unsigned int *value)
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{
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struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
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int ret;
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unsigned int msb, lsb;
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mutex_lock(&rt5677->dsp_cmd_lock);
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_ADDR_MSB, addr >> 16);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set addr msb value: %d\n", ret);
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goto err;
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}
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_ADDR_LSB,
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addr & 0xffff);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set addr lsb value: %d\n", ret);
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goto err;
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}
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ret = regmap_write(rt5677->regmap, RT5677_DSP_I2C_OP_CODE , 0x0002);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set op code value: %d\n", ret);
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goto err;
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}
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regmap_read(rt5677->regmap, RT5677_DSP_I2C_DATA_MSB, &msb);
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regmap_read(rt5677->regmap, RT5677_DSP_I2C_DATA_LSB, &lsb);
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*value = (msb << 16) | lsb;
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err:
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mutex_unlock(&rt5677->dsp_cmd_lock);
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return ret;
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}
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/**
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* rt5677_dsp_mode_i2c_write - Write register on DSP mode.
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* @codec: SoC audio codec device.
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* @reg: Register index.
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* @value: Register data.
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*
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*
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* Returns 0 for success or negative error code.
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*/
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static int rt5677_dsp_mode_i2c_write(struct snd_soc_codec *codec,
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unsigned int reg, unsigned int value)
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{
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return rt5677_dsp_mode_i2c_write_addr(codec, 0x18020000 + reg * 2,
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value, 0x0001);
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}
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/**
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* rt5677_dsp_mode_i2c_read - Read register on DSP mode.
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* @codec: SoC audio codec device.
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* @reg: Register index.
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*
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*
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* Returns Register value.
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*/
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static unsigned int rt5677_dsp_mode_i2c_read(
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struct snd_soc_codec *codec, unsigned int reg)
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{
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unsigned int value = 0;
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rt5677_dsp_mode_i2c_read_addr(codec, 0x18020000 + reg * 2, &value);
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return value;
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}
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/**
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* rt5677_dsp_mode_i2c_update_bits - update register on DSP mode.
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* @codec: audio codec
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* @reg: register index.
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* @mask: register mask
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* @value: new value
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*
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*
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* Returns 1 for change, 0 for no change, or negative error code.
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*/
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static int rt5677_dsp_mode_i2c_update_bits(struct snd_soc_codec *codec,
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unsigned int reg, unsigned int mask, unsigned int value)
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{
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unsigned int old, new;
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int change, ret;
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ret = rt5677_dsp_mode_i2c_read(codec, reg);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to read reg: %d\n", ret);
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goto err;
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}
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old = ret;
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new = (old & ~mask) | (value & mask);
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change = old != new;
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if (change) {
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ret = rt5677_dsp_mode_i2c_write(codec, reg, new);
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if (ret < 0) {
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dev_err(codec->dev,
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"Failed to write reg: %d\n", ret);
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goto err;
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}
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}
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return change;
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err:
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return ret;
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}
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static int rt5677_set_dsp_vad(struct snd_soc_codec *codec, bool on)
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{
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struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
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static bool activity;
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int ret;
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if (on && !activity) {
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activity = true;
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regcache_cache_only(rt5677->regmap, false);
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regcache_cache_bypass(rt5677->regmap, true);
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regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x1);
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regmap_update_bits(rt5677->regmap,
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RT5677_PR_BASE + RT5677_BIAS_CUR4, 0x0f00, 0x0f00);
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regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,
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RT5677_LDO1_SEL_MASK, 0x0);
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regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
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RT5677_PWR_LDO1, RT5677_PWR_LDO1);
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regmap_write(rt5677->regmap, RT5677_GLB_CLK2, 0x0080);
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regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x07ff);
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regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x07ff);
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ret = request_firmware(&rt5677->fw1, RT5677_FIRMWARE1,
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codec->dev);
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if (ret == 0) {
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rt5677_spi_burst_write(0x50000000, rt5677->fw1);
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release_firmware(rt5677->fw1);
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}
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ret = request_firmware(&rt5677->fw2, RT5677_FIRMWARE2,
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codec->dev);
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if (ret == 0) {
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rt5677_spi_burst_write(0x60000000, rt5677->fw2);
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release_firmware(rt5677->fw2);
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}
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rt5677_dsp_mode_i2c_update_bits(codec, RT5677_PWR_DSP1, 0x1,
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0x0);
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regcache_cache_bypass(rt5677->regmap, false);
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regcache_cache_only(rt5677->regmap, true);
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} else if (!on && activity) {
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activity = false;
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regcache_cache_only(rt5677->regmap, false);
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regcache_cache_bypass(rt5677->regmap, true);
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rt5677_dsp_mode_i2c_update_bits(codec, RT5677_PWR_DSP1, 0x1,
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0x1);
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rt5677_dsp_mode_i2c_write(codec, RT5677_PWR_DSP1, 0x0001);
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regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);
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regcache_cache_bypass(rt5677->regmap, false);
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regcache_mark_dirty(rt5677->regmap);
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regcache_sync(rt5677->regmap);
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}
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return 0;
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}
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static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
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static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
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static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
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@ -556,6 +795,31 @@ static unsigned int bst_tlv[] = {
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8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
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};
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static int rt5677_dsp_vad_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
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ucontrol->value.integer.value[0] = rt5677->dsp_vad_en;
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return 0;
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}
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|
||||
static int rt5677_dsp_vad_put(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
||||
struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
rt5677->dsp_vad_en = !!ucontrol->value.integer.value[0];
|
||||
|
||||
if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
|
||||
rt5677_set_dsp_vad(codec, rt5677->dsp_vad_en);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_kcontrol_new rt5677_snd_controls[] = {
|
||||
/* OUTPUT Control */
|
||||
SOC_SINGLE("OUT1 Playback Switch", RT5677_LOUT1,
|
||||
@ -627,6 +891,9 @@ static const struct snd_kcontrol_new rt5677_snd_controls[] = {
|
||||
SOC_DOUBLE_TLV("Mono ADC Boost Volume", RT5677_ADC_BST_CTRL2,
|
||||
RT5677_MONO_ADC_L_BST_SFT, RT5677_MONO_ADC_R_BST_SFT, 3, 0,
|
||||
adc_bst_tlv),
|
||||
|
||||
SOC_SINGLE_EXT("DSP VAD Switch", SND_SOC_NOPM, 0, 1, 0,
|
||||
rt5677_dsp_vad_get, rt5677_dsp_vad_put),
|
||||
};
|
||||
|
||||
/**
|
||||
@ -3181,6 +3448,8 @@ static int rt5677_set_bias_level(struct snd_soc_codec *codec,
|
||||
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
|
||||
rt5677_set_dsp_vad(codec, false);
|
||||
|
||||
regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,
|
||||
RT5677_LDO1_SEL_MASK | RT5677_LDO2_SEL_MASK,
|
||||
0x0055);
|
||||
@ -3214,6 +3483,9 @@ static int rt5677_set_bias_level(struct snd_soc_codec *codec,
|
||||
regmap_write(rt5677->regmap, RT5677_PWR_ANLG2, 0x0000);
|
||||
regmap_update_bits(rt5677->regmap,
|
||||
RT5677_PR_BASE + RT5677_BIAS_CUR4, 0x0f00, 0x0000);
|
||||
|
||||
if (rt5677->dsp_vad_en)
|
||||
rt5677_set_dsp_vad(codec, true);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -3407,6 +3679,8 @@ static int rt5677_probe(struct snd_soc_codec *codec)
|
||||
for (i = 0; i < RT5677_GPIO_NUM; i++)
|
||||
rt5677_gpio_config(rt5677, i, rt5677->pdata.gpio_config[i]);
|
||||
|
||||
mutex_init(&rt5677->dsp_cmd_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -3426,8 +3700,11 @@ static int rt5677_suspend(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
regcache_cache_only(rt5677->regmap, true);
|
||||
regcache_mark_dirty(rt5677->regmap);
|
||||
if (!rt5677->dsp_vad_en) {
|
||||
regcache_cache_only(rt5677->regmap, true);
|
||||
regcache_mark_dirty(rt5677->regmap);
|
||||
}
|
||||
|
||||
if (gpio_is_valid(rt5677->pow_ldo2))
|
||||
gpio_set_value_cansleep(rt5677->pow_ldo2, 0);
|
||||
|
||||
@ -3442,8 +3719,11 @@ static int rt5677_resume(struct snd_soc_codec *codec)
|
||||
gpio_set_value_cansleep(rt5677->pow_ldo2, 1);
|
||||
msleep(10);
|
||||
}
|
||||
regcache_cache_only(rt5677->regmap, false);
|
||||
regcache_sync(rt5677->regmap);
|
||||
|
||||
if (!rt5677->dsp_vad_en) {
|
||||
regcache_cache_only(rt5677->regmap, false);
|
||||
regcache_sync(rt5677->regmap);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1507,6 +1507,9 @@
|
||||
#define RT5677_GPIO5_FUNC_GPIO (0x0 << 9)
|
||||
#define RT5677_GPIO5_FUNC_DMIC (0x1 << 9)
|
||||
|
||||
#define RT5677_FIRMWARE1 "rt5677_dsp_fw1.bin"
|
||||
#define RT5677_FIRMWARE2 "rt5677_dsp_fw2.bin"
|
||||
|
||||
/* System Clock Source */
|
||||
enum {
|
||||
RT5677_SCLK_S_MCLK,
|
||||
@ -1546,6 +1549,8 @@ struct rt5677_priv {
|
||||
struct snd_soc_codec *codec;
|
||||
struct rt5677_platform_data pdata;
|
||||
struct regmap *regmap;
|
||||
const struct firmware *fw1, *fw2;
|
||||
struct mutex dsp_cmd_lock;
|
||||
|
||||
int sysclk;
|
||||
int sysclk_src;
|
||||
@ -1559,6 +1564,7 @@ struct rt5677_priv {
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
struct gpio_chip gpio_chip;
|
||||
#endif
|
||||
bool dsp_vad_en;
|
||||
};
|
||||
|
||||
#endif /* __RT5677_H__ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user