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nvme-pci: add module parameter for io queue depth
Adjust io queue depth more easily, and make sure io queue depth >= 2. Signed-off-by: weiping zhang <zhangweiping@didichuxing.com> Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
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@ -35,7 +35,6 @@
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#include "nvme.h"
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#define NVME_Q_DEPTH 1024
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#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
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#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
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@ -57,6 +56,16 @@ module_param(max_host_mem_size_mb, uint, 0444);
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MODULE_PARM_DESC(max_host_mem_size_mb,
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"Maximum Host Memory Buffer (HMB) size per controller (in MiB)");
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static int io_queue_depth_set(const char *val, const struct kernel_param *kp);
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static const struct kernel_param_ops io_queue_depth_ops = {
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.set = io_queue_depth_set,
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.get = param_get_int,
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};
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static int io_queue_depth = 1024;
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module_param_cb(io_queue_depth, &io_queue_depth_ops, &io_queue_depth, 0644);
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MODULE_PARM_DESC(io_queue_depth, "set io queue depth, should >= 2");
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struct nvme_dev;
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struct nvme_queue;
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@ -104,6 +113,17 @@ struct nvme_dev {
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void **host_mem_desc_bufs;
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};
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static int io_queue_depth_set(const char *val, const struct kernel_param *kp)
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{
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int n = 0, ret;
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ret = kstrtoint(val, 10, &n);
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if (ret != 0 || n < 2)
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return -EINVAL;
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return param_set_int(val, kp);
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}
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static inline unsigned int sq_idx(unsigned int qid, u32 stride)
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{
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return qid * 2 * stride;
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@ -1893,7 +1913,7 @@ static int nvme_pci_enable(struct nvme_dev *dev)
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dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP);
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dev->q_depth = min_t(int, NVME_CAP_MQES(dev->ctrl.cap) + 1,
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NVME_Q_DEPTH);
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io_queue_depth);
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dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap);
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dev->dbs = dev->bar + 4096;
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