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https://github.com/FEX-Emu/linux.git
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spi: omap2-mcspi: Switch driver to use transfer_one
Switches from transfer_one_message to transfer_one to prepare driver for use of GPIO chip selects. Signed-off-by: Michael Welling <mwelling@ieee.org> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Michael Welling
Mark Brown
parent
7d76980242
commit
b28cb9414d
@ -1052,7 +1052,8 @@ static void omap2_mcspi_cleanup(struct spi_device *spi)
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}
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}
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static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m)
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static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi,
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struct spi_device *spi, struct spi_transfer *t)
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{
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/* We only enable one channel at a time -- the one whose message is
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@ -1062,8 +1063,6 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m)
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* chipselect with the FORCE bit ... CS != channel enable.
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*/
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struct spi_device *spi;
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struct spi_transfer *t = NULL;
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struct spi_master *master;
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struct omap2_mcspi_dma *mcspi_dma;
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int cs_active = 0;
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@ -1073,7 +1072,6 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m)
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int status = 0;
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u32 chconf;
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spi = m->spi;
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master = spi->master;
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mcspi_dma = mcspi->dma_channels + spi->chip_select;
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cs = spi->controller_state;
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@ -1090,94 +1088,89 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m)
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par_override = 1;
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omap2_mcspi_set_enable(spi, 0);
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list_for_each_entry(t, &m->transfers, transfer_list) {
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if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
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status = -EINVAL;
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break;
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}
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if (par_override ||
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(t->speed_hz != spi->max_speed_hz) ||
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(t->bits_per_word != spi->bits_per_word)) {
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par_override = 1;
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status = omap2_mcspi_setup_transfer(spi, t);
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if (status < 0)
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break;
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if (t->speed_hz == spi->max_speed_hz &&
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t->bits_per_word == spi->bits_per_word)
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par_override = 0;
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}
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if (cd && cd->cs_per_word) {
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chconf = mcspi->ctx.modulctrl;
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chconf &= ~OMAP2_MCSPI_MODULCTRL_SINGLE;
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mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, chconf);
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mcspi->ctx.modulctrl =
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mcspi_read_cs_reg(spi, OMAP2_MCSPI_MODULCTRL);
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}
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if (!cs_active) {
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omap2_mcspi_force_cs(spi, 1);
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cs_active = 1;
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}
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chconf = mcspi_cached_chconf0(spi);
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chconf &= ~OMAP2_MCSPI_CHCONF_TRM_MASK;
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chconf &= ~OMAP2_MCSPI_CHCONF_TURBO;
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if (t->tx_buf == NULL)
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chconf |= OMAP2_MCSPI_CHCONF_TRM_RX_ONLY;
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else if (t->rx_buf == NULL)
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chconf |= OMAP2_MCSPI_CHCONF_TRM_TX_ONLY;
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if (cd && cd->turbo_mode && t->tx_buf == NULL) {
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/* Turbo mode is for more than one word */
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if (t->len > ((cs->word_len + 7) >> 3))
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chconf |= OMAP2_MCSPI_CHCONF_TURBO;
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}
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mcspi_write_chconf0(spi, chconf);
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if (t->len) {
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unsigned count;
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if ((mcspi_dma->dma_rx && mcspi_dma->dma_tx) &&
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(m->is_dma_mapped || t->len >= DMA_MIN_BYTES))
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omap2_mcspi_set_fifo(spi, t, 1);
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omap2_mcspi_set_enable(spi, 1);
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/* RX_ONLY mode needs dummy data in TX reg */
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if (t->tx_buf == NULL)
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writel_relaxed(0, cs->base
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+ OMAP2_MCSPI_TX0);
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if ((mcspi_dma->dma_rx && mcspi_dma->dma_tx) &&
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(m->is_dma_mapped || t->len >= DMA_MIN_BYTES))
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count = omap2_mcspi_txrx_dma(spi, t);
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else
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count = omap2_mcspi_txrx_pio(spi, t);
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m->actual_length += count;
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if (count != t->len) {
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status = -EIO;
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break;
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}
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}
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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/* ignore the "leave it on after last xfer" hint */
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if (t->cs_change) {
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omap2_mcspi_force_cs(spi, 0);
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cs_active = 0;
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}
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omap2_mcspi_set_enable(spi, 0);
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if (mcspi->fifo_depth > 0)
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omap2_mcspi_set_fifo(spi, t, 0);
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if (par_override ||
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(t->speed_hz != spi->max_speed_hz) ||
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(t->bits_per_word != spi->bits_per_word)) {
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par_override = 1;
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status = omap2_mcspi_setup_transfer(spi, t);
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if (status < 0)
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goto out;
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if (t->speed_hz == spi->max_speed_hz &&
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t->bits_per_word == spi->bits_per_word)
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par_override = 0;
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}
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if (cd && cd->cs_per_word) {
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chconf = mcspi->ctx.modulctrl;
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chconf &= ~OMAP2_MCSPI_MODULCTRL_SINGLE;
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mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, chconf);
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mcspi->ctx.modulctrl =
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mcspi_read_cs_reg(spi, OMAP2_MCSPI_MODULCTRL);
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}
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if (!cs_active) {
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omap2_mcspi_force_cs(spi, 1);
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cs_active = 1;
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}
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chconf = mcspi_cached_chconf0(spi);
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chconf &= ~OMAP2_MCSPI_CHCONF_TRM_MASK;
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chconf &= ~OMAP2_MCSPI_CHCONF_TURBO;
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if (t->tx_buf == NULL)
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chconf |= OMAP2_MCSPI_CHCONF_TRM_RX_ONLY;
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else if (t->rx_buf == NULL)
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chconf |= OMAP2_MCSPI_CHCONF_TRM_TX_ONLY;
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if (cd && cd->turbo_mode && t->tx_buf == NULL) {
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/* Turbo mode is for more than one word */
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if (t->len > ((cs->word_len + 7) >> 3))
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chconf |= OMAP2_MCSPI_CHCONF_TURBO;
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}
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mcspi_write_chconf0(spi, chconf);
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if (t->len) {
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unsigned count;
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if ((mcspi_dma->dma_rx && mcspi_dma->dma_tx) &&
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(t->len >= DMA_MIN_BYTES))
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omap2_mcspi_set_fifo(spi, t, 1);
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omap2_mcspi_set_enable(spi, 1);
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/* RX_ONLY mode needs dummy data in TX reg */
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if (t->tx_buf == NULL)
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writel_relaxed(0, cs->base
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+ OMAP2_MCSPI_TX0);
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if ((mcspi_dma->dma_rx && mcspi_dma->dma_tx) &&
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(t->len >= DMA_MIN_BYTES))
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count = omap2_mcspi_txrx_dma(spi, t);
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else
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count = omap2_mcspi_txrx_pio(spi, t);
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if (count != t->len) {
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status = -EIO;
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goto out;
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}
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}
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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/* ignore the "leave it on after last xfer" hint */
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if (t->cs_change) {
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omap2_mcspi_force_cs(spi, 0);
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cs_active = 0;
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}
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omap2_mcspi_set_enable(spi, 0);
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if (mcspi->fifo_depth > 0)
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omap2_mcspi_set_fifo(spi, t, 0);
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out:
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/* Restore defaults if they were overriden */
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if (par_override) {
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par_override = 0;
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@ -1200,75 +1193,58 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m)
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if (mcspi->fifo_depth > 0 && t)
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omap2_mcspi_set_fifo(spi, t, 0);
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m->status = status;
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return status;
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}
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static int omap2_mcspi_transfer_one_message(struct spi_master *master,
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struct spi_message *m)
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static int omap2_mcspi_transfer_one(struct spi_master *master,
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struct spi_device *spi, struct spi_transfer *t)
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{
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struct spi_device *spi;
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struct omap2_mcspi *mcspi;
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struct omap2_mcspi_dma *mcspi_dma;
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struct spi_transfer *t;
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int status;
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const void *tx_buf = t->tx_buf;
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void *rx_buf = t->rx_buf;
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unsigned len = t->len;
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spi = m->spi;
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mcspi = spi_master_get_devdata(master);
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mcspi_dma = mcspi->dma_channels + spi->chip_select;
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m->actual_length = 0;
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m->status = 0;
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list_for_each_entry(t, &m->transfers, transfer_list) {
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const void *tx_buf = t->tx_buf;
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void *rx_buf = t->rx_buf;
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unsigned len = t->len;
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if ((len && !(rx_buf || tx_buf))) {
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dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
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t->speed_hz,
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len,
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tx_buf ? "tx" : "",
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rx_buf ? "rx" : "",
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t->bits_per_word);
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return -EINVAL;
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}
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if ((len && !(rx_buf || tx_buf))) {
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dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
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t->speed_hz,
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len,
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tx_buf ? "tx" : "",
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rx_buf ? "rx" : "",
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t->bits_per_word);
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status = -EINVAL;
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goto out;
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if (len < DMA_MIN_BYTES)
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goto skip_dma_map;
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if (mcspi_dma->dma_tx && tx_buf != NULL) {
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t->tx_dma = dma_map_single(mcspi->dev, (void *) tx_buf,
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len, DMA_TO_DEVICE);
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if (dma_mapping_error(mcspi->dev, t->tx_dma)) {
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dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
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'T', len);
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return -EINVAL;
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}
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if (m->is_dma_mapped || len < DMA_MIN_BYTES)
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continue;
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if (mcspi_dma->dma_tx && tx_buf != NULL) {
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t->tx_dma = dma_map_single(mcspi->dev, (void *) tx_buf,
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len, DMA_TO_DEVICE);
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if (dma_mapping_error(mcspi->dev, t->tx_dma)) {
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dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
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'T', len);
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status = -EINVAL;
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goto out;
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}
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}
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if (mcspi_dma->dma_rx && rx_buf != NULL) {
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t->rx_dma = dma_map_single(mcspi->dev, rx_buf, t->len,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(mcspi->dev, t->rx_dma)) {
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dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
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'R', len);
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if (tx_buf != NULL)
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dma_unmap_single(mcspi->dev, t->tx_dma,
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len, DMA_TO_DEVICE);
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status = -EINVAL;
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goto out;
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}
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}
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if (mcspi_dma->dma_rx && rx_buf != NULL) {
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t->rx_dma = dma_map_single(mcspi->dev, rx_buf, t->len,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(mcspi->dev, t->rx_dma)) {
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dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
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'R', len);
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if (tx_buf != NULL)
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dma_unmap_single(mcspi->dev, t->tx_dma,
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len, DMA_TO_DEVICE);
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return -EINVAL;
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}
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}
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omap2_mcspi_work(mcspi, m);
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/* spi_finalize_current_message() changes the status inside the
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* spi_message, save the status here. */
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status = m->status;
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out:
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spi_finalize_current_message(master);
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return status;
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skip_dma_map:
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return omap2_mcspi_work_one(mcspi, spi, t);
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}
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static int omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
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@ -1347,7 +1323,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
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master->setup = omap2_mcspi_setup;
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master->auto_runtime_pm = true;
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master->transfer_one_message = omap2_mcspi_transfer_one_message;
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master->transfer_one = omap2_mcspi_transfer_one;
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master->cleanup = omap2_mcspi_cleanup;
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master->dev.of_node = node;
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master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ;
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