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arm64: Clean up the initial page table creation in head.S
This patch adds a create_table_entry macro which is used to populate pgd and pud entries, also reducing the number of arguments for create_pgd_entry. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
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@ -476,43 +476,38 @@ ENDPROC(__calc_phys_offset)
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.quad PAGE_OFFSET
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/*
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* Macro to populate the PUD for the corresponding block entry in the next
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* level (tbl) for the given virtual address in case of 4 levels.
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* Macro to create a table entry to the next page.
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*
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* Preserves: pgd, virt
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* Corrupts: tbl, tmp1, tmp2
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* Returns: pud
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* tbl: page table address
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* virt: virtual address
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* shift: #imm page table shift
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* ptrs: #imm pointers per table page
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*
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* Preserves: virt
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* Corrupts: tmp1, tmp2
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* Returns: tbl -> next level table page address
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*/
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.macro create_pud_entry, pgd, tbl, virt, pud, tmp1, tmp2
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#if CONFIG_ARM64_PGTABLE_LEVELS == 4
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add \tbl, \tbl, #PAGE_SIZE // bump tbl 1 page up.
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// to make room for pud
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add \pud, \pgd, #PAGE_SIZE // pgd points to pud which
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// follows pgd
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lsr \tmp1, \virt, #PUD_SHIFT
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and \tmp1, \tmp1, #PTRS_PER_PUD - 1 // PUD index
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orr \tmp2, \tbl, #3 // PUD entry table type
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str \tmp2, [\pud, \tmp1, lsl #3]
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#else
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mov \pud, \tbl
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#endif
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.macro create_table_entry, tbl, virt, shift, ptrs, tmp1, tmp2
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lsr \tmp1, \virt, #\shift
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and \tmp1, \tmp1, #\ptrs - 1 // table index
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add \tmp2, \tbl, #PAGE_SIZE
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orr \tmp2, \tmp2, #PMD_TYPE_TABLE // address of next table and entry type
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str \tmp2, [\tbl, \tmp1, lsl #3]
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add \tbl, \tbl, #PAGE_SIZE // next level table page
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.endm
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/*
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* Macro to populate the PGD (and possibily PUD) for the corresponding
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* block entry in the next level (tbl) for the given virtual address.
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*
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* Preserves: pgd, virt
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* Corrupts: tmp1, tmp2, tmp3
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* Returns: tbl -> page where block mappings can be placed
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* (changed to make room for pud with 4 levels, preserved otherwise)
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* Preserves: tbl, next, virt
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* Corrupts: tmp1, tmp2
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*/
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.macro create_pgd_entry, pgd, tbl, virt, tmp1, tmp2, tmp3
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create_pud_entry \pgd, \tbl, \virt, \tmp3, \tmp1, \tmp2
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lsr \tmp1, \virt, #PGDIR_SHIFT
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and \tmp1, \tmp1, #PTRS_PER_PGD - 1 // PGD index
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orr \tmp2, \tmp3, #3 // PGD entry table type
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str \tmp2, [\pgd, \tmp1, lsl #3]
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.macro create_pgd_entry, tbl, virt, tmp1, tmp2
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create_table_entry \tbl, \virt, PGDIR_SHIFT, PTRS_PER_PGD, \tmp1, \tmp2
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#if CONFIG_ARM64_PGTABLE_LEVELS == 4
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create_table_entry \tbl, \virt, PUD_SHIFT, PTRS_PER_PUD, \tmp1, \tmp2
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#endif
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.endm
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/*
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@ -573,10 +568,10 @@ __create_page_tables:
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/*
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* Create the identity mapping.
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*/
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add x0, x25, #PAGE_SIZE // section table address
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mov x0, x25 // idmap_pg_dir
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ldr x3, =KERNEL_START
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add x3, x3, x28 // __pa(KERNEL_START)
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create_pgd_entry x25, x0, x3, x1, x5, x6
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create_pgd_entry x0, x3, x5, x6
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ldr x6, =KERNEL_END
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mov x5, x3 // __pa(KERNEL_START)
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add x6, x6, x28 // __pa(KERNEL_END)
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@ -585,9 +580,9 @@ __create_page_tables:
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/*
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* Map the kernel image (starting with PHYS_OFFSET).
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*/
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add x0, x26, #PAGE_SIZE // section table address
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mov x0, x26 // swapper_pg_dir
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mov x5, #PAGE_OFFSET
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create_pgd_entry x26, x0, x5, x1, x3, x6
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create_pgd_entry x0, x5, x3, x6
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ldr x6, =KERNEL_END
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mov x3, x24 // phys offset
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create_block_map x0, x7, x3, x5, x6
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