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hwmon: (k8temp) Warn about fam F rev F errata
Add warning about wrong CPU temperature readouts on all fam F rev F. The allowed combinations of processors ensure that all processors in a multisocket system have similar characteristics, e.g. (1) provide temperature sensor interface (>=RevC && <RevF) (2) are affected by erratum #141 (>=RevF) Thus it is sufficient to check the revision of the boot CPU. For "mixed silicon support" refer to "Revision Guide for AMD Athlon 64 and AMD Opteron Processors" (RevA-E) and "Revision Guide for AMD NPT Family 0Fh Processors" (RefF-G). Cc: Rudolf Marek <r.marek@assembler.cz> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -31,6 +31,7 @@
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#include <linux/hwmon-sysfs.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/err.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <linux/mutex.h>
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#include <asm/processor.h>
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#define TEMP_FROM_REG(val) (((((val) >> 16) & 0xff) - 49) * 1000)
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#define TEMP_FROM_REG(val) (((((val) >> 16) & 0xff) - 49) * 1000)
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#define REG_TEMP 0xe4
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#define REG_TEMP 0xe4
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@ -141,20 +142,34 @@ static int __devinit k8temp_probe(struct pci_dev *pdev,
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int err;
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int err;
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u8 scfg;
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u8 scfg;
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u32 temp;
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u32 temp;
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u8 model, stepping;
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struct k8temp_data *data;
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struct k8temp_data *data;
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u32 cpuid = cpuid_eax(1);
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/* this feature should be available since SH-C0 core */
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if ((cpuid == 0xf40) || (cpuid == 0xf50) || (cpuid == 0xf51)) {
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err = -ENODEV;
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goto exit;
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}
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if (!(data = kzalloc(sizeof(struct k8temp_data), GFP_KERNEL))) {
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if (!(data = kzalloc(sizeof(struct k8temp_data), GFP_KERNEL))) {
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err = -ENOMEM;
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err = -ENOMEM;
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goto exit;
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goto exit;
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}
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}
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model = boot_cpu_data.x86_model;
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stepping = boot_cpu_data.x86_mask;
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switch (boot_cpu_data.x86) {
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case 0xf:
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/* feature available since SH-C0, exclude older revisions */
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if (((model == 4) && (stepping == 0)) ||
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((model == 5) && (stepping <= 1))) {
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err = -ENODEV;
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goto exit_free;
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}
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if (model >= 0x40) {
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dev_warn(&pdev->dev, "Temperature readouts might be "
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"wrong - check erratum #141\n");
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}
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break;
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}
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pci_read_config_byte(pdev, REG_TEMP, &scfg);
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pci_read_config_byte(pdev, REG_TEMP, &scfg);
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scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */
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scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */
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pci_write_config_byte(pdev, REG_TEMP, scfg);
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pci_write_config_byte(pdev, REG_TEMP, scfg);
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