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sparc64: Hibernation support
This patch adds CONFIG_HIBERNATION support for sparc64 architecture. The suspend function is the same as on another platforms. The restore function uses Bypass feature of MMU which allows to make the process more comfortable and plesant. Signed-off-by: Kirill Tkhai <tkhai@yandex.ru> CC: David Miller <davem@davemloft.net> CC: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -100,6 +100,9 @@ config HAVE_LATENCYTOP_SUPPORT
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bool
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default y if SPARC64
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config ARCH_HIBERNATION_POSSIBLE
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def_bool y if SPARC64
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config AUDIT_ARCH
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bool
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default y
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@ -327,6 +330,10 @@ config ARCH_SPARSEMEM_DEFAULT
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source "mm/Kconfig"
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if SPARC64
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source "kernel/power/Kconfig"
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endif
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config SCHED_SMT
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bool "SMT (Hyperthreading) scheduler support"
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depends on SPARC64 && SMP
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@ -57,6 +57,7 @@ core-y += arch/sparc/
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libs-y += arch/sparc/prom/
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libs-y += arch/sparc/lib/
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drivers-$(CONFIG_PM) += arch/sparc/power/
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drivers-$(CONFIG_OPROFILE) += arch/sparc/oprofile/
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boot := arch/sparc/boot
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23
arch/sparc/include/asm/hibernate.h
Normal file
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arch/sparc/include/asm/hibernate.h
Normal file
@ -0,0 +1,23 @@
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/*
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* hibernate.h: Hibernaton support specific for sparc64.
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*
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* Copyright (C) 2013 Kirill V Tkhai (tkhai@yandex.ru)
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*/
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#ifndef ___SPARC_HIBERNATE_H
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#define ___SPARC_HIBERNATE_H
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struct saved_context {
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unsigned long fp;
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unsigned long cwp;
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unsigned long wstate;
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unsigned long tick;
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unsigned long pstate;
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unsigned long g4;
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unsigned long g5;
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unsigned long g6;
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};
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#endif
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@ -14,6 +14,8 @@
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// #include <linux/mm.h>
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#include <linux/kbuild.h>
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#include <asm/hibernate.h>
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#ifdef CONFIG_SPARC32
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int sparc32_foo(void)
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{
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@ -24,6 +26,19 @@ int sparc32_foo(void)
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#else
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int sparc64_foo(void)
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{
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#ifdef CONFIG_HIBERNATION
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BLANK();
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OFFSET(SC_REG_FP, saved_context, fp);
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OFFSET(SC_REG_CWP, saved_context, cwp);
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OFFSET(SC_REG_WSTATE, saved_context, wstate);
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OFFSET(SC_REG_TICK, saved_context, tick);
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OFFSET(SC_REG_PSTATE, saved_context, pstate);
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OFFSET(SC_REG_G4, saved_context, g4);
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OFFSET(SC_REG_G5, saved_context, g5);
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OFFSET(SC_REG_G6, saved_context, g6);
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#endif
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return 0;
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}
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#endif
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3
arch/sparc/power/Makefile
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3
arch/sparc/power/Makefile
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@ -0,0 +1,3 @@
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# Makefile for Sparc-specific hibernate files.
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obj-$(CONFIG_HIBERNATION) += hibernate.o hibernate_asm.o
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arch/sparc/power/hibernate.c
Normal file
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arch/sparc/power/hibernate.c
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@ -0,0 +1,42 @@
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/*
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* hibernate.c: Hibernaton support specific for sparc64.
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*
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* Copyright (C) 2013 Kirill V Tkhai (tkhai@yandex.ru)
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*/
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#include <linux/mm.h>
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#include <asm/hibernate.h>
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#include <asm/visasm.h>
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#include <asm/page.h>
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#include <asm/tlb.h>
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/* References to section boundaries */
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extern const void __nosave_begin, __nosave_end;
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struct saved_context saved_context;
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/*
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* pfn_is_nosave - check if given pfn is in the 'nosave' section
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*/
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int pfn_is_nosave(unsigned long pfn)
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{
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unsigned long nosave_begin_pfn = PFN_DOWN((unsigned long)&__nosave_begin);
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unsigned long nosave_end_pfn = PFN_DOWN((unsigned long)&__nosave_end);
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return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
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}
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void save_processor_state(void)
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{
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save_and_clear_fpu();
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}
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void restore_processor_state(void)
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{
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struct mm_struct *mm = current->active_mm;
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load_secondary_context(mm);
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tsb_context_switch(mm);
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}
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131
arch/sparc/power/hibernate_asm.S
Normal file
131
arch/sparc/power/hibernate_asm.S
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@ -0,0 +1,131 @@
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/*
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* hibernate_asm.S: Hibernaton support specific for sparc64.
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*
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* Copyright (C) 2013 Kirill V Tkhai (tkhai@yandex.ru)
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*/
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/cpudata.h>
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#include <asm/page.h>
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ENTRY(swsusp_arch_suspend)
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save %sp, -128, %sp
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save %sp, -128, %sp
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flushw
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setuw saved_context, %g3
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/* Save window regs */
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rdpr %cwp, %g2
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stx %g2, [%g3 + SC_REG_CWP]
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rdpr %wstate, %g2
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stx %g2, [%g3 + SC_REG_WSTATE]
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stx %fp, [%g3 + SC_REG_FP]
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/* Save state regs */
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rdpr %tick, %g2
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stx %g2, [%g3 + SC_REG_TICK]
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rdpr %pstate, %g2
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stx %g2, [%g3 + SC_REG_PSTATE]
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/* Save global regs */
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stx %g4, [%g3 + SC_REG_G4]
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stx %g5, [%g3 + SC_REG_G5]
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stx %g6, [%g3 + SC_REG_G6]
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call swsusp_save
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nop
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mov %o0, %i0
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restore
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mov %o0, %i0
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ret
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restore
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ENTRY(swsusp_arch_resume)
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/* Write restore_pblist to %l0 */
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sethi %hi(restore_pblist), %l0
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ldx [%l0 + %lo(restore_pblist)], %l0
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call __flush_tlb_all
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nop
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/* Write PAGE_OFFSET to %g7 */
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sethi %uhi(PAGE_OFFSET), %g7
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sllx %g7, 32, %g7
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setuw (PAGE_SIZE-8), %g3
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/* Use MMU Bypass */
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rd %asi, %g1
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wr %g0, ASI_PHYS_USE_EC, %asi
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ba fill_itlb
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nop
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pbe_loop:
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cmp %l0, %g0
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be restore_ctx
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sub %l0, %g7, %l0
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ldxa [%l0 ] %asi, %l1 /* address */
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ldxa [%l0 + 8] %asi, %l2 /* orig_address */
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/* phys addr */
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sub %l1, %g7, %l1
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sub %l2, %g7, %l2
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mov %g3, %l3 /* PAGE_SIZE-8 */
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copy_loop:
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ldxa [%l1 + %l3] ASI_PHYS_USE_EC, %g2
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stxa %g2, [%l2 + %l3] ASI_PHYS_USE_EC
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cmp %l3, %g0
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bne copy_loop
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sub %l3, 8, %l3
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/* next pbe */
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ba pbe_loop
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ldxa [%l0 + 16] %asi, %l0
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restore_ctx:
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setuw saved_context, %g3
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/* Restore window regs */
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wrpr %g0, 0, %canrestore
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wrpr %g0, 0, %otherwin
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wrpr %g0, 6, %cansave
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wrpr %g0, 0, %cleanwin
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ldxa [%g3 + SC_REG_CWP] %asi, %g2
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wrpr %g2, %cwp
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ldxa [%g3 + SC_REG_WSTATE] %asi, %g2
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wrpr %g2, %wstate
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ldxa [%g3 + SC_REG_FP] %asi, %fp
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/* Restore state regs */
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ldxa [%g3 + SC_REG_PSTATE] %asi, %g2
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wrpr %g2, %pstate
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ldxa [%g3 + SC_REG_TICK] %asi, %g2
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wrpr %g2, %tick
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/* Restore global regs */
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ldxa [%g3 + SC_REG_G4] %asi, %g4
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ldxa [%g3 + SC_REG_G5] %asi, %g5
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ldxa [%g3 + SC_REG_G6] %asi, %g6
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wr %g1, %g0, %asi
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restore
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restore
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wrpr %g0, 14, %pil
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retl
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mov %g0, %o0
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fill_itlb:
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ba pbe_loop
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wrpr %g0, 15, %pil
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