mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-16 22:10:24 +00:00
Merge branch 'debug-ll' into omap-for-linus
This commit is contained in:
Tony Lindgren
commit
be26a3df0b
@ -22,13 +22,13 @@
|
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#if defined(CONFIG_DEBUG_ICEDCC)
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#ifdef CONFIG_CPU_V6
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.macro loadsp, rb
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.macro loadsp, rb, tmp
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.endm
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.macro writeb, ch, rb
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mcr p14, 0, \ch, c0, c5, 0
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.endm
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#elif defined(CONFIG_CPU_V7)
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.macro loadsp, rb
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.macro loadsp, rb, tmp
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.endm
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.macro writeb, ch, rb
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wait: mrc p14, 0, pc, c0, c1, 0
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@ -36,13 +36,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
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mcr p14, 0, \ch, c0, c5, 0
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.endm
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#elif defined(CONFIG_CPU_XSCALE)
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.macro loadsp, rb
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.macro loadsp, rb, tmp
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.endm
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.macro writeb, ch, rb
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mcr p14, 0, \ch, c8, c0, 0
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.endm
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#else
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.macro loadsp, rb
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.macro loadsp, rb, tmp
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.endm
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.macro writeb, ch, rb
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mcr p14, 0, \ch, c1, c0, 0
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@ -58,7 +58,7 @@ wait: mrc p14, 0, pc, c0, c1, 0
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.endm
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#if defined(CONFIG_ARCH_SA1100)
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.macro loadsp, rb
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.macro loadsp, rb, tmp
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mov \rb, #0x80000000 @ physical base address
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#ifdef CONFIG_DEBUG_LL_SER3
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add \rb, \rb, #0x00050000 @ Ser3
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@ -67,13 +67,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
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#endif
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.endm
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#elif defined(CONFIG_ARCH_S3C2410)
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.macro loadsp, rb
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.macro loadsp, rb, tmp
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mov \rb, #0x50000000
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add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
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.endm
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#else
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.macro loadsp, rb
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addruart \rb
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.macro loadsp, rb, tmp
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addruart \rb, \tmp
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.endm
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#endif
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#endif
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@ -1025,7 +1025,7 @@ phex: adr r3, phexbuf
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strb r2, [r3, r1]
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b 1b
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puts: loadsp r3
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puts: loadsp r3, r1
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1: ldrb r2, [r0], #1
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teq r2, #0
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moveq pc, lr
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@ -1042,7 +1042,7 @@ puts: loadsp r3
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putc:
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mov r2, r0
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mov r0, #0
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loadsp r3
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loadsp r3, r1
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b 2b
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memdump: mov r12, r0
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@ -24,7 +24,7 @@
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#if defined(CONFIG_CPU_V6)
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.macro addruart, rx
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.macro addruart, rx, tmp
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.endm
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.macro senduart, rd, rx
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@ -51,7 +51,7 @@
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#elif defined(CONFIG_CPU_V7)
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.macro addruart, rx
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.macro addruart, rx, tmp
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.endm
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.macro senduart, rd, rx
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@ -71,7 +71,7 @@ wait: mrc p14, 0, pc, c0, c1, 0
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#elif defined(CONFIG_CPU_XSCALE)
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.macro addruart, rx
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.macro addruart, rx, tmp
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.endm
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.macro senduart, rd, rx
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@ -98,7 +98,7 @@ wait: mrc p14, 0, pc, c0, c1, 0
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#else
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.macro addruart, rx
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.macro addruart, rx, tmp
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.endm
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.macro senduart, rd, rx
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@ -164,7 +164,7 @@ ENDPROC(printhex2)
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.ltorg
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ENTRY(printascii)
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addruart r3
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addruart r3, r1
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b 2f
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1: waituart r2, r3
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senduart r1, r3
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@ -180,7 +180,7 @@ ENTRY(printascii)
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ENDPROC(printascii)
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ENTRY(printch)
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addruart r3
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addruart r3, r1
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mov r1, r0
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mov r0, #0
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b 1b
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@ -10,7 +10,7 @@
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*/
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#include "hardware.h"
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x80000000 @ physical
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@ -14,7 +14,7 @@
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#include <mach/hardware.h>
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#include <mach/at91_dbgu.h>
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
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@ -13,7 +13,7 @@
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#include <asm/hardware/clps7111.h>
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #CLPS7111_PHYS_BASE
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@ -19,7 +19,7 @@
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#include <linux/serial_reg.h>
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#define UART_SHIFT 2
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.macro addruart, rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x01000000 @ physical base address
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@ -8,7 +8,7 @@
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#include <mach/bridge-regs.h>
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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ldreq \rx, =DOVE_SB_REGS_PHYS_BASE
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@ -11,7 +11,7 @@
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*
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**/
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.macro addruart,rx
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.macro addruart, rx, tmp
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mov \rx, #0xf0000000
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orr \rx, \rx, #0x00000be0
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.endm
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@ -11,7 +11,7 @@
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*/
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#include <mach/ep93xx-regs.h>
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base
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@ -15,7 +15,7 @@
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#ifndef CONFIG_DEBUG_DC21285_PORT
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/* For NetWinder debugging */
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x7c000000 @ physical
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@ -32,7 +32,7 @@
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.equ dc21285_high, ARMCSR_BASE & 0xff000000
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.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x42000000
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@ -11,7 +11,7 @@
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*/
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#include <mach/hardware.h>
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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ldreq \rx, =GEMINI_UART_BASE @ physical
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@ -14,7 +14,7 @@
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.equ io_virt, IO_BASE
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.equ io_phys, IO_START
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #io_phys @ physical base address
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@ -11,7 +11,7 @@
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*
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*/
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.macro addruart,rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x16000000 @ physical base address
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@ -11,7 +11,7 @@
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* published by the Free Software Foundation.
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*/
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.macro addruart, rx
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ mmu enabled?
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moveq \rx, #0xff000000 @ physical
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@ -11,7 +11,7 @@
|
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* published by the Free Software Foundation.
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*/
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.macro addruart, rx
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.macro addruart, rx, tmp
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mov \rx, #0xfe000000 @ physical as well as virtual
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orr \rx, \rx, #0x00800000 @ location of the UART
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.endm
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@ -11,7 +11,7 @@
|
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* published by the Free Software Foundation.
|
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*/
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.macro addruart, rx
|
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ mmu enabled?
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moveq \rx, #0xff000000 @ physical
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@ -11,7 +11,7 @@
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*
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||||
*/
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||||
|
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.macro addruart,rx
|
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.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0xc0000000 @ Physical base
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|
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@ -12,7 +12,7 @@
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*/
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#include <mach/ixp23xx.h>
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.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ mmu enabled?
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ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0xc8000000
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include <mach/bridge-regs.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =KIRKWOOD_REGS_PHYS_BASE
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/regs-uart.h>
|
||||
|
||||
.macro addruart, rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =KS8695_UART_PA @ physical base address
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
.equ io_virt, IO_BASE
|
||||
.equ io_phys, IO_START
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #io_phys @ physical base address
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
@ It is not known if this will be appropriate for every 40x
|
||||
@ board.
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
mov \rx, #0x00000700 @ offset from base
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include <mach/loki.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =LOKI_REGS_PHYS_BASE
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
|
||||
#include <mach/addr-map.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =APB_PHYS_BASE @ physical
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
#include <mach/msm_iomap.h>
|
||||
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
@ see if the MMU is enabled and select appropriate base address
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
@ -40,7 +40,7 @@
|
||||
beq 1001b
|
||||
.endm
|
||||
#else
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
.endm
|
||||
|
||||
.macro senduart,rd,rx
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include <mach/mv78xx0.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =MV78XX0_REGS_PHYS_BASE
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x00100000 @ physical
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x10000000 @ physical base address
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
|
||||
#include <mach/regs-board-a9m9750dev.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0)
|
||||
|
||||
@ -11,18 +11,80 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
#include <linux/serial_reg.h>
|
||||
|
||||
#include <plat/serial.h>
|
||||
|
||||
.pushsection .data
|
||||
omap_uart_phys: .word 0x0
|
||||
omap_uart_virt: .word 0x0
|
||||
.popsection
|
||||
|
||||
/*
|
||||
* Note that this code won't work if the bootloader passes
|
||||
* a wrong machine ID number in r1. To debug, just hardcode
|
||||
* the desired UART phys and virt addresses temporarily into
|
||||
* the omap_uart_phys and omap_uart_virt above.
|
||||
*/
|
||||
.macro addruart, rx, tmp
|
||||
|
||||
/* Use omap_uart_phys/virt if already configured */
|
||||
9: mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =omap_uart_phys @ physical base address
|
||||
ldrne \rx, =omap_uart_virt @ virtual base
|
||||
ldr \rx, [\rx, #0]
|
||||
cmp \rx, #0 @ is port configured?
|
||||
bne 99f @ already configured
|
||||
|
||||
/* Check 7XX UART1 scratchpad register for uart to use */
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0xff000000 @ physical base address
|
||||
movne \rx, #0xfe000000 @ virtual base
|
||||
orr \rx, \rx, #0x00fb0000
|
||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
||||
orr \rx, \rx, #0x00009000 @ UART 3
|
||||
#endif
|
||||
#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
|
||||
orr \rx, \rx, #0x00000800 @ UART 2 & 3
|
||||
#endif
|
||||
orr \rx, \rx, #0x00fb0000 @ OMAP1UART1
|
||||
ldrb \rx, [\rx, #(UART_SCR << OMAP7XX_PORT_SHIFT)]
|
||||
cmp \rx, #0 @ anything in 7XX scratchpad?
|
||||
bne 10f @ found 7XX uart
|
||||
|
||||
/* Check 15xx/16xx UART1 scratchpad register for uart to use */
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0xff000000 @ physical base address
|
||||
movne \rx, #0xfe000000 @ virtual base
|
||||
orr \rx, \rx, #0x00fb0000 @ OMAP1UART1
|
||||
ldrb \rx, [\rx, #(UART_SCR << OMAP_PORT_SHIFT)]
|
||||
|
||||
/* Select the UART to use based on the UART1 scratchpad value */
|
||||
10: cmp \rx, #0 @ no port configured?
|
||||
beq 11f @ if none, try to use UART1
|
||||
cmp \rx, #OMAP1UART1
|
||||
beq 11f @ configure OMAP1UART1
|
||||
cmp \rx, #OMAP1UART2
|
||||
beq 12f @ configure OMAP1UART2
|
||||
cmp \rx, #OMAP1UART3
|
||||
beq 13f @ configure OMAP2UART3
|
||||
|
||||
/* Configure the UART offset from the phys/virt base */
|
||||
11: mov \rx, #0x00fb0000 @ OMAP1UART1
|
||||
b 98f
|
||||
12: mov \rx, #0x00fb0000 @ OMAP1UART1
|
||||
orr \rx, \rx, #0x00000800 @ OMAP1UART2
|
||||
b 98f
|
||||
13: mov \rx, #0x00fb0000 @ OMAP1UART1
|
||||
orr \rx, \rx, #0x00000800 @ OMAP1UART2
|
||||
orr \rx, \rx, #0x00009000 @ OMAP1UART3
|
||||
|
||||
/* Store both phys and virt address for the uart */
|
||||
98: add \rx, \rx, #0xff000000 @ phys base
|
||||
ldr \tmp, =omap_uart_phys
|
||||
str \rx, [\tmp, #0]
|
||||
sub \rx, \rx, #0xff000000 @ phys base
|
||||
add \rx, \rx, #0xfe000000 @ virt base
|
||||
ldr \tmp, =omap_uart_virt
|
||||
str \rx, [\tmp, #0]
|
||||
b 9b
|
||||
99:
|
||||
.endm
|
||||
|
||||
.macro senduart,rd,rx
|
||||
@ -30,13 +92,13 @@
|
||||
.endm
|
||||
|
||||
.macro busyuart,rd,rx
|
||||
1001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends
|
||||
and \rd, \rd, #0x60
|
||||
teq \rd, #0x60
|
||||
1001: ldrb \rd, [\rx, #(UART_LSR << OMAP_PORT_SHIFT)]
|
||||
and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
|
||||
teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
|
||||
beq 1002f
|
||||
ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only
|
||||
and \rd, \rd, #0x60
|
||||
teq \rd, #0x60
|
||||
ldrb \rd, [\rx, #(UART_LSR << OMAP7XX_PORT_SHIFT)]
|
||||
and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
|
||||
teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
|
||||
bne 1001b
|
||||
1002:
|
||||
.endm
|
||||
|
||||
@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data[] = {
|
||||
{
|
||||
.mapbase = OMAP_UART1_BASE,
|
||||
.mapbase = OMAP1_UART1_BASE,
|
||||
.irq = INT_UART1,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
@ -72,7 +72,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
|
||||
.uartclk = OMAP16XX_BASE_BAUD * 16,
|
||||
},
|
||||
{
|
||||
.mapbase = OMAP_UART2_BASE,
|
||||
.mapbase = OMAP1_UART2_BASE,
|
||||
.irq = INT_UART2,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
@ -80,7 +80,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
|
||||
.uartclk = OMAP16XX_BASE_BAUD * 16,
|
||||
},
|
||||
{
|
||||
.mapbase = OMAP_UART3_BASE,
|
||||
.mapbase = OMAP1_UART3_BASE,
|
||||
.irq = INT_UART3,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
|
||||
@ -68,7 +68,7 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
|
||||
|
||||
static void __init omap_sdp_map_io(void)
|
||||
{
|
||||
omap2_set_globals_343x();
|
||||
omap2_set_globals_36xx();
|
||||
omap2_map_common_io();
|
||||
}
|
||||
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
|
||||
static void __init omap_zoom_map_io(void)
|
||||
{
|
||||
omap2_set_globals_343x();
|
||||
omap2_set_globals_36xx();
|
||||
omap2_map_common_io();
|
||||
}
|
||||
|
||||
|
||||
@ -11,32 +11,107 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
#include <linux/serial_reg.h>
|
||||
|
||||
#include <plat/serial.h>
|
||||
|
||||
#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
|
||||
|
||||
.pushsection .data
|
||||
omap_uart_phys: .word 0
|
||||
omap_uart_virt: .word 0
|
||||
omap_uart_lsr: .word 0
|
||||
.popsection
|
||||
|
||||
/*
|
||||
* Note that this code won't work if the bootloader passes
|
||||
* a wrong machine ID number in r1. To debug, just hardcode
|
||||
* the desired UART phys and virt addresses temporarily into
|
||||
* the omap_uart_phys and omap_uart_virt above.
|
||||
*/
|
||||
.macro addruart, rx, tmp
|
||||
|
||||
/* Use omap_uart_phys/virt if already configured */
|
||||
10: mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =omap_uart_phys @ physical base address
|
||||
ldrne \rx, =omap_uart_virt @ virtual base address
|
||||
ldr \rx, [\rx, #0]
|
||||
cmp \rx, #0 @ is port configured?
|
||||
bne 99f @ already configured
|
||||
|
||||
/* Check UART1 scratchpad register for uart to use */
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
#ifdef CONFIG_ARCH_OMAP2
|
||||
moveq \rx, #0x48000000 @ physical base address
|
||||
movne \rx, #0xfa000000 @ virtual base
|
||||
orr \rx, \rx, #0x0006a000
|
||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART2
|
||||
add \rx, \rx, #0x00002000 @ UART 2
|
||||
#endif
|
||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
||||
add \rx, \rx, #0x00004000 @ UART 3
|
||||
#endif
|
||||
orr \rx, \rx, #0x0006a000 @ uart1 on omap2/3/4
|
||||
ldrb \rx, [\rx, #(UART_SCR << OMAP_PORT_SHIFT)] @ scratchpad
|
||||
|
||||
#elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
|
||||
moveq \rx, #0x48000000 @ physical base address
|
||||
movne \rx, #0xfa000000 @ virtual base
|
||||
orr \rx, \rx, #0x0006a000
|
||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART2
|
||||
add \rx, \rx, #0x00002000 @ UART 2
|
||||
#endif
|
||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
||||
add \rx, \rx, #0x00fb0000 @ UART 3
|
||||
add \rx, \rx, #0x00006000
|
||||
#endif
|
||||
#endif
|
||||
/* Select the UART to use based on the UART1 scratchpad value */
|
||||
cmp \rx, #0 @ no port configured?
|
||||
beq 21f @ if none, try to use UART1
|
||||
cmp \rx, #OMAP2UART1 @ OMAP2/3/4UART1
|
||||
beq 21f @ configure OMAP2/3/4UART1
|
||||
cmp \rx, #OMAP2UART2 @ OMAP2/3/4UART2
|
||||
beq 22f @ configure OMAP2/3/4UART2
|
||||
cmp \rx, #OMAP2UART3 @ only on 24xx
|
||||
beq 23f @ configure OMAP2UART3
|
||||
cmp \rx, #OMAP3UART3 @ only on 34xx
|
||||
beq 33f @ configure OMAP3UART3
|
||||
cmp \rx, #OMAP4UART3 @ only on 44xx
|
||||
beq 43f @ configure OMAP4UART3
|
||||
cmp \rx, #OMAP3UART4 @ only on 36xx
|
||||
beq 34f @ configure OMAP3UART4
|
||||
cmp \rx, #OMAP4UART4 @ only on 44xx
|
||||
beq 44f @ configure OMAP4UART4
|
||||
cmp \rx, #ZOOM_UART @ only on zoom2/3
|
||||
beq 95f @ configure ZOOM_UART
|
||||
|
||||
/* Configure the UART offset from the phys/virt base */
|
||||
21: mov \rx, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
|
||||
b 98f
|
||||
22: mov \rx, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
|
||||
b 98f
|
||||
23: mov \rx, #UART_OFFSET(OMAP2_UART3_BASE)
|
||||
b 98f
|
||||
33: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE)
|
||||
add \rx, \rx, #0x00fb0000
|
||||
add \rx, \rx, #0x00006000 @ OMAP3_UART3_BASE
|
||||
b 98f
|
||||
34: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE)
|
||||
add \rx, \rx, #0x00fb0000
|
||||
add \rx, \rx, #0x00028000 @ OMAP3_UART4_BASE
|
||||
b 98f
|
||||
43: mov \rx, #UART_OFFSET(OMAP4_UART3_BASE)
|
||||
b 98f
|
||||
44: mov \rx, #UART_OFFSET(OMAP4_UART4_BASE)
|
||||
b 98f
|
||||
95: mov \rx, #ZOOM_UART_BASE
|
||||
ldr \tmp, =omap_uart_phys
|
||||
str \rx, [\tmp, #0]
|
||||
mov \rx, #ZOOM_UART_VIRT
|
||||
ldr \tmp, =omap_uart_virt
|
||||
str \rx, [\tmp, #0]
|
||||
mov \rx, #(UART_LSR << ZOOM_PORT_SHIFT)
|
||||
ldr \tmp, =omap_uart_lsr
|
||||
str \rx, [\tmp, #0]
|
||||
b 10b
|
||||
|
||||
/* Store both phys and virt address for the uart */
|
||||
98: add \rx, \rx, #0x48000000 @ phys base
|
||||
ldr \tmp, =omap_uart_phys
|
||||
str \rx, [\tmp, #0]
|
||||
sub \rx, \rx, #0x48000000 @ phys base
|
||||
add \rx, \rx, #0xfa000000 @ virt base
|
||||
ldr \tmp, =omap_uart_virt
|
||||
str \rx, [\tmp, #0]
|
||||
mov \rx, #(UART_LSR << OMAP_PORT_SHIFT)
|
||||
ldr \tmp, =omap_uart_lsr
|
||||
str \rx, [\tmp, #0]
|
||||
|
||||
b 10b
|
||||
99:
|
||||
.endm
|
||||
|
||||
.macro senduart,rd,rx
|
||||
@ -44,15 +119,12 @@
|
||||
.endm
|
||||
|
||||
.macro busyuart,rd,rx
|
||||
1001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends
|
||||
and \rd, \rd, #0x60
|
||||
teq \rd, #0x60
|
||||
beq 1002f
|
||||
ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only
|
||||
and \rd, \rd, #0x60
|
||||
teq \rd, #0x60
|
||||
1001: ldr \rd, =omap_uart_lsr
|
||||
ldr \rd, [\rd, #0]
|
||||
ldrb \rd, [\rx, \rd]
|
||||
and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
|
||||
teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
|
||||
bne 1001b
|
||||
1002:
|
||||
.endm
|
||||
|
||||
.macro waituart,rd,rx
|
||||
|
||||
@ -80,7 +80,6 @@ static LIST_HEAD(uart_list);
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data0[] = {
|
||||
{
|
||||
.mapbase = OMAP_UART1_BASE,
|
||||
.irq = 72,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
@ -93,7 +92,6 @@ static struct plat_serial8250_port serial_platform_data0[] = {
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data1[] = {
|
||||
{
|
||||
.mapbase = OMAP_UART2_BASE,
|
||||
.irq = 73,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
@ -106,7 +104,6 @@ static struct plat_serial8250_port serial_platform_data1[] = {
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data2[] = {
|
||||
{
|
||||
.mapbase = OMAP_UART3_BASE,
|
||||
.irq = 74,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
@ -120,7 +117,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
static struct plat_serial8250_port serial_platform_data3[] = {
|
||||
{
|
||||
.mapbase = OMAP_UART4_BASE,
|
||||
.irq = 70,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
@ -131,6 +127,17 @@ static struct plat_serial8250_port serial_platform_data3[] = {
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
void __init omap2_set_globals_uart(struct omap_globals *omap2_globals)
|
||||
{
|
||||
serial_platform_data0[0].mapbase = omap2_globals->uart1_phys;
|
||||
serial_platform_data1[0].mapbase = omap2_globals->uart2_phys;
|
||||
serial_platform_data2[0].mapbase = omap2_globals->uart3_phys;
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline unsigned int __serial_read_reg(struct uart_port *up,
|
||||
int offset)
|
||||
{
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
|
||||
#include <mach/orion5x.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =ORION5X_REGS_PHYS_BASE
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
mov \rx, #0x00090000
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x40000000 @ physical
|
||||
|
||||
@ -33,7 +33,7 @@
|
||||
#error "Unknown RealView platform"
|
||||
#endif
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x10000000
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x03000000
|
||||
|
||||
@ -19,7 +19,7 @@
|
||||
#define S3C2410_UART1_OFF (0x4000)
|
||||
#define SHIFT_2440TXF (14-9)
|
||||
|
||||
.macro addruart, rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
ldreq \rx, = S3C24XX_PA_UART
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
#include <mach/map.h>
|
||||
#include <plat/regs-serial.h>
|
||||
|
||||
.macro addruart, rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
ldreq \rx, = S3C24XX_PA_UART
|
||||
|
||||
@ -21,7 +21,7 @@
|
||||
* aligned and add in the offset when we load the value here.
|
||||
*/
|
||||
|
||||
.macro addruart, rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
ldreq \rx, = S3C_PA_UART
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* aligned and add in the offset when we load the value here.
|
||||
*/
|
||||
|
||||
.macro addruart, rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
ldreq \rx, = S3C_PA_UART
|
||||
|
||||
@ -12,7 +12,7 @@
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x80000000 @ physical base address
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mov \rx, #0xe0000000
|
||||
orr \rx, \rx, #0x000003f8
|
||||
.endm
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
/* If we move the adress using MMU, use this. */
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @MMU enabled?
|
||||
moveq \rx, #0x80000000 @MMU off, Physical address
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x10000000
|
||||
|
||||
@ -52,7 +52,7 @@
|
||||
#define UART_PADDR MXC91231_UART2_BASE_ADDR
|
||||
#define UART_VADDR MXC91231_AIPS1_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
|
||||
#endif
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =UART_PADDR @ physical
|
||||
|
||||
@ -141,25 +141,6 @@ config OMAP_DM_TIMER
|
||||
help
|
||||
Select this option if you want to use OMAP Dual-Mode timers.
|
||||
|
||||
choice
|
||||
prompt "Low-level debug console UART"
|
||||
depends on ARCH_OMAP
|
||||
default OMAP_LL_DEBUG_NONE
|
||||
|
||||
config OMAP_LL_DEBUG_UART1
|
||||
bool "UART1"
|
||||
|
||||
config OMAP_LL_DEBUG_UART2
|
||||
bool "UART2"
|
||||
|
||||
config OMAP_LL_DEBUG_UART3
|
||||
bool "UART3"
|
||||
|
||||
config OMAP_LL_DEBUG_NONE
|
||||
bool "None"
|
||||
|
||||
endchoice
|
||||
|
||||
config OMAP_SERIAL_WAKE
|
||||
bool "Enable wake-up events for serial ports"
|
||||
depends on ARCH_OMAP1 && OMAP_MUX
|
||||
|
||||
@ -34,6 +34,7 @@
|
||||
#include <plat/control.h>
|
||||
#include <plat/mux.h>
|
||||
#include <plat/fpga.h>
|
||||
#include <plat/serial.h>
|
||||
|
||||
#include <plat/clock.h>
|
||||
|
||||
@ -245,6 +246,7 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
|
||||
omap2_set_globals_sdrc(omap2_globals);
|
||||
omap2_set_globals_control(omap2_globals);
|
||||
omap2_set_globals_prcm(omap2_globals);
|
||||
omap2_set_globals_uart(omap2_globals);
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -259,6 +261,9 @@ static struct omap_globals omap242x_globals = {
|
||||
.ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
|
||||
.prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
|
||||
.cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
|
||||
.uart1_phys = OMAP2_UART1_BASE,
|
||||
.uart2_phys = OMAP2_UART2_BASE,
|
||||
.uart3_phys = OMAP2_UART3_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_242x(void)
|
||||
@ -277,6 +282,9 @@ static struct omap_globals omap243x_globals = {
|
||||
.ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
|
||||
.prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
|
||||
.cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
|
||||
.uart1_phys = OMAP2_UART1_BASE,
|
||||
.uart2_phys = OMAP2_UART2_BASE,
|
||||
.uart3_phys = OMAP2_UART3_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_243x(void)
|
||||
@ -285,9 +293,9 @@ void __init omap2_set_globals_243x(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP3430)
|
||||
#if defined(CONFIG_ARCH_OMAP3)
|
||||
|
||||
static struct omap_globals omap343x_globals = {
|
||||
static struct omap_globals omap3_globals = {
|
||||
.class = OMAP343X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
|
||||
.sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
|
||||
@ -295,11 +303,21 @@ static struct omap_globals omap343x_globals = {
|
||||
.ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
|
||||
.prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
|
||||
.cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
|
||||
.uart1_phys = OMAP3_UART1_BASE,
|
||||
.uart2_phys = OMAP3_UART2_BASE,
|
||||
.uart3_phys = OMAP3_UART3_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_343x(void)
|
||||
{
|
||||
__omap2_set_globals(&omap343x_globals);
|
||||
__omap2_set_globals(&omap3_globals);
|
||||
}
|
||||
|
||||
void __init omap2_set_globals_36xx(void)
|
||||
{
|
||||
omap3_globals.uart4_phys = OMAP3_UART4_BASE;
|
||||
|
||||
__omap2_set_globals(&omap3_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -311,6 +329,10 @@ static struct omap_globals omap4_globals = {
|
||||
.prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
|
||||
.cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
|
||||
.cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
|
||||
.uart1_phys = OMAP4_UART1_BASE,
|
||||
.uart2_phys = OMAP4_UART2_BASE,
|
||||
.uart3_phys = OMAP4_UART3_BASE,
|
||||
.uart4_phys = OMAP4_UART4_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_443x(void)
|
||||
@ -318,6 +340,7 @@ void __init omap2_set_globals_443x(void)
|
||||
omap2_set_globals_tap(&omap4_globals);
|
||||
omap2_set_globals_control(&omap4_globals);
|
||||
omap2_set_globals_prcm(&omap4_globals);
|
||||
omap2_set_globals_uart(&omap4_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@ -47,11 +47,16 @@ struct omap_globals {
|
||||
void __iomem *prm; /* Power and Reset Management */
|
||||
void __iomem *cm; /* Clock Management */
|
||||
void __iomem *cm2;
|
||||
unsigned long uart1_phys;
|
||||
unsigned long uart2_phys;
|
||||
unsigned long uart3_phys;
|
||||
unsigned long uart4_phys;
|
||||
};
|
||||
|
||||
void omap2_set_globals_242x(void);
|
||||
void omap2_set_globals_243x(void);
|
||||
void omap2_set_globals_343x(void);
|
||||
void omap2_set_globals_36xx(void);
|
||||
void omap2_set_globals_443x(void);
|
||||
|
||||
/* These get called from omap2_set_globals_xxxx(), do not call these */
|
||||
@ -59,6 +64,7 @@ void omap2_set_globals_tap(struct omap_globals *);
|
||||
void omap2_set_globals_sdrc(struct omap_globals *);
|
||||
void omap2_set_globals_control(struct omap_globals *);
|
||||
void omap2_set_globals_prcm(struct omap_globals *);
|
||||
void omap2_set_globals_uart(struct omap_globals *);
|
||||
|
||||
/**
|
||||
* omap_test_timeout - busy-loop, testing a condition
|
||||
|
||||
@ -125,43 +125,43 @@
|
||||
#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160)
|
||||
|
||||
/* UART3 Registers Mapping through MPU bus */
|
||||
#define UART3_RHR (OMAP_UART3_BASE + 0)
|
||||
#define UART3_THR (OMAP_UART3_BASE + 0)
|
||||
#define UART3_DLL (OMAP_UART3_BASE + 0)
|
||||
#define UART3_IER (OMAP_UART3_BASE + 4)
|
||||
#define UART3_DLH (OMAP_UART3_BASE + 4)
|
||||
#define UART3_IIR (OMAP_UART3_BASE + 8)
|
||||
#define UART3_FCR (OMAP_UART3_BASE + 8)
|
||||
#define UART3_EFR (OMAP_UART3_BASE + 8)
|
||||
#define UART3_LCR (OMAP_UART3_BASE + 0x0C)
|
||||
#define UART3_MCR (OMAP_UART3_BASE + 0x10)
|
||||
#define UART3_XON1_ADDR1 (OMAP_UART3_BASE + 0x10)
|
||||
#define UART3_XON2_ADDR2 (OMAP_UART3_BASE + 0x14)
|
||||
#define UART3_LSR (OMAP_UART3_BASE + 0x14)
|
||||
#define UART3_TCR (OMAP_UART3_BASE + 0x18)
|
||||
#define UART3_MSR (OMAP_UART3_BASE + 0x18)
|
||||
#define UART3_XOFF1 (OMAP_UART3_BASE + 0x18)
|
||||
#define UART3_XOFF2 (OMAP_UART3_BASE + 0x1C)
|
||||
#define UART3_SPR (OMAP_UART3_BASE + 0x1C)
|
||||
#define UART3_TLR (OMAP_UART3_BASE + 0x1C)
|
||||
#define UART3_MDR1 (OMAP_UART3_BASE + 0x20)
|
||||
#define UART3_MDR2 (OMAP_UART3_BASE + 0x24)
|
||||
#define UART3_SFLSR (OMAP_UART3_BASE + 0x28)
|
||||
#define UART3_TXFLL (OMAP_UART3_BASE + 0x28)
|
||||
#define UART3_RESUME (OMAP_UART3_BASE + 0x2C)
|
||||
#define UART3_TXFLH (OMAP_UART3_BASE + 0x2C)
|
||||
#define UART3_SFREGL (OMAP_UART3_BASE + 0x30)
|
||||
#define UART3_RXFLL (OMAP_UART3_BASE + 0x30)
|
||||
#define UART3_SFREGH (OMAP_UART3_BASE + 0x34)
|
||||
#define UART3_RXFLH (OMAP_UART3_BASE + 0x34)
|
||||
#define UART3_BLR (OMAP_UART3_BASE + 0x38)
|
||||
#define UART3_ACREG (OMAP_UART3_BASE + 0x3C)
|
||||
#define UART3_DIV16 (OMAP_UART3_BASE + 0x3C)
|
||||
#define UART3_SCR (OMAP_UART3_BASE + 0x40)
|
||||
#define UART3_SSR (OMAP_UART3_BASE + 0x44)
|
||||
#define UART3_EBLR (OMAP_UART3_BASE + 0x48)
|
||||
#define UART3_OSC_12M_SEL (OMAP_UART3_BASE + 0x4C)
|
||||
#define UART3_MVR (OMAP_UART3_BASE + 0x50)
|
||||
#define UART3_RHR (OMAP1_UART3_BASE + 0)
|
||||
#define UART3_THR (OMAP1_UART3_BASE + 0)
|
||||
#define UART3_DLL (OMAP1_UART3_BASE + 0)
|
||||
#define UART3_IER (OMAP1_UART3_BASE + 4)
|
||||
#define UART3_DLH (OMAP1_UART3_BASE + 4)
|
||||
#define UART3_IIR (OMAP1_UART3_BASE + 8)
|
||||
#define UART3_FCR (OMAP1_UART3_BASE + 8)
|
||||
#define UART3_EFR (OMAP1_UART3_BASE + 8)
|
||||
#define UART3_LCR (OMAP1_UART3_BASE + 0x0C)
|
||||
#define UART3_MCR (OMAP1_UART3_BASE + 0x10)
|
||||
#define UART3_XON1_ADDR1 (OMAP1_UART3_BASE + 0x10)
|
||||
#define UART3_XON2_ADDR2 (OMAP1_UART3_BASE + 0x14)
|
||||
#define UART3_LSR (OMAP1_UART3_BASE + 0x14)
|
||||
#define UART3_TCR (OMAP1_UART3_BASE + 0x18)
|
||||
#define UART3_MSR (OMAP1_UART3_BASE + 0x18)
|
||||
#define UART3_XOFF1 (OMAP1_UART3_BASE + 0x18)
|
||||
#define UART3_XOFF2 (OMAP1_UART3_BASE + 0x1C)
|
||||
#define UART3_SPR (OMAP1_UART3_BASE + 0x1C)
|
||||
#define UART3_TLR (OMAP1_UART3_BASE + 0x1C)
|
||||
#define UART3_MDR1 (OMAP1_UART3_BASE + 0x20)
|
||||
#define UART3_MDR2 (OMAP1_UART3_BASE + 0x24)
|
||||
#define UART3_SFLSR (OMAP1_UART3_BASE + 0x28)
|
||||
#define UART3_TXFLL (OMAP1_UART3_BASE + 0x28)
|
||||
#define UART3_RESUME (OMAP1_UART3_BASE + 0x2C)
|
||||
#define UART3_TXFLH (OMAP1_UART3_BASE + 0x2C)
|
||||
#define UART3_SFREGL (OMAP1_UART3_BASE + 0x30)
|
||||
#define UART3_RXFLL (OMAP1_UART3_BASE + 0x30)
|
||||
#define UART3_SFREGH (OMAP1_UART3_BASE + 0x34)
|
||||
#define UART3_RXFLH (OMAP1_UART3_BASE + 0x34)
|
||||
#define UART3_BLR (OMAP1_UART3_BASE + 0x38)
|
||||
#define UART3_ACREG (OMAP1_UART3_BASE + 0x3C)
|
||||
#define UART3_DIV16 (OMAP1_UART3_BASE + 0x3C)
|
||||
#define UART3_SCR (OMAP1_UART3_BASE + 0x40)
|
||||
#define UART3_SSR (OMAP1_UART3_BASE + 0x44)
|
||||
#define UART3_EBLR (OMAP1_UART3_BASE + 0x48)
|
||||
#define UART3_OSC_12M_SEL (OMAP1_UART3_BASE + 0x4C)
|
||||
#define UART3_MVR (OMAP1_UART3_BASE + 0x50)
|
||||
|
||||
/*
|
||||
* ---------------------------------------------------------------------------
|
||||
|
||||
@ -15,37 +15,65 @@
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP1)
|
||||
/* OMAP1 serial ports */
|
||||
#define OMAP_UART1_BASE 0xfffb0000
|
||||
#define OMAP_UART2_BASE 0xfffb0800
|
||||
#define OMAP_UART3_BASE 0xfffb9800
|
||||
#elif defined(CONFIG_ARCH_OMAP2)
|
||||
#define OMAP1_UART1_BASE 0xfffb0000
|
||||
#define OMAP1_UART2_BASE 0xfffb0800
|
||||
#define OMAP1_UART3_BASE 0xfffb9800
|
||||
|
||||
/* OMAP2 serial ports */
|
||||
#define OMAP_UART1_BASE 0x4806a000
|
||||
#define OMAP_UART2_BASE 0x4806c000
|
||||
#define OMAP_UART3_BASE 0x4806e000
|
||||
#elif defined(CONFIG_ARCH_OMAP3)
|
||||
#define OMAP2_UART1_BASE 0x4806a000
|
||||
#define OMAP2_UART2_BASE 0x4806c000
|
||||
#define OMAP2_UART3_BASE 0x4806e000
|
||||
|
||||
/* OMAP3 serial ports */
|
||||
#define OMAP_UART1_BASE 0x4806a000
|
||||
#define OMAP_UART2_BASE 0x4806c000
|
||||
#define OMAP_UART3_BASE 0x49020000
|
||||
#elif defined(CONFIG_ARCH_OMAP4)
|
||||
#define OMAP3_UART1_BASE OMAP2_UART1_BASE
|
||||
#define OMAP3_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP3_UART3_BASE 0x49020000
|
||||
#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
|
||||
|
||||
/* OMAP4 serial ports */
|
||||
#define OMAP_UART1_BASE 0x4806a000
|
||||
#define OMAP_UART2_BASE 0x4806c000
|
||||
#define OMAP_UART3_BASE 0x48020000
|
||||
#define OMAP_UART4_BASE 0x4806e000
|
||||
#endif
|
||||
#define OMAP4_UART1_BASE OMAP2_UART1_BASE
|
||||
#define OMAP4_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP4_UART3_BASE 0x48020000
|
||||
#define OMAP4_UART4_BASE 0x4806e000
|
||||
|
||||
/* External port on Zoom2/3 */
|
||||
#define ZOOM_UART_BASE 0x10000000
|
||||
#define ZOOM_UART_VIRT 0xfb000000
|
||||
|
||||
#define OMAP_PORT_SHIFT 2
|
||||
#define OMAP7XX_PORT_SHIFT 0
|
||||
#define ZOOM_PORT_SHIFT 1
|
||||
|
||||
#define OMAP1510_BASE_BAUD (12000000/16)
|
||||
#define OMAP16XX_BASE_BAUD (48000000/16)
|
||||
#define OMAP24XX_BASE_BAUD (48000000/16)
|
||||
|
||||
/*
|
||||
* DEBUG_LL port encoding stored into the UART1 scratchpad register by
|
||||
* decomp_setup in uncompress.h
|
||||
*/
|
||||
#define OMAP1UART1 11
|
||||
#define OMAP1UART2 12
|
||||
#define OMAP1UART3 13
|
||||
#define OMAP2UART1 21
|
||||
#define OMAP2UART2 22
|
||||
#define OMAP2UART3 23
|
||||
#define OMAP3UART1 OMAP2UART1
|
||||
#define OMAP3UART2 OMAP2UART2
|
||||
#define OMAP3UART3 33
|
||||
#define OMAP3UART4 34 /* Only on 36xx */
|
||||
#define OMAP4UART1 OMAP2UART1
|
||||
#define OMAP4UART2 OMAP2UART2
|
||||
#define OMAP4UART3 43
|
||||
#define OMAP4UART4 44
|
||||
#define ZOOM_UART 95 /* Only on zoom2/3 */
|
||||
|
||||
/* This is only used by 8250.c for omap1510 */
|
||||
#define is_omap_port(pt) ({int __ret = 0; \
|
||||
if ((pt)->port.mapbase == OMAP_UART1_BASE || \
|
||||
(pt)->port.mapbase == OMAP_UART2_BASE || \
|
||||
(pt)->port.mapbase == OMAP_UART3_BASE) \
|
||||
if ((pt)->port.mapbase == OMAP1_UART1_BASE || \
|
||||
(pt)->port.mapbase == OMAP1_UART2_BASE || \
|
||||
(pt)->port.mapbase == OMAP1_UART3_BASE) \
|
||||
__ret = 1; \
|
||||
__ret; \
|
||||
})
|
||||
|
||||
@ -19,70 +19,155 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/serial_reg.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <plat/serial.h>
|
||||
|
||||
unsigned int system_rev;
|
||||
static volatile u8 *uart1_base;
|
||||
static int uart1_shift;
|
||||
|
||||
#define UART_OMAP_MDR1 0x08 /* mode definition register */
|
||||
#define OMAP_ID_730 0x355F
|
||||
#define OMAP_ID_850 0x362C
|
||||
#define ID_MASK 0x7fff
|
||||
#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0)
|
||||
#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK
|
||||
static volatile u8 *uart_base;
|
||||
static int uart_shift;
|
||||
|
||||
/*
|
||||
* Store the DEBUG_LL uart number into UART1 scratchpad register.
|
||||
* See also debug-macro.S, and serial.c for related code.
|
||||
*
|
||||
* Please note that we currently assume that:
|
||||
* - UART1 clocks are enabled for register access
|
||||
* - UART1 scratchpad register can be used
|
||||
*/
|
||||
static void set_uart1_scratchpad(unsigned char port)
|
||||
{
|
||||
uart1_base[UART_SCR << uart1_shift] = port;
|
||||
}
|
||||
|
||||
static void putc(int c)
|
||||
{
|
||||
volatile u8 * uart = 0;
|
||||
int shift = 2;
|
||||
|
||||
#ifdef CONFIG_MACH_OMAP_PALMTE
|
||||
return;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP
|
||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
||||
uart = (volatile u8 *)(OMAP_UART3_BASE);
|
||||
#elif defined(CONFIG_OMAP_LL_DEBUG_UART2)
|
||||
uart = (volatile u8 *)(OMAP_UART2_BASE);
|
||||
#elif defined(CONFIG_OMAP_LL_DEBUG_UART1)
|
||||
uart = (volatile u8 *)(OMAP_UART1_BASE);
|
||||
#elif defined(CONFIG_OMAP_LL_DEBUG_NONE)
|
||||
return;
|
||||
#else
|
||||
return;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP1
|
||||
/* Determine which serial port to use */
|
||||
do {
|
||||
/* MMU is not on, so cpu_is_omapXXXX() won't work here */
|
||||
unsigned int omap_id = omap_get_id();
|
||||
|
||||
if (omap_id == OMAP_ID_730 || omap_id == OMAP_ID_850)
|
||||
shift = 0;
|
||||
|
||||
if (check_port(uart, shift))
|
||||
break;
|
||||
/* Silent boot if no serial ports are enabled. */
|
||||
if (!uart_base)
|
||||
return;
|
||||
} while (0);
|
||||
#endif /* CONFIG_ARCH_OMAP1 */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Now, xmit each character
|
||||
*/
|
||||
while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
|
||||
while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
|
||||
barrier();
|
||||
uart[UART_TX << shift] = c;
|
||||
uart_base[UART_TX << uart_shift] = c;
|
||||
}
|
||||
|
||||
static inline void flush(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* Macros to configure UART1 and debug UART
|
||||
*/
|
||||
#define _DEBUG_LL_ENTRY(mach, uart1_phys, uart1_shft, \
|
||||
dbg_uart, dbg_shft, dbg_id) \
|
||||
if (machine_is_##mach()) { \
|
||||
uart1_base = (volatile u8 *)(uart1_phys); \
|
||||
uart1_shift = (uart1_shft); \
|
||||
uart_base = (volatile u8 *)(dbg_uart); \
|
||||
uart_shift = (dbg_shft); \
|
||||
port = (dbg_id); \
|
||||
set_uart1_scratchpad(port); \
|
||||
break; \
|
||||
}
|
||||
|
||||
#define DEBUG_LL_OMAP7XX(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP1_UART1_BASE, OMAP7XX_PORT_SHIFT, \
|
||||
OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, OMAP1UART##p)
|
||||
|
||||
#define DEBUG_LL_OMAP1(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP1_UART1_BASE, OMAP_PORT_SHIFT, \
|
||||
OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP1UART##p)
|
||||
|
||||
#define DEBUG_LL_OMAP2(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP2_UART1_BASE, OMAP_PORT_SHIFT, \
|
||||
OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP2UART##p)
|
||||
|
||||
#define DEBUG_LL_OMAP3(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP3_UART1_BASE, OMAP_PORT_SHIFT, \
|
||||
OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP3UART##p)
|
||||
|
||||
#define DEBUG_LL_OMAP4(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP4_UART1_BASE, OMAP_PORT_SHIFT, \
|
||||
OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP4UART##p)
|
||||
|
||||
/* Zoom2/3 shift is different for UART1 and external port */
|
||||
#define DEBUG_LL_ZOOM(mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP2_UART1_BASE, OMAP_PORT_SHIFT, \
|
||||
ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
|
||||
|
||||
static inline void __arch_decomp_setup(unsigned long arch_id)
|
||||
{
|
||||
int port = 0;
|
||||
|
||||
/*
|
||||
* Initialize the port based on the machine ID from the bootloader.
|
||||
* Note that we're using macros here instead of switch statement
|
||||
* as machine_is functions are optimized out for the boards that
|
||||
* are not selected.
|
||||
*/
|
||||
do {
|
||||
/* omap7xx/8xx based boards using UART1 with shift 0 */
|
||||
DEBUG_LL_OMAP7XX(1, herald);
|
||||
DEBUG_LL_OMAP7XX(1, omap_perseus2);
|
||||
|
||||
/* omap15xx/16xx based boards using UART1 */
|
||||
DEBUG_LL_OMAP1(1, ams_delta);
|
||||
DEBUG_LL_OMAP1(1, nokia770);
|
||||
DEBUG_LL_OMAP1(1, omap_h2);
|
||||
DEBUG_LL_OMAP1(1, omap_h3);
|
||||
DEBUG_LL_OMAP1(1, omap_innovator);
|
||||
DEBUG_LL_OMAP1(1, omap_osk);
|
||||
DEBUG_LL_OMAP1(1, omap_palmte);
|
||||
DEBUG_LL_OMAP1(1, omap_palmz71);
|
||||
|
||||
/* omap15xx/16xx based boards using UART2 */
|
||||
DEBUG_LL_OMAP1(2, omap_palmtt);
|
||||
|
||||
/* omap15xx/16xx based boards using UART3 */
|
||||
DEBUG_LL_OMAP1(3, sx1);
|
||||
|
||||
/* omap2 based boards using UART1 */
|
||||
DEBUG_LL_OMAP2(1, omap2evm);
|
||||
DEBUG_LL_OMAP2(1, omap_2430sdp);
|
||||
DEBUG_LL_OMAP2(1, omap_apollon);
|
||||
DEBUG_LL_OMAP2(1, omap_h4);
|
||||
|
||||
/* omap2 based boards using UART3 */
|
||||
DEBUG_LL_OMAP2(3, nokia_n800);
|
||||
DEBUG_LL_OMAP2(3, nokia_n810);
|
||||
DEBUG_LL_OMAP2(3, nokia_n810_wimax);
|
||||
|
||||
/* omap3 based boards using UART1 */
|
||||
DEBUG_LL_OMAP2(1, omap3evm);
|
||||
DEBUG_LL_OMAP3(1, omap_3430sdp);
|
||||
DEBUG_LL_OMAP3(1, omap_3630sdp);
|
||||
|
||||
/* omap3 based boards using UART3 */
|
||||
DEBUG_LL_OMAP3(3, cm_t35);
|
||||
DEBUG_LL_OMAP3(3, igep0020);
|
||||
DEBUG_LL_OMAP3(3, nokia_rx51);
|
||||
DEBUG_LL_OMAP3(3, omap3517evm);
|
||||
DEBUG_LL_OMAP3(3, omap3_beagle);
|
||||
DEBUG_LL_OMAP3(3, omap3_pandora);
|
||||
DEBUG_LL_OMAP3(3, omap_ldp);
|
||||
DEBUG_LL_OMAP3(3, overo);
|
||||
DEBUG_LL_OMAP3(3, touchbook);
|
||||
|
||||
/* omap4 based boards using UART3 */
|
||||
DEBUG_LL_OMAP4(3, omap_4430sdp);
|
||||
|
||||
/* zoom2/3 external uart */
|
||||
DEBUG_LL_ZOOM(omap_zoom2);
|
||||
DEBUG_LL_ZOOM(omap_zoom3);
|
||||
|
||||
} while (0);
|
||||
}
|
||||
|
||||
#define arch_decomp_setup() __arch_decomp_setup(arch_id)
|
||||
|
||||
/*
|
||||
* nothing to do
|
||||
*/
|
||||
#define arch_decomp_setup()
|
||||
#define arch_decomp_wdog()
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
.macro addruart,rx
|
||||
.macro addruart, rx, tmp
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x80000000 @ physical base address
|
||||
|
||||
Loading…
Reference in New Issue
Block a user