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MIPS: xilfpga: Add DT node for AXI emaclite

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The xilfpga platform has a Xilinx AXI emaclite block.

Add the DT node to use it.

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Zubair Lutfullah Kakakhel 2016-11-22 17:52:42 +00:00 committed by Ralf Baechle
parent da621d5022
commit beb6e9b368
1 changed files with 26 additions and 0 deletions
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26
arch/mips/boot/dts/xilfpga/nexys4ddr.dts
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@ -42,6 +42,32 @@
xlnx,tri-default = <0xffffffff>;
} ;
axi_ethernetlite: ethernet@10e00000 {
compatible = "xlnx,xps-ethernetlite-3.00.a";
device_type = "network";
interrupt-parent = <&axi_intc>;
interrupts = <1>;
phy-handle = <&phy0>;
reg = <0x10e00000 0x10000>;
xlnx,duplex = <0x1>;
xlnx,include-global-buffers = <0x1>;
xlnx,include-internal-loopback = <0x0>;
xlnx,include-mdio = <0x1>;
xlnx,instance = "axi_ethernetlite_inst";
xlnx,rx-ping-pong = <0x1>;
xlnx,s-axi-id-width = <0x1>;
xlnx,tx-ping-pong = <0x1>;
xlnx,use-internal = <0x0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@1 {
device_type = "ethernet-phy";
reg = <1>;
};
};
};
axi_uart16550: serial@10400000 {
compatible = "ns16550a";
reg = <0x10400000 0x10000>;