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ide: add ->cable_detect method to ide_hwif_t
* Add ->cable_detect method to ide_hwif_t. * Call the new method in ide_init_port() if: - the host supports UDMA modes > UDMA2 ('hwif->ultra_mask & 78') - DMA initialization was successful (if hwif->dma_base is not set ide_init_port() sets hwif->ultra_mask to zero) - "idex=ata66" is not used ('hwif->cbl != ATA_CBL_PATA40_SHORT') * Convert PCI host drivers to use ->cable_detect method. While at it: * Factor out cable detection to separate functions (if not already done). * hpt366.c/it8213.c/slc90e66.c: - don't check cable type if "idex=ata66" is used * pdc202xx_new.c: - add __devinit tag to pdcnew_cable_detect() * pdc202xx_old.c: - rename pdc202xx_old_cable_detect() to pdc2026x_old_cable_detect() - add __devinit tag to pdc2026x_old_cable_detect() Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
parent
c413b9b94d
commit
bfa14b42a3
@ -1343,6 +1343,11 @@ static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
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/* call chipset specific routine for each enabled port */
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if (d->init_hwif)
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d->init_hwif(hwif);
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if (hwif->cable_detect && (hwif->ultra_mask & 0x78)) {
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = hwif->cable_detect(hwif);
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}
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}
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int ide_device_add_all(u8 *idx, const struct ide_port_info *d)
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@ -166,6 +166,16 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
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return dev->irq;
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}
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static u8 __devinit atp86x_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
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pci_read_config_byte(dev, 0x49, &ata66);
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return (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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}
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static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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@ -174,21 +184,10 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
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if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
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hwif->set_dma_mode = &aec6210_set_mode;
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else
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else {
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hwif->set_dma_mode = &aec6260_set_mode;
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if (hwif->dma_base == 0)
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return;
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if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
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return;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
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u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
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pci_read_config_byte(dev, 0x49, &ata66);
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hwif->cbl = (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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hwif->cable_detect = atp86x_cable_detect;
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}
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}
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@ -666,13 +666,12 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
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hwif->set_dma_mode = &ali_set_dma_mode;
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hwif->udma_filter = &ali_udma_filter;
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hwif->cable_detect = ata66_ali15x3;
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if (hwif->dma_base == 0)
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return;
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hwif->dma_setup = &ali15x3_dma_setup;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = ata66_ali15x3(hwif);
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}
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/**
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@ -199,6 +199,14 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev,
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return dev->irq;
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}
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static u8 __devinit amd_cable_detect(ide_hwif_t *hwif)
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{
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if ((amd_80w >> hwif->channel) & 1)
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return ATA_CBL_PATA80;
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else
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return ATA_CBL_PATA40;
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}
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static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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@ -209,15 +217,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
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hwif->set_pio_mode = &amd_set_pio_mode;
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hwif->set_dma_mode = &amd_set_drive;
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if (!hwif->dma_base)
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return;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
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if ((amd_80w >> hwif->channel) & 1)
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hwif->cbl = ATA_CBL_PATA80;
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else
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hwif->cbl = ATA_CBL_PATA40;
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}
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hwif->cable_detect = amd_cable_detect;
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}
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#define IDE_HFLAGS_AMD \
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@ -147,11 +147,7 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
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hwif->set_pio_mode = &atiixp_set_pio_mode;
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hwif->set_dma_mode = &atiixp_set_dma_mode;
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if (!hwif->dma_base)
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return;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = atiixp_cable_detect(hwif);
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hwif->cable_detect = atiixp_cable_detect;
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}
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static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
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@ -393,6 +393,8 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
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hwif->set_pio_mode = &cmd64x_set_pio_mode;
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hwif->set_dma_mode = &cmd64x_set_dma_mode;
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hwif->cable_detect = ata66_cmd64x;
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if (!hwif->dma_base)
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return;
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@ -411,9 +413,6 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
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if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
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hwif->ultra_mask = 0x00;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = ata66_cmd64x(hwif);
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switch (dev->device) {
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case PCI_DEVICE_ID_CMD_648:
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case PCI_DEVICE_ID_CMD_649:
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@ -179,11 +179,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
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hwif->set_pio_mode = &cs5535_set_pio_mode;
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hwif->set_dma_mode = &cs5535_set_dma_mode;
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if (hwif->dma_base == 0)
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return;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = cs5535_cable_detect(hwif);
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hwif->cable_detect = cs5535_cable_detect;
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}
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static const struct ide_port_info cs5535_chipset __devinitdata = {
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@ -1279,12 +1279,55 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha
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return dev->irq;
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}
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static u8 __devinit hpt3xx_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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struct hpt_info *info = pci_get_drvdata(dev);
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u8 chip_type = info->chip_type;
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u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02;
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/*
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* The HPT37x uses the CBLID pins as outputs for MA15/MA16
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* address lines to access an external EEPROM. To read valid
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* cable detect state the pins must be enabled as inputs.
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*/
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if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) {
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/*
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* HPT374 PCI function 1
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* - set bit 15 of reg 0x52 to enable TCBLID as input
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* - set bit 15 of reg 0x56 to enable FCBLID as input
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*/
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u8 mcr_addr = hwif->select_data + 2;
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u16 mcr;
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pci_read_config_word(dev, mcr_addr, &mcr);
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pci_write_config_word(dev, mcr_addr, (mcr | 0x8000));
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/* now read cable id register */
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pci_read_config_byte(dev, 0x5a, &scr1);
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pci_write_config_word(dev, mcr_addr, mcr);
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} else if (chip_type >= HPT370) {
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/*
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* HPT370/372 and 374 pcifn 0
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* - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs
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*/
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u8 scr2 = 0;
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pci_read_config_byte(dev, 0x5b, &scr2);
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pci_write_config_byte(dev, 0x5b, (scr2 & ~1));
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/* now read cable id register */
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pci_read_config_byte(dev, 0x5a, &scr1);
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pci_write_config_byte(dev, 0x5b, scr2);
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} else
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pci_read_config_byte(dev, 0x5a, &scr1);
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return (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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}
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static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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struct hpt_info *info = pci_get_drvdata(dev);
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int serialize = HPT_SERIALIZE_IO;
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u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02;
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u8 chip_type = info->chip_type;
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u8 new_mcr, old_mcr = 0;
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@ -1301,6 +1344,8 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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hwif->udma_filter = &hpt3xx_udma_filter;
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hwif->mdma_filter = &hpt3xx_mdma_filter;
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hwif->cable_detect = hpt3xx_cable_detect;
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/*
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* HPT3xxN chips have some complications:
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*
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@ -1346,43 +1391,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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if (hwif->dma_base == 0)
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return;
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/*
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* The HPT37x uses the CBLID pins as outputs for MA15/MA16
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* address lines to access an external EEPROM. To read valid
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* cable detect state the pins must be enabled as inputs.
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*/
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if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) {
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/*
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* HPT374 PCI function 1
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* - set bit 15 of reg 0x52 to enable TCBLID as input
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* - set bit 15 of reg 0x56 to enable FCBLID as input
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*/
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u8 mcr_addr = hwif->select_data + 2;
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u16 mcr;
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pci_read_config_word (dev, mcr_addr, &mcr);
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pci_write_config_word(dev, mcr_addr, (mcr | 0x8000));
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/* now read cable id register */
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pci_read_config_byte (dev, 0x5a, &scr1);
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pci_write_config_word(dev, mcr_addr, mcr);
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} else if (chip_type >= HPT370) {
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/*
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* HPT370/372 and 374 pcifn 0
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* - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs
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*/
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u8 scr2 = 0;
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pci_read_config_byte (dev, 0x5b, &scr2);
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pci_write_config_byte(dev, 0x5b, (scr2 & ~1));
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/* now read cable id register */
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pci_read_config_byte (dev, 0x5a, &scr1);
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pci_write_config_byte(dev, 0x5b, scr2);
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} else
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pci_read_config_byte (dev, 0x5a, &scr1);
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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if (chip_type >= HPT374) {
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hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
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hwif->ide_dma_end = &hpt374_ide_dma_end;
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@ -143,6 +143,16 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
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}
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}
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static u8 __devinit it8213_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 reg42h = 0;
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pci_read_config_byte(dev, 0x42, ®42h);
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return (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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}
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/**
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* init_hwif_it8213 - set up hwif structs
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* @hwif: interface to set up
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@ -152,19 +162,10 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
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static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 reg42h = 0;
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hwif->set_dma_mode = &it8213_set_dma_mode;
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hwif->set_pio_mode = &it8213_set_pio_mode;
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if (!hwif->dma_base)
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return;
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pci_read_config_byte(dev, 0x42, ®42h);
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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hwif->cable_detect = it8213_cable_detect;
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}
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@ -579,14 +579,13 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
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} else
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hwif->host_flags |= IDE_HFLAG_NO_SET_MODE;
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hwif->cable_detect = ata66_it821x;
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if (hwif->dma_base == 0)
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return;
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hwif->ultra_mask = ATA_UDMA6;
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hwif->mwdma_mask = ATA_MWDMA2;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = ata66_it821x(hwif);
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}
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static void __devinit it8212_disable_raid(struct pci_dev *dev)
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@ -111,11 +111,7 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
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hwif->set_pio_mode = &jmicron_set_pio_mode;
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hwif->set_dma_mode = &jmicron_set_dma_mode;
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if (hwif->dma_base == 0)
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return;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = ata66_jmicron(hwif);
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hwif->cable_detect = ata66_jmicron;
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}
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static const struct ide_port_info jmicron_chipset __devinitdata = {
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@ -197,7 +197,7 @@ static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio)
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}
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}
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static u8 pdcnew_cable_detect(ide_hwif_t *hwif)
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static u8 __devinit pdcnew_cable_detect(ide_hwif_t *hwif)
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{
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if (get_indexed_reg(hwif, 0x0b) & 0x04)
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return ATA_CBL_PATA40;
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@ -456,11 +456,7 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
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hwif->quirkproc = &pdcnew_quirkproc;
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hwif->resetproc = &pdcnew_reset;
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if (hwif->dma_base == 0)
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return;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = pdcnew_cable_detect(hwif);
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hwif->cable_detect = pdcnew_cable_detect;
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}
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static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
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@ -140,7 +140,7 @@ static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
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pdc202xx_set_mode(drive, XFER_PIO_0 + pio);
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}
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static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
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static u8 __devinit pdc2026x_old_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10);
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@ -311,9 +311,12 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
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hwif->quirkproc = &pdc202xx_quirkproc;
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if (dev->device != PCI_DEVICE_ID_PROMISE_20246)
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if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
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hwif->resetproc = &pdc202xx_reset;
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hwif->cable_detect = pdc2026x_old_cable_detect;
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}
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if (hwif->dma_base == 0)
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return;
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@ -321,9 +324,6 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
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hwif->dma_timeout = &pdc202xx_dma_timeout;
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if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = pdc202xx_old_cable_detect(hwif);
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hwif->dma_start = &pdc202xx_old_ide_dma_start;
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hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
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}
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@ -290,14 +290,11 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
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||||
hwif->set_pio_mode = &piix_set_pio_mode;
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||||
hwif->set_dma_mode = &piix_set_dma_mode;
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||||
|
||||
hwif->cable_detect = piix_cable_detect;
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||||
|
||||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
if (hwif->ultra_mask & 0x78) {
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = piix_cable_detect(hwif);
|
||||
}
|
||||
|
||||
if (no_piix_dma)
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||||
hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
|
||||
}
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||||
|
@ -683,8 +683,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
|
||||
else
|
||||
hwif->ultra_mask = ATA_UDMA5; /* 100MHz */
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = scc_cable_detect(hwif);
|
||||
hwif->cable_detect = scc_cable_detect;
|
||||
}
|
||||
|
||||
#define DECLARE_SCC_DEV(name_str) \
|
||||
|
@ -346,13 +346,8 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
|
||||
hwif->set_dma_mode = &svwks_set_dma_mode;
|
||||
hwif->udma_filter = &svwks_udma_filter;
|
||||
|
||||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
if (dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = ata66_svwks(hwif);
|
||||
}
|
||||
if (dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE)
|
||||
hwif->cable_detect = ata66_svwks;
|
||||
}
|
||||
|
||||
#define IDE_HFLAGS_SVWKS \
|
||||
|
@ -827,15 +827,14 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
|
||||
} else
|
||||
hwif->udma_filter = &sil_pata_udma_filter;
|
||||
|
||||
hwif->cable_detect = ata66_siimage;
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
||||
if (sata)
|
||||
hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = ata66_siimage(hwif);
|
||||
|
||||
if (hwif->mmio) {
|
||||
hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq;
|
||||
} else {
|
||||
|
@ -565,13 +565,12 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
|
||||
if (chipset_family >= ATA_133)
|
||||
hwif->udma_filter = sis5513_ata133_udma_filter;
|
||||
|
||||
hwif->cable_detect = ata66_sis5513;
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
|
||||
hwif->ultra_mask = udma_rates[chipset_family];
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = ata66_sis5513(hwif);
|
||||
}
|
||||
|
||||
static const struct ide_port_info sis5513_chipset __devinitdata = {
|
||||
|
@ -118,23 +118,23 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
|
||||
}
|
||||
}
|
||||
|
||||
static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
|
||||
static u8 __devinit slc90e66_cable_detect(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
u8 reg47 = 0;
|
||||
u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */
|
||||
|
||||
hwif->set_pio_mode = &slc90e66_set_pio_mode;
|
||||
hwif->set_dma_mode = &slc90e66_set_dma_mode;
|
||||
u8 reg47 = 0, mask = hwif->channel ? 0x01 : 0x02;
|
||||
|
||||
pci_read_config_byte(dev, 0x47, ®47);
|
||||
|
||||
if (hwif->dma_base == 0)
|
||||
return;
|
||||
/* bit[0(1)]: 0:80, 1:40 */
|
||||
return (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
|
||||
}
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
/* bit[0(1)]: 0:80, 1:40 */
|
||||
hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
|
||||
static void __devinit init_hwif_slc90e66(ide_hwif_t *hwif)
|
||||
{
|
||||
hwif->set_pio_mode = &slc90e66_set_pio_mode;
|
||||
hwif->set_dma_mode = &slc90e66_set_dma_mode;
|
||||
|
||||
hwif->cable_detect = slc90e66_cable_detect;
|
||||
}
|
||||
|
||||
static const struct ide_port_info slc90e66_chipset __devinitdata = {
|
||||
|
@ -160,6 +160,19 @@ static int tc86c001_busproc(ide_drive_t *drive, int state)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u8 __devinit tc86c001_cable_detect(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
unsigned long sc_base = pci_resource_start(dev, 5);
|
||||
u16 scr1 = inw(sc_base + 0x00);
|
||||
|
||||
/*
|
||||
* System Control 1 Register bit 13 (PDIAGN):
|
||||
* 0=80-pin cable, 1=40-pin cable
|
||||
*/
|
||||
return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
|
||||
}
|
||||
|
||||
static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
|
||||
{
|
||||
struct pci_dev *dev = to_pci_dev(hwif->dev);
|
||||
@ -183,6 +196,8 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
|
||||
|
||||
hwif->busproc = &tc86c001_busproc;
|
||||
|
||||
hwif->cable_detect = tc86c001_cable_detect;
|
||||
|
||||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
@ -196,15 +211,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
|
||||
hwif->rqsize = 0xffff;
|
||||
|
||||
hwif->dma_start = &tc86c001_dma_start;
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
|
||||
/*
|
||||
* System Control 1 Register bit 13 (PDIAGN):
|
||||
* 0=80-pin cable, 1=40-pin cable
|
||||
*/
|
||||
scr1 = inw(sc_base + 0x00);
|
||||
hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
|
||||
}
|
||||
}
|
||||
|
||||
static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
|
||||
|
@ -424,11 +424,7 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
|
||||
hwif->set_pio_mode = &via_set_pio_mode;
|
||||
hwif->set_dma_mode = &via_set_drive;
|
||||
|
||||
if (!hwif->dma_base)
|
||||
return;
|
||||
|
||||
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
|
||||
hwif->cbl = via82cxxx_cable_detect(hwif);
|
||||
hwif->cable_detect = via82cxxx_cable_detect;
|
||||
}
|
||||
|
||||
static const struct ide_port_info via82cxxx_chipset __devinitdata = {
|
||||
|
@ -535,6 +535,8 @@ typedef struct hwif_s {
|
||||
u8 (*mdma_filter)(ide_drive_t *);
|
||||
u8 (*udma_filter)(ide_drive_t *);
|
||||
|
||||
u8 (*cable_detect)(struct hwif_s *);
|
||||
|
||||
void (*ata_input_data)(ide_drive_t *, void *, u32);
|
||||
void (*ata_output_data)(ide_drive_t *, void *, u32);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user