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[ARM] S3C: Make common <plat/dma.h> header
Move the common information from the <mach/dma.h> header into a new shareable <plat/dma.h> header for re-use on the s3c64xx. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks
Ben Dooks
parent
023b40cd10
commit
c133c29011
@ -13,6 +13,7 @@
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#ifndef __ASM_ARCH_DMA_H
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#define __ASM_ARCH_DMA_H __FILE__
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#include <plat/dma.h>
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#include <linux/sysdev.h>
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#include <mach/hardware.h>
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@ -103,32 +104,6 @@ enum s3c2410_dma_loadst {
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S3C2410_DMALOAD_1LOADED_1RUNNING,
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};
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enum s3c2410_dma_buffresult {
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S3C2410_RES_OK,
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S3C2410_RES_ERR,
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S3C2410_RES_ABORT
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};
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enum s3c2410_dmasrc {
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S3C2410_DMASRC_HW, /* source is memory */
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S3C2410_DMASRC_MEM /* source is hardware */
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};
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/* enum s3c2410_chan_op
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*
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* operation codes passed to the DMA code by the user, and also used
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* to inform the current channel owner of any changes to the system state
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*/
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enum s3c2410_chan_op {
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S3C2410_DMAOP_START,
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S3C2410_DMAOP_STOP,
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S3C2410_DMAOP_PAUSE,
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S3C2410_DMAOP_RESUME,
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S3C2410_DMAOP_FLUSH,
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S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
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S3C2410_DMAOP_STARTED, /* indicate channel started */
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};
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/* flags */
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@ -138,17 +113,14 @@ enum s3c2410_chan_op {
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/* dma buffer */
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struct s3c2410_dma_client {
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char *name;
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};
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struct s3c2410_dma_buf;
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/* s3c2410_dma_buf_s
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/* s3c2410_dma_buf
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*
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* internally used buffer structure to describe a queued or running
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* buffer.
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*/
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struct s3c2410_dma_buf;
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struct s3c2410_dma_buf {
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struct s3c2410_dma_buf *next;
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int magic; /* magic */
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@ -160,20 +132,6 @@ struct s3c2410_dma_buf {
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/* [1] is this updated for both recv/send modes? */
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struct s3c2410_dma_chan;
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/* s3c2410_dma_cbfn_t
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*
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* buffer callback routine type
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*/
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typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
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void *buf, int size,
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enum s3c2410_dma_buffresult result);
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typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
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enum s3c2410_chan_op );
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struct s3c2410_dma_stats {
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unsigned long loads;
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unsigned long timeout_longest;
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@ -241,73 +199,4 @@ extern struct s3c2410_dma_chan s3c2410_chans[];
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/* note, we don't really use dma_device_t at the moment */
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typedef unsigned long dma_device_t;
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/* functions --------------------------------------------------------------- */
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/* s3c2410_dma_request
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*
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* request a dma channel exclusivley
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*/
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extern int s3c2410_dma_request(unsigned int channel,
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struct s3c2410_dma_client *, void *dev);
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/* s3c2410_dma_ctrl
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*
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* change the state of the dma channel
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*/
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extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);
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/* s3c2410_dma_setflags
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*
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* set the channel's flags to a given state
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*/
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extern int s3c2410_dma_setflags(unsigned int channel,
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unsigned int flags);
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/* s3c2410_dma_free
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*
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* free the dma channel (will also abort any outstanding operations)
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*/
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extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);
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/* s3c2410_dma_enqueue
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*
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* place the given buffer onto the queue of operations for the channel.
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* The buffer must be allocated from dma coherent memory, or the Dcache/WB
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* drained before the buffer is given to the DMA system.
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*/
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extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
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dma_addr_t data, int size);
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/* s3c2410_dma_config
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*
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* configure the dma channel
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*/
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extern int s3c2410_dma_config(unsigned int channel, int xferunit);
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/* s3c2410_dma_devconfig
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*
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* configure the device we're talking to
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*/
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extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
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unsigned long devaddr);
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/* s3c2410_dma_getposition
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*
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* get the position that the dma transfer is currently at
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*/
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extern int s3c2410_dma_getposition(unsigned int channel,
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dma_addr_t *src, dma_addr_t *dest);
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extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
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extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);
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#endif /* __ASM_ARCH_DMA_H */
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127
arch/arm/plat-s3c/include/plat/dma.h
Normal file
127
arch/arm/plat-s3c/include/plat/dma.h
Normal file
@ -0,0 +1,127 @@
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/* arch/arm/plat-s3c/include/plat/dma.h
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*
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* Copyright (C) 2003,2004,2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Samsung S3C DMA support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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enum s3c2410_dma_buffresult {
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S3C2410_RES_OK,
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S3C2410_RES_ERR,
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S3C2410_RES_ABORT
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};
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enum s3c2410_dmasrc {
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S3C2410_DMASRC_HW, /* source is memory */
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S3C2410_DMASRC_MEM /* source is hardware */
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};
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/* enum s3c2410_chan_op
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*
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* operation codes passed to the DMA code by the user, and also used
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* to inform the current channel owner of any changes to the system state
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*/
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enum s3c2410_chan_op {
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S3C2410_DMAOP_START,
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S3C2410_DMAOP_STOP,
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S3C2410_DMAOP_PAUSE,
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S3C2410_DMAOP_RESUME,
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S3C2410_DMAOP_FLUSH,
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S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
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S3C2410_DMAOP_STARTED, /* indicate channel started */
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};
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struct s3c2410_dma_client {
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char *name;
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};
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struct s3c2410_dma_chan;
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/* s3c2410_dma_cbfn_t
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*
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* buffer callback routine type
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*/
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typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
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void *buf, int size,
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enum s3c2410_dma_buffresult result);
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typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
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enum s3c2410_chan_op );
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/* s3c2410_dma_request
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*
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* request a dma channel exclusivley
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*/
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extern int s3c2410_dma_request(unsigned int channel,
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struct s3c2410_dma_client *, void *dev);
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/* s3c2410_dma_ctrl
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*
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* change the state of the dma channel
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*/
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extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);
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/* s3c2410_dma_setflags
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*
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* set the channel's flags to a given state
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*/
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extern int s3c2410_dma_setflags(unsigned int channel,
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unsigned int flags);
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/* s3c2410_dma_free
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*
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* free the dma channel (will also abort any outstanding operations)
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*/
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extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);
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/* s3c2410_dma_enqueue
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*
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* place the given buffer onto the queue of operations for the channel.
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* The buffer must be allocated from dma coherent memory, or the Dcache/WB
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* drained before the buffer is given to the DMA system.
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*/
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extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
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dma_addr_t data, int size);
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/* s3c2410_dma_config
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*
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* configure the dma channel
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*/
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extern int s3c2410_dma_config(unsigned int channel, int xferunit);
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/* s3c2410_dma_devconfig
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*
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* configure the device we're talking to
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*/
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extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
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unsigned long devaddr);
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/* s3c2410_dma_getposition
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*
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* get the position that the dma transfer is currently at
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*/
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extern int s3c2410_dma_getposition(unsigned int channel,
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dma_addr_t *src, dma_addr_t *dest);
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extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
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extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);
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