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[media] media: add new mediabus format enums for dm365
add new enum entries for supporting the media-bus formats on dm365. These include some bayer and some non-bayer formats. V4L2_MBUS_FMT_YDYUYDYV8_1X16 and V4L2_MBUS_FMT_UV8_1X8 are used internal to the hardware by the resizer. V4L2_MBUS_FMT_SBGGR10_ALAW8_1X8 represents the bayer ALAW format that is supported by dm365 hardware. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Acked-by: Sakari Ailus <sakari.ailus@iki.fi> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -353,9 +353,9 @@
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<listitem><para>The number of bits per pixel component. All components are
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transferred on the same number of bits. Common values are 8, 10 and 12.</para>
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</listitem>
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<listitem><para>If the pixel components are DPCM-compressed, a mention of the
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DPCM compression and the number of bits per compressed pixel component.</para>
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</listitem>
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<listitem><para>The compression (optional). If the pixel components are
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ALAW- or DPCM-compressed, a mention of the compression scheme and the
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number of bits per compressed pixel component.</para></listitem>
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<listitem><para>The number of bus samples per pixel. Pixels that are wider than
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the bus width must be transferred in multiple samples. Common values are
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1 and 2.</para></listitem>
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@ -504,6 +504,74 @@
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<entry>r<subscript>1</subscript></entry>
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<entry>r<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-SBGGR10-ALAW8-1X8">
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<entry>V4L2_MBUS_FMT_SBGGR10_ALAW8_1X8</entry>
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<entry>0x3015</entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>b<subscript>7</subscript></entry>
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<entry>b<subscript>6</subscript></entry>
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<entry>b<subscript>5</subscript></entry>
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<entry>b<subscript>4</subscript></entry>
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<entry>b<subscript>3</subscript></entry>
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<entry>b<subscript>2</subscript></entry>
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<entry>b<subscript>1</subscript></entry>
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<entry>b<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-SGBRG10-ALAW8-1X8">
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<entry>V4L2_MBUS_FMT_SGBRG10_ALAW8_1X8</entry>
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<entry>0x3016</entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>g<subscript>7</subscript></entry>
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<entry>g<subscript>6</subscript></entry>
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<entry>g<subscript>5</subscript></entry>
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<entry>g<subscript>4</subscript></entry>
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<entry>g<subscript>3</subscript></entry>
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<entry>g<subscript>2</subscript></entry>
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<entry>g<subscript>1</subscript></entry>
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<entry>g<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-SGRBG10-ALAW8-1X8">
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<entry>V4L2_MBUS_FMT_SGRBG10_ALAW8_1X8</entry>
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<entry>0x3017</entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>g<subscript>7</subscript></entry>
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<entry>g<subscript>6</subscript></entry>
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<entry>g<subscript>5</subscript></entry>
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<entry>g<subscript>4</subscript></entry>
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<entry>g<subscript>3</subscript></entry>
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<entry>g<subscript>2</subscript></entry>
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<entry>g<subscript>1</subscript></entry>
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<entry>g<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-SRGGB10-ALAW8-1X8">
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<entry>V4L2_MBUS_FMT_SRGGB10_ALAW8_1X8</entry>
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<entry>0x3018</entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>r<subscript>7</subscript></entry>
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<entry>r<subscript>6</subscript></entry>
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<entry>r<subscript>5</subscript></entry>
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<entry>r<subscript>4</subscript></entry>
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<entry>r<subscript>3</subscript></entry>
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<entry>r<subscript>2</subscript></entry>
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<entry>r<subscript>1</subscript></entry>
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<entry>r<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-SBGGR10-DPCM8-1X8">
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<entry>V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8</entry>
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<entry>0x300b</entry>
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@ -853,10 +921,16 @@
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<title>Packed YUV Formats</title>
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<para>Those data formats transfer pixel data as (possibly downsampled) Y, U
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and V components. The format code is made of the following information.
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and V components. Some formats include dummy bits in some of their samples
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and are collectively referred to as "YDYC" (Y-Dummy-Y-Chroma) formats.
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One cannot rely on the values of these dummy bits as those are undefined.
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</para>
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<para>The format code is made of the following information.
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<itemizedlist>
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<listitem><para>The Y, U and V components order code, as transferred on the
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bus. Possible values are YUYV, UYVY, YVYU and VYUY.</para></listitem>
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bus. Possible values are YUYV, UYVY, YVYU and VYUY for formats with no
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dummy bit, and YDYUYDYV, YDYVYDYU, YUYDYVYD and YVYDYUYD for YDYC formats.
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</para></listitem>
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<listitem><para>The number of bits per pixel component. All components are
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transferred on the same number of bits. Common values are 8, 10 and 12.</para>
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</listitem>
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@ -877,7 +951,21 @@
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U, Y, V, Y order will be named <constant>V4L2_MBUS_FMT_UYVY8_2X8</constant>.
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</para>
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<para>The following table lisst existing packet YUV formats.</para>
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<para><xref linkend="v4l2-mbus-pixelcode-yuv8"/> list existing packet YUV
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formats and describes the organization of each pixel data in each sample.
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When a format pattern is split across multiple samples each of the samples
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in the pattern is described.</para>
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<para>The role of each bit transferred over the bus is identified by one
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of the following codes.</para>
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<itemizedlist>
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<listitem><para>y<subscript>x</subscript> for luma component bit number x</para></listitem>
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<listitem><para>u<subscript>x</subscript> for blue chroma component bit number x</para></listitem>
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<listitem><para>v<subscript>x</subscript> for red chroma component bit number x</para></listitem>
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<listitem><para>- for non-available bits (for positions higher than the bus width)</para></listitem>
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<listitem><para>d for dummy bits</para></listitem>
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</itemizedlist>
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<table pgwide="0" frame="none" id="v4l2-mbus-pixelcode-yuv8">
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<title>YUV Formats</title>
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@ -965,6 +1053,56 @@
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<entry>y<subscript>1</subscript></entry>
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<entry>y<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-UV8-1X8">
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<entry>V4L2_MBUS_FMT_UV8_1X8</entry>
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<entry>0x2015</entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>u<subscript>7</subscript></entry>
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<entry>u<subscript>6</subscript></entry>
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<entry>u<subscript>5</subscript></entry>
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<entry>u<subscript>4</subscript></entry>
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<entry>u<subscript>3</subscript></entry>
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<entry>u<subscript>2</subscript></entry>
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<entry>u<subscript>1</subscript></entry>
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<entry>u<subscript>0</subscript></entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>v<subscript>7</subscript></entry>
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<entry>v<subscript>6</subscript></entry>
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<entry>v<subscript>5</subscript></entry>
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<entry>v<subscript>4</subscript></entry>
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<entry>v<subscript>3</subscript></entry>
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<entry>v<subscript>2</subscript></entry>
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<entry>v<subscript>1</subscript></entry>
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<entry>v<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-UYVY8-1_5X8">
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<entry>V4L2_MBUS_FMT_UYVY8_1_5X8</entry>
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<entry>0x2002</entry>
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@ -2415,6 +2553,106 @@
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<entry>u<subscript>1</subscript></entry>
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<entry>u<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-YDYUYDYV8-1X16">
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<entry>V4L2_MBUS_FMT_YDYUYDYV8_1X16</entry>
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<entry>0x2014</entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>y<subscript>7</subscript></entry>
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<entry>y<subscript>6</subscript></entry>
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<entry>y<subscript>5</subscript></entry>
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<entry>y<subscript>4</subscript></entry>
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<entry>y<subscript>3</subscript></entry>
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<entry>y<subscript>2</subscript></entry>
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<entry>y<subscript>1</subscript></entry>
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<entry>y<subscript>0</subscript></entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>y<subscript>7</subscript></entry>
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<entry>y<subscript>6</subscript></entry>
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<entry>y<subscript>5</subscript></entry>
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<entry>y<subscript>4</subscript></entry>
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<entry>y<subscript>3</subscript></entry>
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<entry>y<subscript>2</subscript></entry>
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<entry>y<subscript>1</subscript></entry>
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<entry>y<subscript>0</subscript></entry>
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<entry>u<subscript>7</subscript></entry>
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<entry>u<subscript>6</subscript></entry>
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<entry>u<subscript>5</subscript></entry>
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<entry>u<subscript>4</subscript></entry>
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<entry>u<subscript>3</subscript></entry>
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<entry>u<subscript>2</subscript></entry>
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<entry>u<subscript>1</subscript></entry>
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<entry>u<subscript>0</subscript></entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>y<subscript>7</subscript></entry>
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<entry>y<subscript>6</subscript></entry>
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<entry>y<subscript>5</subscript></entry>
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<entry>y<subscript>4</subscript></entry>
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<entry>y<subscript>3</subscript></entry>
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<entry>y<subscript>2</subscript></entry>
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<entry>y<subscript>1</subscript></entry>
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<entry>y<subscript>0</subscript></entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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<entry>d</entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry></entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>-</entry>
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<entry>y<subscript>7</subscript></entry>
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<entry>y<subscript>6</subscript></entry>
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<entry>y<subscript>5</subscript></entry>
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<entry>y<subscript>4</subscript></entry>
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<entry>y<subscript>3</subscript></entry>
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<entry>y<subscript>2</subscript></entry>
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<entry>y<subscript>1</subscript></entry>
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<entry>y<subscript>0</subscript></entry>
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<entry>v<subscript>7</subscript></entry>
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<entry>v<subscript>6</subscript></entry>
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<entry>v<subscript>5</subscript></entry>
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<entry>v<subscript>4</subscript></entry>
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<entry>v<subscript>3</subscript></entry>
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<entry>v<subscript>2</subscript></entry>
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<entry>v<subscript>1</subscript></entry>
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<entry>v<subscript>0</subscript></entry>
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</row>
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<row id="V4L2-MBUS-FMT-YUYV10-1X20">
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<entry>V4L2_MBUS_FMT_YUYV10_1X20</entry>
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<entry>0x200d</entry>
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@ -47,8 +47,9 @@ enum v4l2_mbus_pixelcode {
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V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007,
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V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008,
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/* YUV (including grey) - next is 0x2014 */
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/* YUV (including grey) - next is 0x2016 */
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V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
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V4L2_MBUS_FMT_UV8_1X8 = 0x2015,
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V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
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V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003,
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V4L2_MBUS_FMT_YUYV8_1_5X8 = 0x2004,
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@ -65,14 +66,19 @@ enum v4l2_mbus_pixelcode {
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V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010,
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V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
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V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
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V4L2_MBUS_FMT_YDYUYDYV8_1X16 = 0x2014,
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V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
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V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
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/* Bayer - next is 0x3015 */
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/* Bayer - next is 0x3019 */
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V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
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V4L2_MBUS_FMT_SGBRG8_1X8 = 0x3013,
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V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002,
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V4L2_MBUS_FMT_SRGGB8_1X8 = 0x3014,
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V4L2_MBUS_FMT_SBGGR10_ALAW8_1X8 = 0x3015,
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V4L2_MBUS_FMT_SGBRG10_ALAW8_1X8 = 0x3016,
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V4L2_MBUS_FMT_SGRBG10_ALAW8_1X8 = 0x3017,
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V4L2_MBUS_FMT_SRGGB10_ALAW8_1X8 = 0x3018,
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V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b,
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V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c,
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V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009,
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