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clk: mux: Add support for read-only muxes.
Some platforms have read-only clock muxes that are preconfigured at reset and cannot be changed at runtime. This patch extends mux clock driver to allow handling such read-only muxes by adding new CLK_MUX_READ_ONLY mux flag. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -107,6 +107,11 @@ const struct clk_ops clk_mux_ops = {
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};
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EXPORT_SYMBOL_GPL(clk_mux_ops);
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const struct clk_ops clk_mux_ro_ops = {
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.get_parent = clk_mux_get_parent,
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};
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EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
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struct clk *clk_register_mux_table(struct device *dev, const char *name,
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const char **parent_names, u8 num_parents, unsigned long flags,
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void __iomem *reg, u8 shift, u32 mask,
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@ -133,7 +138,10 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
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}
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init.name = name;
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init.ops = &clk_mux_ops;
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if (clk_mux_flags & CLK_MUX_READ_ONLY)
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init.ops = &clk_mux_ro_ops;
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else
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init.ops = &clk_mux_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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@ -327,8 +327,10 @@ struct clk_mux {
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#define CLK_MUX_INDEX_ONE BIT(0)
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#define CLK_MUX_INDEX_BIT BIT(1)
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#define CLK_MUX_HIWORD_MASK BIT(2)
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#define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */
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extern const struct clk_ops clk_mux_ops;
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extern const struct clk_ops clk_mux_ro_ops;
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struct clk *clk_register_mux(struct device *dev, const char *name,
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const char **parent_names, u8 num_parents, unsigned long flags,
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