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tg3 / broadcom: Add APD support for GPHYs
This patch adds an RXC auto power-down feature to the code that supports the gphys. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -107,6 +107,11 @@
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/* 00101: Spare Control Register 3 */
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#define BCM54XX_SHD_SCR3 0x05
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#define BCM54XX_SHD_SCR3_DEF_CLK125 0x0001
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#define BCM54XX_SHD_SCR3_DLLAPD_DIS 0x0002
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/* 01010: Auto Power-Down */
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#define BCM54XX_SHD_APD 0x0a
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#define BCM54XX_SHD_APD_EN 0x0020
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#define BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */
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/* LED3 / ~LINKSPD[2] selector */
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@ -321,9 +326,11 @@ error:
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static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
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{
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u32 val, orig;
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bool clk125en = true;
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/* Abort if we are using an untested phy. */
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if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 ||
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if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 ||
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BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 ||
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BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M)
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return;
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@ -333,20 +340,45 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
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orig = val;
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if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) {
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if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
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BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
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BRCM_PHY_REV(phydev) >= 0x3) {
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/* Here, bit 0 _disables_ CLK125 when set */
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val |= BCM54XX_SHD_SCR3_DEF_CLK125;
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} else {
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if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
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BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
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BRCM_PHY_REV(phydev) >= 0x3) {
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/*
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* Here, bit 0 _disables_ CLK125 when set.
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* This bit is set by default.
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*/
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clk125en = false;
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} else {
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if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) {
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/* Here, bit 0 _enables_ CLK125 when set */
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val &= ~BCM54XX_SHD_SCR3_DEF_CLK125;
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clk125en = false;
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}
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}
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if (clk125en == false ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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val &= ~BCM54XX_SHD_SCR3_DLLAPD_DIS;
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else
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val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
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if (orig != val)
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bcm54xx_shadow_write(phydev, BCM54XX_SHD_SCR3, val);
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val = bcm54xx_shadow_read(phydev, BCM54XX_SHD_APD);
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if (val < 0)
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return;
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orig = val;
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if (clk125en == false ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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val |= BCM54XX_SHD_APD_EN;
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else
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val &= ~BCM54XX_SHD_APD_EN;
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if (orig != val)
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bcm54xx_shadow_write(phydev, BCM54XX_SHD_APD, val);
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}
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static int bcm54xx_config_init(struct phy_device *phydev)
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@ -376,7 +408,8 @@ static int bcm54xx_config_init(struct phy_device *phydev)
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(phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE))
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bcm54xx_shadow_write(phydev, BCM54XX_SHD_RGMII_MODE, 0);
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if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)
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if ((phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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bcm54xx_adjust_rxrefclk(phydev);
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bcm54xx_phydsp_config(phydev);
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@ -1097,11 +1097,13 @@ static int tg3_mdio_init(struct tg3 *tp)
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switch (phydev->drv->phy_id & phydev->drv->phy_id_mask) {
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case TG3_PHY_ID_BCM57780:
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phydev->interface = PHY_INTERFACE_MODE_GMII;
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phydev->dev_flags |= PHY_BRCM_AUTO_PWRDWN_ENABLE;
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break;
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case TG3_PHY_ID_BCM50610:
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case TG3_PHY_ID_BCM50610M:
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phydev->dev_flags |= PHY_BRCM_CLEAR_RGMII_MODE |
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PHY_BRCM_RX_REFCLK_UNUSED;
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PHY_BRCM_RX_REFCLK_UNUSED |
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PHY_BRCM_AUTO_PWRDWN_ENABLE;
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if (tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)
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phydev->dev_flags |= PHY_BRCM_STD_IBND_DISABLE;
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if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
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