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soc/tegra: Changes for v4.7-rc1
This contains a bunch of preparatory patches to the PMC driver which are a prerequisite to moving the driver to generic power domains. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJXEPuLAAoJEN0jrNd/PrOh44YP/1wUmB6H52eE3U5BIPNaMLZv XNzp/chmkT59lXgksHOsMK7o40z/nq5+Fc32DW95w9nQmBHcNtRSUXQJzWjfIgdv m5Kl8A11OBaocO5JMaTIGyDUwOXMTYNdD48dEasS+8LdmB2FwiUyY1BgiKxg7LLO JX/YZPo3hwVdmDVUutYNutvOhTJmHXt7HVqO5roSZnU2ydTy72BEZU69hWIFStT1 I7YY8w/Xf5IEGBDYM4EjLWeGUKvsSfKMy1MP+YVxeoGsFON3Xnh2BZtxpquV0uov 8cyiYgmr6BBlh7wlgId/mCUDArTXoOkRqr3E6V/G0UIoqYFIdpAyQ49xdNe5yplk WyXUl7Ui6tkf2V9xUiDJkjXR3jgK53adovNWpMAAjVowO1HQ8rh151H6fqpGu22R MWBXocMrCp2I1/XJ28X/dVpO8fMehMUTOzaXYtB+Q5F6Gh49NcBcEeNGH6wdb02A lCHzU00rq5RnUPvcp/irvv88aiV2rjcePJ8RYnAfkDpH7ugMSdiGb9aMUaMwRW1C p+z2GSswzfsT4Iog6Jtu6yQhkWTthexLW8F17foT5uGx3mNZQ6cyNzxRsRjr59ot Rc9aahzlbkeMUzHDevihHiNuqIXAgM4Cy0JQFgm8lqxdYenKcxkzBHawdpgP60yf IQcsQ+Wq0WERU3e5aw7w =EmlG -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Merge "soc/tegra: Changes for v4.7-rc1" from Thierry Reding: This contains a bunch of preparatory patches to the PMC driver which are a prerequisite to moving the driver to generic power domains. * tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Update NVIDIA PMC for Tegra soc/tegra: pmc: Wait for powergate state to change soc/tegra: pmc: Ensure GPU partition can be toggled on/off by PMC soc/tegra: pmc: Remove additional check for a valid partition soc/tegra: pmc: Fix verification of valid partitions soc/tegra: pmc: Fix testing of powergate state soc/tegra: pmc: Change powergate and rail IDs to be an unsigned type soc/tegra: pmc: Protect public functions from potential race conditions soc/tegra: pmc: Restore base address on probe failure soc/tegra: pmc: Remove non-existing L2 partition for Tegra124 soc/tegra: pmc: Remove non-existing power partitions for Tegra210 soc/tegra: pmc: Remove debugfs entry on probe failure soc/tegra: pmc: Fix sparse warning for tegra_pmc_init_tsense_reset() soc/tegra: pmc: Add missing structure members to kernel-doc
This commit is contained in:
Arnd Bergmann
commit
c8f7341b29
@ -6,11 +6,13 @@ modes. It provides power-gating controllers for SoC and CPU power-islands.
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Required properties:
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- name : Should be pmc
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- compatible : For Tegra20, must contain "nvidia,tegra20-pmc". For Tegra30,
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must contain "nvidia,tegra30-pmc". For Tegra114, must contain
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"nvidia,tegra114-pmc". For Tegra124, must contain "nvidia,tegra124-pmc".
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Otherwise, must contain "nvidia,<chip>-pmc", plus at least one of the
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above, where <chip> is tegra132.
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- compatible : Should contain one of the following:
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For Tegra20 must contain "nvidia,tegra20-pmc".
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For Tegra30 must contain "nvidia,tegra30-pmc".
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For Tegra114 must contain "nvidia,tegra114-pmc"
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For Tegra124 must contain "nvidia,tegra124-pmc"
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For Tegra132 must contain "nvidia,tegra124-pmc"
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For Tegra210 must contain "nvidia,tegra210-pmc"
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- reg : Offset and length of the register set for the device
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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@ -108,19 +108,9 @@ static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle)
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* be un-gated by un-toggling the power gate register
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* manually.
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*/
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if (!tegra_pmc_cpu_is_powered(cpu)) {
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ret = tegra_pmc_cpu_power_on(cpu);
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if (ret)
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return ret;
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/* Wait for the power to come up. */
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timeout = jiffies + msecs_to_jiffies(100);
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while (!tegra_pmc_cpu_is_powered(cpu)) {
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if (time_after(jiffies, timeout))
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return -ETIMEDOUT;
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udelay(10);
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}
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}
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ret = tegra_pmc_cpu_power_on(cpu);
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if (ret)
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return ret;
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remove_clamps:
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/* CPU partition is powered. Enable the CPU clock. */
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@ -121,7 +121,7 @@ struct tegra_dc {
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spinlock_t lock;
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struct drm_crtc base;
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int powergate;
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unsigned int powergate;
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int pipe;
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struct clk *clk;
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@ -28,6 +28,7 @@
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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@ -113,8 +114,11 @@ struct tegra_pmc_soc {
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/**
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* struct tegra_pmc - NVIDIA Tegra PMC
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* @dev: pointer to PMC device structure
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* @base: pointer to I/O remapped register region
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* @clk: pointer to pclk clock
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* @soc: pointer to SoC data structure
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* @debugfs: pointer to debugfs entry
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* @rate: currently configured rate of pclk
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* @suspend_mode: lowest suspend mode available
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* @cpu_good_time: CPU power good time (in microseconds)
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@ -134,6 +138,7 @@ struct tegra_pmc {
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struct device *dev;
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void __iomem *base;
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struct clk *clk;
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struct dentry *debugfs;
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const struct tegra_pmc_soc *soc;
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@ -170,38 +175,56 @@ static void tegra_pmc_writel(u32 value, unsigned long offset)
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writel(value, pmc->base + offset);
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}
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static inline bool tegra_powergate_state(int id)
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{
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if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps)
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return (tegra_pmc_readl(GPU_RG_CNTRL) & 0x1) == 0;
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else
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return (tegra_pmc_readl(PWRGATE_STATUS) & BIT(id)) != 0;
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}
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static inline bool tegra_powergate_is_valid(int id)
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{
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return (pmc->soc && pmc->soc->powergates[id]);
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}
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/**
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* tegra_powergate_set() - set the state of a partition
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* @id: partition ID
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* @new_state: new state of the partition
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*/
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static int tegra_powergate_set(int id, bool new_state)
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static int tegra_powergate_set(unsigned int id, bool new_state)
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{
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bool status;
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int err;
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if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps)
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return -EINVAL;
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mutex_lock(&pmc->powergates_lock);
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status = tegra_pmc_readl(PWRGATE_STATUS) & (1 << id);
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if (status == new_state) {
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if (tegra_powergate_state(id) == new_state) {
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mutex_unlock(&pmc->powergates_lock);
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return 0;
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}
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tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);
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err = readx_poll_timeout(tegra_powergate_state, id, status,
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status == new_state, 10, 100000);
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mutex_unlock(&pmc->powergates_lock);
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return 0;
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return err;
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}
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/**
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* tegra_powergate_power_on() - power on partition
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* @id: partition ID
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*/
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int tegra_powergate_power_on(int id)
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int tegra_powergate_power_on(unsigned int id)
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{
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if (!pmc->soc || id < 0 || id >= pmc->soc->num_powergates)
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if (!tegra_powergate_is_valid(id))
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return -EINVAL;
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return tegra_powergate_set(id, true);
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@ -211,9 +234,9 @@ int tegra_powergate_power_on(int id)
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* tegra_powergate_power_off() - power off partition
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* @id: partition ID
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*/
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int tegra_powergate_power_off(int id)
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int tegra_powergate_power_off(unsigned int id)
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{
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if (!pmc->soc || id < 0 || id >= pmc->soc->num_powergates)
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if (!tegra_powergate_is_valid(id))
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return -EINVAL;
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return tegra_powergate_set(id, false);
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@ -224,28 +247,33 @@ EXPORT_SYMBOL(tegra_powergate_power_off);
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* tegra_powergate_is_powered() - check if partition is powered
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* @id: partition ID
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*/
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int tegra_powergate_is_powered(int id)
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int tegra_powergate_is_powered(unsigned int id)
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{
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u32 status;
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int status;
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if (!pmc->soc || id < 0 || id >= pmc->soc->num_powergates)
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if (!tegra_powergate_is_valid(id))
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return -EINVAL;
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status = tegra_pmc_readl(PWRGATE_STATUS) & (1 << id);
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return !!status;
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mutex_lock(&pmc->powergates_lock);
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status = tegra_powergate_state(id);
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mutex_unlock(&pmc->powergates_lock);
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return status;
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}
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/**
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* tegra_powergate_remove_clamping() - remove power clamps for partition
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* @id: partition ID
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*/
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int tegra_powergate_remove_clamping(int id)
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int tegra_powergate_remove_clamping(unsigned int id)
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{
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u32 mask;
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if (!pmc->soc || id < 0 || id >= pmc->soc->num_powergates)
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if (!tegra_powergate_is_valid(id))
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return -EINVAL;
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mutex_lock(&pmc->powergates_lock);
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/*
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* On Tegra124 and later, the clamps for the GPU are controlled by a
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* separate register (with different semantics).
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@ -253,7 +281,7 @@ int tegra_powergate_remove_clamping(int id)
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if (id == TEGRA_POWERGATE_3D) {
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if (pmc->soc->has_gpu_clamps) {
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tegra_pmc_writel(0, GPU_RG_CNTRL);
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return 0;
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goto out;
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}
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}
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@ -270,6 +298,9 @@ int tegra_powergate_remove_clamping(int id)
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tegra_pmc_writel(mask, REMOVE_CLAMPING);
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out:
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mutex_unlock(&pmc->powergates_lock);
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return 0;
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}
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EXPORT_SYMBOL(tegra_powergate_remove_clamping);
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@ -282,7 +313,7 @@ EXPORT_SYMBOL(tegra_powergate_remove_clamping);
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*
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* Must be called with clk disabled, and returns with clk enabled.
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*/
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int tegra_powergate_sequence_power_up(int id, struct clk *clk,
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int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,
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struct reset_control *rst)
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{
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int ret;
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@ -325,9 +356,9 @@ EXPORT_SYMBOL(tegra_powergate_sequence_power_up);
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* Returns the partition ID corresponding to the CPU partition ID or a
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* negative error code on failure.
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*/
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static int tegra_get_cpu_powergate_id(int cpuid)
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static int tegra_get_cpu_powergate_id(unsigned int cpuid)
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{
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if (pmc->soc && cpuid > 0 && cpuid < pmc->soc->num_cpu_powergates)
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if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates)
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return pmc->soc->cpu_powergates[cpuid];
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return -EINVAL;
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@ -337,7 +368,7 @@ static int tegra_get_cpu_powergate_id(int cpuid)
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* tegra_pmc_cpu_is_powered() - check if CPU partition is powered
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* @cpuid: CPU partition ID
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*/
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bool tegra_pmc_cpu_is_powered(int cpuid)
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bool tegra_pmc_cpu_is_powered(unsigned int cpuid)
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{
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int id;
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@ -352,7 +383,7 @@ bool tegra_pmc_cpu_is_powered(int cpuid)
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* tegra_pmc_cpu_power_on() - power on CPU partition
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* @cpuid: CPU partition ID
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*/
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int tegra_pmc_cpu_power_on(int cpuid)
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int tegra_pmc_cpu_power_on(unsigned int cpuid)
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{
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int id;
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@ -367,7 +398,7 @@ int tegra_pmc_cpu_power_on(int cpuid)
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* tegra_pmc_cpu_remove_clamping() - remove power clamps for CPU partition
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* @cpuid: CPU partition ID
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*/
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int tegra_pmc_cpu_remove_clamping(int cpuid)
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int tegra_pmc_cpu_remove_clamping(unsigned int cpuid)
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{
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int id;
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@ -416,16 +447,18 @@ static struct notifier_block tegra_pmc_restart_handler = {
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static int powergate_show(struct seq_file *s, void *data)
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{
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unsigned int i;
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int status;
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seq_printf(s, " powergate powered\n");
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seq_printf(s, "------------------\n");
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for (i = 0; i < pmc->soc->num_powergates; i++) {
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if (!pmc->soc->powergates[i])
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status = tegra_powergate_is_powered(i);
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if (status < 0)
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continue;
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seq_printf(s, " %9s %7s\n", pmc->soc->powergates[i],
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tegra_powergate_is_powered(i) ? "yes" : "no");
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status ? "yes" : "no");
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}
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return 0;
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@ -445,17 +478,15 @@ static const struct file_operations powergate_fops = {
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static int tegra_powergate_debugfs_init(void)
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{
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struct dentry *d;
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d = debugfs_create_file("powergate", S_IRUGO, NULL, NULL,
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&powergate_fops);
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if (!d)
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pmc->debugfs = debugfs_create_file("powergate", S_IRUGO, NULL, NULL,
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&powergate_fops);
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if (!pmc->debugfs)
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return -ENOMEM;
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return 0;
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}
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static int tegra_io_rail_prepare(int id, unsigned long *request,
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static int tegra_io_rail_prepare(unsigned int id, unsigned long *request,
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unsigned long *status, unsigned int *bit)
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{
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unsigned long rate, value;
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@ -512,15 +543,17 @@ static void tegra_io_rail_unprepare(void)
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tegra_pmc_writel(DPD_SAMPLE_DISABLE, DPD_SAMPLE);
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}
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int tegra_io_rail_power_on(int id)
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int tegra_io_rail_power_on(unsigned int id)
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{
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unsigned long request, status, value;
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unsigned int bit, mask;
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int err;
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mutex_lock(&pmc->powergates_lock);
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err = tegra_io_rail_prepare(id, &request, &status, &bit);
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if (err < 0)
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return err;
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if (err)
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goto error;
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mask = 1 << bit;
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@ -531,27 +564,32 @@ int tegra_io_rail_power_on(int id)
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tegra_pmc_writel(value, request);
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err = tegra_io_rail_poll(status, mask, 0, 250);
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if (err < 0) {
|
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if (err) {
|
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pr_info("tegra_io_rail_poll() failed: %d\n", err);
|
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return err;
|
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goto error;
|
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}
|
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|
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tegra_io_rail_unprepare();
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|
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return 0;
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error:
|
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mutex_unlock(&pmc->powergates_lock);
|
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|
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return err;
|
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}
|
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EXPORT_SYMBOL(tegra_io_rail_power_on);
|
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int tegra_io_rail_power_off(int id)
|
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int tegra_io_rail_power_off(unsigned int id)
|
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{
|
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unsigned long request, status, value;
|
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unsigned int bit, mask;
|
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int err;
|
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|
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mutex_lock(&pmc->powergates_lock);
|
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|
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err = tegra_io_rail_prepare(id, &request, &status, &bit);
|
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if (err < 0) {
|
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if (err) {
|
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pr_info("tegra_io_rail_prepare() failed: %d\n", err);
|
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return err;
|
||||
goto error;
|
||||
}
|
||||
|
||||
mask = 1 << bit;
|
||||
@ -563,12 +601,15 @@ int tegra_io_rail_power_off(int id)
|
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tegra_pmc_writel(value, request);
|
||||
|
||||
err = tegra_io_rail_poll(status, mask, mask, 250);
|
||||
if (err < 0)
|
||||
return err;
|
||||
if (err)
|
||||
goto error;
|
||||
|
||||
tegra_io_rail_unprepare();
|
||||
|
||||
return 0;
|
||||
error:
|
||||
mutex_unlock(&pmc->powergates_lock);
|
||||
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL(tegra_io_rail_power_off);
|
||||
|
||||
@ -727,7 +768,7 @@ static void tegra_pmc_init(struct tegra_pmc *pmc)
|
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tegra_pmc_writel(value, PMC_CNTRL);
|
||||
}
|
||||
|
||||
void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc)
|
||||
static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc)
|
||||
{
|
||||
static const char disabled[] = "emergency thermal reset disabled";
|
||||
u32 pmu_addr, ctrl_id, reg_addr, reg_data, pinmux;
|
||||
@ -805,7 +846,7 @@ out:
|
||||
|
||||
static int tegra_pmc_probe(struct platform_device *pdev)
|
||||
{
|
||||
void __iomem *base = pmc->base;
|
||||
void __iomem *base;
|
||||
struct resource *res;
|
||||
int err;
|
||||
|
||||
@ -815,11 +856,9 @@ static int tegra_pmc_probe(struct platform_device *pdev)
|
||||
|
||||
/* take over the memory region from the early initialization */
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
pmc->base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(pmc->base))
|
||||
return PTR_ERR(pmc->base);
|
||||
|
||||
iounmap(base);
|
||||
base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(base))
|
||||
return PTR_ERR(base);
|
||||
|
||||
pmc->clk = devm_clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(pmc->clk)) {
|
||||
@ -842,11 +881,17 @@ static int tegra_pmc_probe(struct platform_device *pdev)
|
||||
|
||||
err = register_restart_handler(&tegra_pmc_restart_handler);
|
||||
if (err) {
|
||||
debugfs_remove(pmc->debugfs);
|
||||
dev_err(&pdev->dev, "unable to register restart handler, %d\n",
|
||||
err);
|
||||
return err;
|
||||
}
|
||||
|
||||
mutex_lock(&pmc->powergates_lock);
|
||||
iounmap(pmc->base);
|
||||
pmc->base = base;
|
||||
mutex_unlock(&pmc->powergates_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -964,7 +1009,6 @@ static const char * const tegra124_powergates[] = {
|
||||
[TEGRA_POWERGATE_VENC] = "venc",
|
||||
[TEGRA_POWERGATE_PCIE] = "pcie",
|
||||
[TEGRA_POWERGATE_VDEC] = "vdec",
|
||||
[TEGRA_POWERGATE_L2] = "l2",
|
||||
[TEGRA_POWERGATE_MPE] = "mpe",
|
||||
[TEGRA_POWERGATE_HEG] = "heg",
|
||||
[TEGRA_POWERGATE_SATA] = "sata",
|
||||
@ -1006,17 +1050,13 @@ static const char * const tegra210_powergates[] = {
|
||||
[TEGRA_POWERGATE_3D] = "3d",
|
||||
[TEGRA_POWERGATE_VENC] = "venc",
|
||||
[TEGRA_POWERGATE_PCIE] = "pcie",
|
||||
[TEGRA_POWERGATE_L2] = "l2",
|
||||
[TEGRA_POWERGATE_MPE] = "mpe",
|
||||
[TEGRA_POWERGATE_HEG] = "heg",
|
||||
[TEGRA_POWERGATE_SATA] = "sata",
|
||||
[TEGRA_POWERGATE_CPU1] = "cpu1",
|
||||
[TEGRA_POWERGATE_CPU2] = "cpu2",
|
||||
[TEGRA_POWERGATE_CPU3] = "cpu3",
|
||||
[TEGRA_POWERGATE_CELP] = "celp",
|
||||
[TEGRA_POWERGATE_CPU0] = "cpu0",
|
||||
[TEGRA_POWERGATE_C0NC] = "c0nc",
|
||||
[TEGRA_POWERGATE_C1NC] = "c1nc",
|
||||
[TEGRA_POWERGATE_SOR] = "sor",
|
||||
[TEGRA_POWERGATE_DIS] = "dis",
|
||||
[TEGRA_POWERGATE_DISB] = "disb",
|
||||
|
||||
@ -33,9 +33,9 @@ void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode);
|
||||
#endif /* CONFIG_PM_SLEEP */
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
bool tegra_pmc_cpu_is_powered(int cpuid);
|
||||
int tegra_pmc_cpu_power_on(int cpuid);
|
||||
int tegra_pmc_cpu_remove_clamping(int cpuid);
|
||||
bool tegra_pmc_cpu_is_powered(unsigned int cpuid);
|
||||
int tegra_pmc_cpu_power_on(unsigned int cpuid);
|
||||
int tegra_pmc_cpu_remove_clamping(unsigned int cpuid);
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
/*
|
||||
@ -108,50 +108,51 @@ int tegra_pmc_cpu_remove_clamping(int cpuid);
|
||||
#define TEGRA_IO_RAIL_SYS_DDC 58
|
||||
|
||||
#ifdef CONFIG_ARCH_TEGRA
|
||||
int tegra_powergate_is_powered(int id);
|
||||
int tegra_powergate_power_on(int id);
|
||||
int tegra_powergate_power_off(int id);
|
||||
int tegra_powergate_remove_clamping(int id);
|
||||
int tegra_powergate_is_powered(unsigned int id);
|
||||
int tegra_powergate_power_on(unsigned int id);
|
||||
int tegra_powergate_power_off(unsigned int id);
|
||||
int tegra_powergate_remove_clamping(unsigned int id);
|
||||
|
||||
/* Must be called with clk disabled, and returns with clk enabled */
|
||||
int tegra_powergate_sequence_power_up(int id, struct clk *clk,
|
||||
int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,
|
||||
struct reset_control *rst);
|
||||
|
||||
int tegra_io_rail_power_on(int id);
|
||||
int tegra_io_rail_power_off(int id);
|
||||
int tegra_io_rail_power_on(unsigned int id);
|
||||
int tegra_io_rail_power_off(unsigned int id);
|
||||
#else
|
||||
static inline int tegra_powergate_is_powered(int id)
|
||||
static inline int tegra_powergate_is_powered(unsigned int id)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int tegra_powergate_power_on(int id)
|
||||
static inline int tegra_powergate_power_on(unsigned int id)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int tegra_powergate_power_off(int id)
|
||||
static inline int tegra_powergate_power_off(unsigned int id)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int tegra_powergate_remove_clamping(int id)
|
||||
static inline int tegra_powergate_remove_clamping(unsigned int id)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
|
||||
static inline int tegra_powergate_sequence_power_up(unsigned int id,
|
||||
struct clk *clk,
|
||||
struct reset_control *rst)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int tegra_io_rail_power_on(int id)
|
||||
static inline int tegra_io_rail_power_on(unsigned int id)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int tegra_io_rail_power_off(int id)
|
||||
static inline int tegra_io_rail_power_off(unsigned int id)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user